staging: rtl8723bs: hal: Fix codespell-reported spelling mistakes

They are appear to be spelling mistakes,
Initially identified in a codespell report and never been addressed so far.

./rtl8723b_phycfg.c:156: Threre ==> There, three
./rtl8723b_phycfg.c:283: Condig ==> Config
./rtl8723b_phycfg.c:328: Tranceiver ==> Transceiver

Signed-off-by: Bragatheswaran Manickavel <bragathemanick0908@gmail.com>
Link: https://lore.kernel.org/r/20230917134940.2746-1-bragathemanick0908@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Bragatheswaran Manickavel
2023-09-17 19:19:40 +05:30
committed by Greg Kroah-Hartman
parent a7705e54e1
commit 6fc4468845

View File

@@ -153,7 +153,7 @@ static u32 phy_RFSerialRead_8723B(
* @Data: The new register Data in the target bit position
* of the target to be read
*
* .. Note:: Threre are three types of serial operations:
* .. Note:: There are three types of serial operations:
* 1. Software serial write
* 2. Hardware LSSI-Low Speed Serial Interface
* 3. Hardware HSSI-High speed
@@ -280,7 +280,7 @@ void PHY_SetRFReg_8723B(
/*-----------------------------------------------------------------------------
* PHY_MACConfig8192C - Condig MAC by header file or parameter file.
* PHY_MACConfig8192C - Config MAC by header file or parameter file.
*
* Revised History:
* When Who Remark
@@ -325,7 +325,7 @@ static void phy_InitBBRFRegisterDefinition(struct adapter *Adapter)
pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2 */
pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; /* wire control parameter2 */
/* Tranceiver Readback LSSI/HSPI mode */
/* Transceiver Readback LSSI/HSPI mode */
pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;