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arm64: dts: qcom: sm6375: Add SDHCI2

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Configure the second SDHCI bus controller, which usually the
interface used for SD cards.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221114105043.36698-3-konrad.dybcio@linaro.org
This commit is contained in:
Konrad Dybcio
2022-11-14 11:50:42 +01:00
committed by Bjorn Andersson
parent b0dfe3c9d6
commit 6f196ab2ad
1 changed files with 82 additions and 0 deletions
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82
arch/arm64/boot/dts/qcom/sm6375.dtsi
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@@ -540,6 +540,46 @@ tlmm: pinctrl@500000 {
#interrupt-cells = <2>;
#gpio-cells = <2>;
sdc2_off_state: sdc2-off-state {
clk-pins {
pins = "sdc2_clk";
drive-strength = <2>;
bias-disable;
};
cmd-pins {
pins = "sdc2_cmd";
drive-strength = <2>;
bias-pull-up;
};
data-pins {
pins = "sdc2_data";
drive-strength = <2>;
bias-pull-up;
};
};
sdc2_on_state: sdc2-on-state {
clk-pins {
pins = "sdc2_clk";
drive-strength = <16>;
bias-disable;
};
cmd-pins {
pins = "sdc2_cmd";
drive-strength = <10>;
bias-pull-up;
};
data-pins {
pins = "sdc2_data";
drive-strength = <10>;
bias-pull-up;
};
};
qup_i2c0_default: qup-i2c0-default-state {
pins = "gpio0", "gpio1";
function = "qup00";
@@ -630,6 +670,48 @@ rpm_msg_ram: sram@45f0000 {
reg = <0 0x045f0000 0 0x7000>;
};
sdhc_2: mmc@4784000 {
compatible = "qcom,sm6375-sdhci", "qcom,sdhci-msm-v5";
reg = <0 0x04784000 0 0x1000>;
interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC2_AHB_CLK>,
<&gcc GCC_SDCC2_APPS_CLK>,
<&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "iface", "core", "xo";
resets = <&gcc GCC_SDCC2_BCR>;
iommus = <&apps_smmu 0x40 0x0>;
pinctrl-0 = <&sdc2_on_state>;
pinctrl-1 = <&sdc2_off_state>;
pinctrl-names = "default", "sleep";
qcom,dll-config = <0x0007642c>;
qcom,ddr-config = <0x80040868>;
power-domains = <&rpmpd SM6375_VDDCX>;
operating-points-v2 = <&sdhc2_opp_table>;
bus-width = <4>;
status = "disabled";
sdhc2_opp_table: opp-table {
compatible = "operating-points-v2";
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
required-opps = <&rpmpd_opp_low_svs>;
};
opp-202000000 {
opp-hz = /bits/ 64 <202000000>;
required-opps = <&rpmpd_opp_svs_plus>;
};
};
};
gpi_dma0: dma-controller@4a00000 {
compatible = "qcom,sm6375-gpi-dma", "qcom,sm6350-gpi-dma";
reg = <0 0x04a00000 0 0x60000>;