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media: iris: disable time-delta-based rate control for VBR

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The iris encoder driver was not sending
HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL to the firmware during encoder
initialization. Without this property, the firmware defaults to
time-delta-based rate control (enabled), which calculates the output
bitrate from actual frame timing rather than following the configured
bitrate target.
This caused variable bitrate (VBR) encoding to produce ~5x configured
bitrate. For example, with video_bitrate=896000 (896 Kbps), the output
is ~4.4 Mbps instead of the expected ~896 Kbps.
Time-delta-based rate control is designed for variable frame rate (VFR)
scenarios where the encoder adapts to actual frame timing. However, when
an application explicitly configures a bitrate target, the firmware must
follow that target regardless of frame timing.
Fix this by adding the TIME_DELTA_BASED_RC capability with a default value
of 0 (disabled) and sending HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL = 0 to
the firmware during stream-on, allowing the firmware to use the configured
bitrate as the target.

Signed-off-by: Gourav Kumar <gouravk@qti.qualcomm.com>
Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
This commit is contained in:
Gourav Kumar
2026-07-10 08:24:04 +05:30
committed by Bryan O'Donoghue
parent a9aba94a7b
commit 6eec0f9b5c
5 changed files with 32 additions and 0 deletions
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19
drivers/media/platform/qcom/iris/iris_ctrls.c
View File

@@ -1499,6 +1499,25 @@ int iris_set_req_sync_frame(struct iris_inst *inst, enum platform_inst_fw_cap_ty
&hfi_val, sizeof(u32));
}
int iris_set_time_delta_based_rc(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id)
{
const struct iris_hfi_session_ops *hfi_ops = inst->hfi_session_ops;
u32 hfi_id = inst->fw_caps[cap_id].hfi_id;
u32 value = inst->fw_caps[cap_id].value;
/*
* Disable time-delta-based rate control (value = 0).
* This overrides the firmware's default (enabled), ensuring the
* firmware uses the configured bitrate target rather than calculating
* bitrate from frame timing.
*/
return hfi_ops->session_set_property(inst, hfi_id,
HFI_HOST_FLAGS_NONE,
iris_get_port_info(inst, cap_id),
HFI_PAYLOAD_U32,
&value, sizeof(u32));
}
int iris_set_properties(struct iris_inst *inst, u32 plane)
{
const struct iris_hfi_session_ops *hfi_ops = inst->hfi_session_ops;

1
drivers/media/platform/qcom/iris/iris_ctrls.h
View File

@@ -48,6 +48,7 @@ int iris_set_layer_count_gen1(struct iris_inst *inst, enum platform_inst_fw_cap_
int iris_set_layer_count_gen2(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
int iris_set_layer_bitrate(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
int iris_set_req_sync_frame(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
int iris_set_time_delta_based_rc(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id);
int iris_set_properties(struct iris_inst *inst, u32 plane);
#endif

10
drivers/media/platform/qcom/iris/iris_hfi_gen2.c
View File

@@ -1240,6 +1240,16 @@ static const struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
.set = iris_set_bitrate_mode_gen2,
},
{
.cap_id = TIME_DELTA_BASED_RC,
.min = 0,
.max = 1,
.step_or_mask = 1,
.value = 0,
.hfi_id = HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL,
.flags = CAP_FLAG_OUTPUT_PORT,
.set = iris_set_time_delta_based_rc,
},
{
.cap_id = FRAME_SKIP_MODE,
.min = V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED,

1
drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h
View File

@@ -67,6 +67,7 @@ enum hfi_rate_control {
};
#define HFI_PROP_RATE_CONTROL 0x0300012a
#define HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL 0x0300012b
#define HFI_PROP_QP_PACKED 0x0300012e
#define HFI_PROP_MIN_QP_PACKED 0x0300012f
#define HFI_PROP_MAX_QP_PACKED 0x03000130

1
drivers/media/platform/qcom/iris/iris_platform_common.h
View File

@@ -185,6 +185,7 @@ enum platform_inst_fw_cap_type {
LAYER4_BITRATE_HEVC,
LAYER5_BITRATE_HEVC,
REQUEST_SYNC_FRAME,
TIME_DELTA_BASED_RC,
INST_FW_CAP_MAX,
};