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synced 2026-08-28 07:33:45 -04:00
gpu: nova-core: reserve vGPU WPR2 heap
GSP-RM needs a larger WPR2 heap when booting in vGPU mode. The heap size is firmware-dependent, so it should come from the generated firmware bindings instead of being open-coded in nova-core. Pass the detected vGPU state into the framebuffer layout calculation. Keep baremetal boots on the existing heap sizing path, and use the 570.144 vGPU default heap binding only when vGPU is enabled. The same state match also sets the VF partition count, so disabled and invalid 0/1-VF states do not enter the vGPU heap path. Cc: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Zhi Wang <zhiw@nvidia.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Link: https://patch.msgid.link/20260722073913.1807677-7-zhiw@nvidia.com [ Use checked arithmetic to calculate wpr2_heap_addr. - Danilo ] Signed-off-by: Danilo Krummrich <dakr@kernel.org>
This commit is contained in:
committed by
Danilo Krummrich
parent
f6f0d2d461
commit
6dcbb4b132
@@ -23,7 +23,8 @@
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firmware::gsp::GspFirmware,
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gpu::Chipset,
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gsp,
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num::FromSafeCast, //
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num::FromSafeCast,
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vgpu::VgpuState, //
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};
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mod hal;
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@@ -171,7 +172,12 @@ pub(crate) struct FbLayout {
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impl FbLayout {
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/// Computes the FB layout for `chipset` required to run the `gsp_fw` GSP firmware.
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pub(crate) fn new(chipset: Chipset, bar: Bar0<'_>, gsp_fw: &GspFirmware) -> Result<Self> {
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pub(crate) fn new(
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chipset: Chipset,
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bar: Bar0<'_>,
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gsp_fw: &GspFirmware,
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vgpu_state: VgpuState,
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) -> Result<Self> {
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let hal = hal::fb_hal(chipset);
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let fb = {
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@@ -234,11 +240,24 @@ pub(crate) fn new(chipset: Chipset, bar: Bar0<'_>, gsp_fw: &GspFirmware) -> Resu
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FbRange(elf_addr..elf_addr + elf_size)
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};
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let (vf_partition_count, wpr2_heap_size) = match vgpu_state {
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VgpuState::Disabled => (
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0,
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gsp::LibosParams::from_chipset(chipset).wpr_heap_size(chipset, fb.end)?,
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),
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VgpuState::Enabled { total_vfs } => (
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u8::try_from(total_vfs.get()).map_err(|_| EINVAL)?,
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gsp::LibosParams::vgpu_wpr_heap_size(),
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),
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};
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let wpr2_heap = {
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const WPR2_HEAP_DOWN_ALIGN: Alignment = Alignment::new::<SZ_1M>();
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let wpr2_heap_size =
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gsp::LibosParams::from_chipset(chipset).wpr_heap_size(chipset, fb.end)?;
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let wpr2_heap_addr = (elf.start - wpr2_heap_size).align_down(WPR2_HEAP_DOWN_ALIGN);
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let wpr2_heap_addr = elf
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.start
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.checked_sub(wpr2_heap_size)
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.ok_or(EOVERFLOW)?
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.align_down(WPR2_HEAP_DOWN_ALIGN);
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FbRange(wpr2_heap_addr..(elf.start).align_down(WPR2_HEAP_DOWN_ALIGN))
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};
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@@ -265,7 +284,7 @@ pub(crate) fn new(chipset: Chipset, bar: Bar0<'_>, gsp_fw: &GspFirmware) -> Resu
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wpr2_heap,
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wpr2,
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heap,
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vf_partition_count: 0,
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vf_partition_count,
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pmu_reserved_size: hal.pmu_reserved_size(),
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})
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}
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@@ -50,7 +50,7 @@ pub(crate) fn boot(
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let gsp_fw = KBox::pin_init(GspFirmware::new(dev, chipset, FIRMWARE_VERSION), GFP_KERNEL)?;
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let fb_layout = FbLayout::new(chipset, bar, &gsp_fw)?;
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let fb_layout = FbLayout::new(chipset, bar, &gsp_fw, ctx.vgpu.state())?;
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dev_dbg!(dev, "{:#x?}\n", fb_layout);
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let wpr_meta = Coherent::init(dev, GFP_KERNEL, GspFwWprMeta::new(&gsp_fw, &fb_layout))?;
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@@ -132,6 +132,11 @@ pub(crate) fn from_chipset(chipset: Chipset) -> &'static LibosParams {
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}
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}
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/// Returns the WPR heap size to reserve when vGPU is enabled.
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pub(crate) fn vgpu_wpr_heap_size() -> u64 {
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u64::from(bindings::GSP_FW_HEAP_SIZE_VGPU_DEFAULT)
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}
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/// Returns the amount of memory (in bytes) to allocate for the WPR heap for a framebuffer size
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/// of `fb_size` (in bytes) for `chipset`.
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pub(crate) fn wpr_heap_size(&self, chipset: Chipset, fb_size: u64) -> Result<u64> {
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@@ -40,6 +40,7 @@ fn fmt(&self, fmt: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result {
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pub const GSP_FW_HEAP_PARAM_BASE_RM_SIZE_GH100: u32 = 14680064;
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pub const GSP_FW_HEAP_PARAM_SIZE_PER_GB_FB: u32 = 98304;
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pub const GSP_FW_HEAP_PARAM_CLIENT_ALLOC_SIZE: u32 = 100663296;
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pub const GSP_FW_HEAP_SIZE_VGPU_DEFAULT: u32 = 609222656;
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pub const GSP_FW_HEAP_SIZE_OVERRIDE_LIBOS2_MIN_MB: u32 = 64;
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pub const GSP_FW_HEAP_SIZE_OVERRIDE_LIBOS2_MAX_MB: u32 = 256;
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pub const GSP_FW_HEAP_SIZE_OVERRIDE_LIBOS3_BAREMETAL_MIN_MB: u32 = 88;
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@@ -26,7 +26,6 @@ pub(crate) enum VgpuState {
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/// vGPU mode is enabled for this boot.
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Enabled {
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/// Total number of SR-IOV VFs supported by this device.
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#[expect(dead_code)]
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total_vfs: NonZero<u16>,
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},
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}
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