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RISC-V: KVM: Fix timer state restore
The KVM_REG_RISCV_TIMER_REG(state) one-reg write passes the value
written by userspace to kvm_riscv_vcpu_timer_next_event() when
re-enabling the timer.
That value is the timer state, KVM_RISCV_TIMER_STATE_ON, not the
timer compare value. During migration or state restore, userspace
restores the compare register separately, which stores the target
cycle in t->next_cycles. Re-arming the timer with the state value
schedules the next event at cycle 1 instead of the restored compare
value, causing the virtual timer to fire too early.
Use the restored compare value from t->next_cycles when turning the
timer back on.
Fixes: 3a9f66cb25 ("RISC-V: KVM: Add timer functionality")
Signed-off-by: Qiang Ma <maqianga@uniontech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20260526075544.796396-1-maqianga@uniontech.com
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
@@ -231,7 +231,7 @@ int kvm_riscv_vcpu_set_reg_timer(struct kvm_vcpu *vcpu,
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break;
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case KVM_REG_RISCV_TIMER_REG(state):
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if (reg_val == KVM_RISCV_TIMER_STATE_ON)
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ret = kvm_riscv_vcpu_timer_next_event(vcpu, reg_val);
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ret = kvm_riscv_vcpu_timer_next_event(vcpu, t->next_cycles);
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else
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ret = kvm_riscv_vcpu_timer_cancel(t);
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break;
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