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drm/i915: pass dev_priv explicitly to PFIT_AUTO_RATIOS

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Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PFIT_AUTO_RATIOS register macro.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/148e8c66d37b5eb3077eef44018591d8b6a57937.1717514638.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Jani Nikula
2024-06-04 18:25:35 +03:00
parent 23501e567a
commit 6d3a843b0e
2 changed files with 3 additions and 2 deletions
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3
drivers/gpu/drm/i915/display/intel_overlay.c
View File

@@ -951,7 +951,8 @@ static void update_pfit_vscale_ratio(struct intel_overlay *overlay)
u32 tmp;
if (intel_de_read(dev_priv, PFIT_CONTROL(dev_priv)) & PFIT_VERT_AUTO_SCALE)
tmp = intel_de_read(dev_priv, PFIT_AUTO_RATIOS);
tmp = intel_de_read(dev_priv,
PFIT_AUTO_RATIOS(dev_priv));
else
tmp = intel_de_read(dev_priv,
PFIT_PGM_RATIOS(dev_priv));

2
drivers/gpu/drm/i915/i915_reg.h
View File

@@ -1536,7 +1536,7 @@
#define PFIT_VERT_SCALE_MASK_965 REG_GENMASK(28, 16) /* 965+ */
#define PFIT_HORIZ_SCALE_MASK_965 REG_GENMASK(12, 0) /* 965+ */
#define PFIT_AUTO_RATIOS _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61238)
#define PFIT_AUTO_RATIOS(dev_priv) _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61238)
#define PCH_GTC_CTL _MMIO(0xe7000)
#define PCH_GTC_ENABLE (1 << 31)