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ARM: dts: imx: align name for crypto node and child nodes

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crypto node should use the "crypto" generic naming,
and not a specific one ("sahara", "dcp", "caam").

Child nodes of the crypto node for caam crypto engine
should use the "jr" name (without an index),
as indicated in the DT binding.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Horia Geantă
2020-03-05 15:59:08 +02:00
committed by Shawn Guo
parent d2cf2f91ba
commit 6cef60ff17
10 changed files with 21 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/imx23.dtsi
View File

@@ -422,7 +422,7 @@ dma_apbx: dma-apbx@80024000 {
clocks = <&clks 16>;
};
dcp@80028000 {
dcp: crypto@80028000 {
compatible = "fsl,imx23-dcp";
reg = <0x80028000 0x2000>;
interrupts = <53 54>;

2
arch/arm/boot/dts/imx27.dtsi
View File

@@ -525,7 +525,7 @@ usbmisc: usbmisc@10024600 {
reg = <0x10024600 0x200>;
};
sahara2: sahara@10025000 {
sahara2: crypto@10025000 {
compatible = "fsl,imx27-sahara";
reg = <0x10025000 0x1000>;
interrupts = <59>;

2
arch/arm/boot/dts/imx28.dtsi
View File

@@ -998,7 +998,7 @@ dma_apbx: dma-apbx@80024000 {
clocks = <&clks 26>;
};
dcp: dcp@80028000 {
dcp: crypto@80028000 {
compatible = "fsl,imx28-dcp", "fsl,imx23-dcp";
reg = <0x80028000 0x2000>;
interrupts = <52 53 54>;

6
arch/arm/boot/dts/imx6qdl.dtsi
View File

@@ -942,7 +942,7 @@ bus@2100000 { /* AIPS2 */
reg = <0x02100000 0x100000>;
ranges;
crypto: caam@2100000 {
crypto: crypto@2100000 {
compatible = "fsl,sec-v4.0";
#address-cells = <1>;
#size-cells = <1>;
@@ -954,13 +954,13 @@ crypto: caam@2100000 {
<&clks IMX6QDL_CLK_EIM_SLOW>;
clock-names = "mem", "aclk", "ipg", "emi_slow";
sec_jr0: jr0@1000 {
sec_jr0: jr@1000 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x1000 0x1000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr1: jr1@2000 {
sec_jr1: jr@2000 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x2000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm/boot/dts/imx6sl.dtsi
View File

@@ -777,7 +777,7 @@ lcdif: lcdif@20f8000 {
power-domains = <&pd_disp>;
};
dcp: dcp@20fc000 {
dcp: crypto@20fc000 {
compatible = "fsl,imx6sl-dcp", "fsl,imx28-dcp";
reg = <0x020fc000 0x4000>;
interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>,

2
arch/arm/boot/dts/imx6sll.dtsi
View File

@@ -652,7 +652,7 @@ lcdif: lcd-controller@20f8000 {
status = "disabled";
};
dcp: dcp@20fc000 {
dcp: crypto@20fc000 {
compatible = "fsl,imx28-dcp";
reg = <0x020fc000 0x4000>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,

6
arch/arm/boot/dts/imx6sx.dtsi
View File

@@ -837,7 +837,7 @@ aips2: bus@2100000 {
reg = <0x02100000 0x100000>;
ranges;
crypto: caam@2100000 {
crypto: crypto@2100000 {
compatible = "fsl,sec-v4.0";
#address-cells = <1>;
#size-cells = <1>;
@@ -850,13 +850,13 @@ crypto: caam@2100000 {
<&clks IMX6SX_CLK_EIM_SLOW>;
clock-names = "mem", "aclk", "ipg", "emi_slow";
sec_jr0: jr0@1000 {
sec_jr0: jr@1000 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x1000 0x1000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr1: jr1@2000 {
sec_jr1: jr@2000 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x2000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;

8
arch/arm/boot/dts/imx6ul.dtsi
View File

@@ -778,7 +778,7 @@ aips2: bus@2100000 {
reg = <0x02100000 0x100000>;
ranges;
crypto: caam@2140000 {
crypto: crypto@2140000 {
compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0";
#address-cells = <1>;
#size-cells = <1>;
@@ -789,19 +789,19 @@ crypto: caam@2140000 {
<&clks IMX6UL_CLK_CAAM_MEM>;
clock-names = "ipg", "aclk", "mem";
sec_jr0: jr0@1000 {
sec_jr0: jr@1000 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x1000 0x1000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr1: jr1@2000 {
sec_jr1: jr@2000 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x2000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr2: jr2@3000 {
sec_jr2: jr@3000 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x3000 0x1000>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;

8
arch/arm/boot/dts/imx7s.dtsi
View File

@@ -934,7 +934,7 @@ sai3: sai@308c0000 {
};
};
crypto: caam@30900000 {
crypto: crypto@30900000 {
compatible = "fsl,sec-v4.0";
#address-cells = <1>;
#size-cells = <1>;
@@ -945,19 +945,19 @@ crypto: caam@30900000 {
<&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
clock-names = "ipg", "aclk";
sec_jr0: jr0@1000 {
sec_jr0: jr@1000 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x1000 0x1000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr1: jr1@2000 {
sec_jr1: jr@2000 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x2000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr2: jr1@3000 {
sec_jr2: jr@3000 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x3000 0x1000>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;

4
arch/arm/boot/dts/imx7ulp.dtsi
View File

@@ -132,13 +132,13 @@ crypto: crypto@40240000 {
<&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>;
clock-names = "aclk", "ipg";
sec_jr0: jr0@1000 {
sec_jr0: jr@1000 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x1000 0x1000>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr1: jr1@2000 {
sec_jr1: jr@2000 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x2000 0x1000>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;