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staging: r8188eu: Add files for new driver - part 12
This commit adds files odm_HWConfig.c and odm_interface.c. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Larry Finger
committed by
Greg Kroah-Hartman
Greg Kroah-Hartman
parent
18b0950e02
commit
6c984c81fe
596
drivers/staging/rtl8188eu/hal/odm_HWConfig.c
Normal file
596
drivers/staging/rtl8188eu/hal/odm_HWConfig.c
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@@ -0,0 +1,596 @@
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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/* include files */
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#include "odm_precomp.h"
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#define READ_AND_CONFIG READ_AND_CONFIG_MP
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#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm))
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#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(dm_odm))
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static u8 odm_QueryRxPwrPercentage(s8 AntPower)
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{
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if ((AntPower <= -100) || (AntPower >= 20))
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return 0;
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else if (AntPower >= 0)
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return 100;
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else
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return 100+AntPower;
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}
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/* 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */
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/* IF other SW team do not support the feature, remove this section.?? */
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static s32 odm_sig_patch_lenove(struct odm_dm_struct *dm_odm, s32 CurrSig)
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{
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return 0;
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}
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static s32 odm_sig_patch_netcore(struct odm_dm_struct *dm_odm, s32 CurrSig)
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{
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return 0;
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}
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static s32 odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s32 CurrSig)
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{
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s32 RetSig = 0;
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if ((dm_odm->SupportInterface == ODM_ITRF_USB) ||
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(dm_odm->SupportInterface == ODM_ITRF_SDIO)) {
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if (CurrSig >= 51 && CurrSig <= 100)
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RetSig = 100;
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else if (CurrSig >= 41 && CurrSig <= 50)
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RetSig = 80 + ((CurrSig - 40)*2);
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else if (CurrSig >= 31 && CurrSig <= 40)
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RetSig = 66 + (CurrSig - 30);
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else if (CurrSig >= 21 && CurrSig <= 30)
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RetSig = 54 + (CurrSig - 20);
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else if (CurrSig >= 10 && CurrSig <= 20)
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RetSig = 42 + (((CurrSig - 10) * 2) / 3);
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else if (CurrSig >= 5 && CurrSig <= 9)
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RetSig = 22 + (((CurrSig - 5) * 3) / 2);
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else if (CurrSig >= 1 && CurrSig <= 4)
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RetSig = 6 + (((CurrSig - 1) * 3) / 2);
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else
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RetSig = CurrSig;
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}
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return RetSig;
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}
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static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig)
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{
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if ((dm_odm->SupportPlatform == ODM_MP) &&
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(dm_odm->SupportInterface != ODM_ITRF_PCIE) && /* USB & SDIO */
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(dm_odm->PatchID == 10))
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return odm_sig_patch_netcore(dm_odm, CurrSig);
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else if ((dm_odm->SupportPlatform == ODM_MP) &&
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(dm_odm->SupportInterface == ODM_ITRF_PCIE) &&
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(dm_odm->PatchID == 19))
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return odm_sig_patch_lenove(dm_odm, CurrSig);
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else
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return odm_SignalScaleMapping_92CSeries(dm_odm, CurrSig);
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}
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/* pMgntInfo->CustomerID == RT_CID_819x_Lenovo */
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static u8 odm_SQ_process_patch_RT_CID_819x_Lenovo(struct odm_dm_struct *dm_odm,
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u8 isCCKrate, u8 PWDB_ALL, u8 path, u8 RSSI)
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{
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return 0;
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}
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static u8 odm_EVMdbToPercentage(s8 Value)
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{
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/* -33dB~0dB to 0%~99% */
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s8 ret_val;
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ret_val = Value;
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if (ret_val >= 0)
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ret_val = 0;
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if (ret_val <= -33)
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ret_val = -33;
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ret_val = 0 - ret_val;
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ret_val *= 3;
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if (ret_val == 99)
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ret_val = 100;
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return ret_val;
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}
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static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
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struct odm_phy_status_info *pPhyInfo,
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u8 *pPhyStatus,
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struct odm_per_pkt_info *pPktinfo)
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{
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struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table;
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u8 i, Max_spatial_stream;
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s8 rx_pwr[4], rx_pwr_all = 0;
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u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
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u8 RSSI, total_rssi = 0;
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u8 isCCKrate = 0;
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u8 rf_rx_num = 0;
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u8 cck_highpwr = 0;
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u8 LNA_idx, VGA_idx;
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struct phy_status_rpt *pPhyStaRpt = (struct phy_status_rpt *)pPhyStatus;
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isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
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pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;
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pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
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if (isCCKrate) {
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u8 report;
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u8 cck_agc_rpt;
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dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
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/* (1)Hardware does not provide RSSI for CCK */
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/* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
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cck_highpwr = dm_odm->bCckHighPower;
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cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ;
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/* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
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/* The RSSI formula should be modified according to the gain table */
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/* In 88E, cck_highpwr is always set to 1 */
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if (dm_odm->SupportICType & (ODM_RTL8188E|ODM_RTL8812)) {
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LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
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VGA_idx = (cck_agc_rpt & 0x1F);
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switch (LNA_idx) {
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case 7:
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if (VGA_idx <= 27)
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rx_pwr_all = -100 + 2*(27-VGA_idx); /* VGA_idx = 27~2 */
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else
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rx_pwr_all = -100;
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break;
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case 6:
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rx_pwr_all = -48 + 2*(2-VGA_idx); /* VGA_idx = 2~0 */
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break;
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case 5:
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rx_pwr_all = -42 + 2*(7-VGA_idx); /* VGA_idx = 7~5 */
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break;
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case 4:
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rx_pwr_all = -36 + 2*(7-VGA_idx); /* VGA_idx = 7~4 */
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break;
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case 3:
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rx_pwr_all = -24 + 2*(7-VGA_idx); /* VGA_idx = 7~0 */
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break;
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case 2:
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if (cck_highpwr)
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rx_pwr_all = -12 + 2*(5-VGA_idx); /* VGA_idx = 5~0 */
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else
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rx_pwr_all = -6 + 2*(5-VGA_idx);
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break;
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case 1:
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rx_pwr_all = 8-2*VGA_idx;
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break;
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case 0:
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rx_pwr_all = 14-2*VGA_idx;
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break;
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default:
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break;
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}
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rx_pwr_all += 6;
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PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
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if (!cck_highpwr) {
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if (PWDB_ALL >= 80)
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PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;
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else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
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PWDB_ALL += 3;
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if (PWDB_ALL > 100)
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PWDB_ALL = 100;
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}
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} else {
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if (!cck_highpwr) {
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report = (cck_agc_rpt & 0xc0)>>6;
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switch (report) {
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/* 03312009 modified by cosa */
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/* Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion */
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/* Note: different RF with the different RNA gain. */
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case 0x3:
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rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
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break;
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case 0x2:
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rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
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break;
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case 0x1:
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rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
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break;
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case 0x0:
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rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
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break;
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}
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} else {
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report = (cck_agc_rpt & 0x60)>>5;
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switch (report) {
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case 0x3:
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rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ;
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break;
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case 0x2:
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rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1);
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break;
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case 0x1:
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rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1);
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break;
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case 0x0:
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rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1);
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break;
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}
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}
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PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
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/* Modification for ext-LNA board */
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if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
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if ((cck_agc_rpt>>7) == 0) {
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PWDB_ALL = (PWDB_ALL > 94) ? 100 : (PWDB_ALL+6);
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} else {
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if (PWDB_ALL > 38)
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PWDB_ALL -= 16;
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else
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PWDB_ALL = (PWDB_ALL <= 16) ? (PWDB_ALL>>2) : (PWDB_ALL-12);
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}
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/* CCK modification */
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if (PWDB_ALL > 25 && PWDB_ALL <= 60)
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PWDB_ALL += 6;
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} else {/* Modification for int-LNA board */
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if (PWDB_ALL > 99)
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PWDB_ALL -= 8;
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else if (PWDB_ALL > 50 && PWDB_ALL <= 68)
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PWDB_ALL += 4;
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}
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}
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pPhyInfo->RxPWDBAll = PWDB_ALL;
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pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
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pPhyInfo->RecvSignalPower = rx_pwr_all;
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/* (3) Get Signal Quality (EVM) */
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if (pPktinfo->bPacketMatchBSSID) {
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u8 SQ, SQ_rpt;
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if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
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SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, 0, 0);
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} else if (pPhyInfo->RxPWDBAll > 40 && !dm_odm->bInHctTest) {
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SQ = 100;
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} else {
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SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
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if (SQ_rpt > 64)
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SQ = 0;
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else if (SQ_rpt < 20)
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SQ = 100;
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else
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SQ = ((64-SQ_rpt) * 100) / 44;
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}
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pPhyInfo->SignalQuality = SQ;
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pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;
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pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
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}
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} else { /* is OFDM rate */
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dm_odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
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/* (1)Get RSSI for HT rate */
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for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) {
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/* 2008/01/30 MH we will judge RF RX path now. */
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if (dm_odm->RFPathRxEnable & BIT(i))
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rf_rx_num++;
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rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain & 0x3F)*2) - 110;
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pPhyInfo->RxPwr[i] = rx_pwr[i];
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/* Translate DBM to percentage. */
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RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
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total_rssi += RSSI;
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/* Modification for ext-LNA board */
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if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
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if ((pPhyStaRpt->path_agc[i].trsw) == 1)
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RSSI = (RSSI > 94) ? 100 : (RSSI + 6);
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else
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RSSI = (RSSI <= 16) ? (RSSI >> 3) : (RSSI - 16);
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if ((RSSI <= 34) && (RSSI >= 4))
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RSSI -= 4;
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}
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pPhyInfo->RxMIMOSignalStrength[i] = (u8)RSSI;
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/* Get Rx snr value in DB */
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pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
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dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
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/* Record Signal Strength for next packet */
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if (pPktinfo->bPacketMatchBSSID) {
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if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
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if (i == ODM_RF_PATH_A)
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pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, i, RSSI);
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}
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}
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}
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/* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
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rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110;
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PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
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PWDB_ALL_BT = PWDB_ALL;
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pPhyInfo->RxPWDBAll = PWDB_ALL;
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pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;
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pPhyInfo->RxPower = rx_pwr_all;
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pPhyInfo->RecvSignalPower = rx_pwr_all;
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if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
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/* do nothing */
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} else {
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/* (3)EVM of HT rate */
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if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15)
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Max_spatial_stream = 2; /* both spatial stream make sense */
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else
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Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
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for (i = 0; i < Max_spatial_stream; i++) {
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/* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
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/* fill most significant bit to "zero" when doing shifting operation which may change a negative */
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/* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */
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EVM = odm_EVMdbToPercentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */
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if (pPktinfo->bPacketMatchBSSID) {
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if (i == ODM_RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */
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pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
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pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
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}
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}
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}
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}
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/* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */
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/* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */
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if (isCCKrate) {
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pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, PWDB_ALL));/* PWDB_ALL; */
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} else {
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if (rf_rx_num != 0)
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pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, total_rssi /= rf_rx_num));
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}
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/* For 92C/92D HW (Hybrid) Antenna Diversity */
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pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;
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/* For 88E HW Antenna Diversity */
|
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dm_odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;
|
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dm_odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;
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dm_odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;
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}
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void odm_Init_RSSIForDM(struct odm_dm_struct *dm_odm)
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{
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}
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static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
|
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struct odm_phy_status_info *pPhyInfo,
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struct odm_per_pkt_info *pPktinfo)
|
||||
{
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s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK;
|
||||
s32 UndecoratedSmoothedOFDM, RSSI_Ave;
|
||||
u8 isCCKrate = 0;
|
||||
u8 RSSI_max, RSSI_min, i;
|
||||
u32 OFDM_pkt = 0;
|
||||
u32 Weighting = 0;
|
||||
struct sta_info *pEntry;
|
||||
|
||||
if (pPktinfo->StationID == 0xFF)
|
||||
return;
|
||||
pEntry = dm_odm->pODM_StaInfo[pPktinfo->StationID];
|
||||
if (!IS_STA_VALID(pEntry))
|
||||
return;
|
||||
if ((!pPktinfo->bPacketMatchBSSID))
|
||||
return;
|
||||
|
||||
isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
|
||||
|
||||
/* Smart Antenna Debug Message------------------ */
|
||||
if (dm_odm->SupportICType == ODM_RTL8188E) {
|
||||
u8 antsel_tr_mux;
|
||||
struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable;
|
||||
|
||||
if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) {
|
||||
if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) {
|
||||
if (pPktinfo->bPacketToSelf) {
|
||||
antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
|
||||
(pDM_FatTable->antsel_rx_keep_1<<1) |
|
||||
pDM_FatTable->antsel_rx_keep_0;
|
||||
pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll;
|
||||
pDM_FatTable->antRSSIcnt[antsel_tr_mux]++;
|
||||
}
|
||||
}
|
||||
} else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) {
|
||||
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
|
||||
antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
|
||||
(pDM_FatTable->antsel_rx_keep_1<<1) | pDM_FatTable->antsel_rx_keep_0;
|
||||
ODM_AntselStatistics_88E(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll);
|
||||
}
|
||||
}
|
||||
}
|
||||
/* Smart Antenna Debug Message------------------ */
|
||||
|
||||
UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK;
|
||||
UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;
|
||||
UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
|
||||
|
||||
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
|
||||
if (!isCCKrate) { /* ofdm rate */
|
||||
if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0) {
|
||||
RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
|
||||
} else {
|
||||
if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]) {
|
||||
RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
|
||||
RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
|
||||
} else {
|
||||
RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
|
||||
RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
|
||||
}
|
||||
if ((RSSI_max - RSSI_min) < 3)
|
||||
RSSI_Ave = RSSI_max;
|
||||
else if ((RSSI_max - RSSI_min) < 6)
|
||||
RSSI_Ave = RSSI_max - 1;
|
||||
else if ((RSSI_max - RSSI_min) < 10)
|
||||
RSSI_Ave = RSSI_max - 2;
|
||||
else
|
||||
RSSI_Ave = RSSI_max - 3;
|
||||
}
|
||||
|
||||
/* 1 Process OFDM RSSI */
|
||||
if (UndecoratedSmoothedOFDM <= 0) { /* initialize */
|
||||
UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll;
|
||||
} else {
|
||||
if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedOFDM) {
|
||||
UndecoratedSmoothedOFDM =
|
||||
(((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
|
||||
(RSSI_Ave)) / (Rx_Smooth_Factor);
|
||||
UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;
|
||||
} else {
|
||||
UndecoratedSmoothedOFDM =
|
||||
(((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
|
||||
(RSSI_Ave)) / (Rx_Smooth_Factor);
|
||||
}
|
||||
}
|
||||
|
||||
pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0;
|
||||
|
||||
} else {
|
||||
RSSI_Ave = pPhyInfo->RxPWDBAll;
|
||||
|
||||
/* 1 Process CCK RSSI */
|
||||
if (UndecoratedSmoothedCCK <= 0) { /* initialize */
|
||||
UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll;
|
||||
} else {
|
||||
if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedCCK) {
|
||||
UndecoratedSmoothedCCK =
|
||||
((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) +
|
||||
pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
|
||||
UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
|
||||
} else {
|
||||
UndecoratedSmoothedCCK =
|
||||
((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) +
|
||||
pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
|
||||
}
|
||||
}
|
||||
pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1;
|
||||
}
|
||||
/* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */
|
||||
if (pEntry->rssi_stat.ValidBit >= 64)
|
||||
pEntry->rssi_stat.ValidBit = 64;
|
||||
else
|
||||
pEntry->rssi_stat.ValidBit++;
|
||||
|
||||
for (i = 0; i < pEntry->rssi_stat.ValidBit; i++)
|
||||
OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap>>i)&BIT0;
|
||||
|
||||
if (pEntry->rssi_stat.ValidBit == 64) {
|
||||
Weighting = ((OFDM_pkt<<4) > 64) ? 64 : (OFDM_pkt<<4);
|
||||
UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6;
|
||||
} else {
|
||||
if (pEntry->rssi_stat.ValidBit != 0)
|
||||
UndecoratedSmoothedPWDB = (OFDM_pkt * UndecoratedSmoothedOFDM +
|
||||
(pEntry->rssi_stat.ValidBit-OFDM_pkt) *
|
||||
UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit;
|
||||
else
|
||||
UndecoratedSmoothedPWDB = 0;
|
||||
}
|
||||
pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
|
||||
pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM;
|
||||
pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
|
||||
}
|
||||
}
|
||||
|
||||
/* Endianness before calling this API */
|
||||
static void ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct *dm_odm,
|
||||
struct odm_phy_status_info *pPhyInfo,
|
||||
u8 *pPhyStatus,
|
||||
struct odm_per_pkt_info *pPktinfo)
|
||||
{
|
||||
odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus,
|
||||
pPktinfo);
|
||||
if (dm_odm->RSSI_test) {
|
||||
/* Select the packets to do RSSI checking for antenna switching. */
|
||||
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)
|
||||
ODM_SwAntDivChkPerPktRssi(dm_odm, pPktinfo->StationID, pPhyInfo);
|
||||
} else {
|
||||
odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo);
|
||||
}
|
||||
}
|
||||
|
||||
void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm,
|
||||
struct odm_phy_status_info *pPhyInfo,
|
||||
u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo)
|
||||
{
|
||||
ODM_PhyStatusQuery_92CSeries(dm_odm, pPhyInfo, pPhyStatus, pPktinfo);
|
||||
}
|
||||
|
||||
/* For future use. */
|
||||
void ODM_MacStatusQuery(struct odm_dm_struct *dm_odm, u8 *mac_stat,
|
||||
u8 macid, bool pkt_match_bssid,
|
||||
bool pkttoself, bool pkt_beacon)
|
||||
{
|
||||
/* 2011/10/19 Driver team will handle in the future. */
|
||||
}
|
||||
|
||||
enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *dm_odm,
|
||||
enum ODM_RF_RADIO_PATH content,
|
||||
enum ODM_RF_RADIO_PATH rfpath)
|
||||
{
|
||||
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===>ODM_ConfigRFWithHeaderFile\n"));
|
||||
if (dm_odm->SupportICType == ODM_RTL8188E) {
|
||||
if (rfpath == ODM_RF_PATH_A)
|
||||
READ_AND_CONFIG(8188E, _RadioA_1T_);
|
||||
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_A:Rtl8188ERadioA_1TArray\n"));
|
||||
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_B:Rtl8188ERadioB_1TArray\n"));
|
||||
}
|
||||
|
||||
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("ODM_ConfigRFWithHeaderFile: Radio No %x\n", rfpath));
|
||||
return HAL_STATUS_SUCCESS;
|
||||
}
|
||||
|
||||
enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *dm_odm,
|
||||
enum odm_bb_config_type config_tp)
|
||||
{
|
||||
if (dm_odm->SupportICType == ODM_RTL8188E) {
|
||||
if (config_tp == CONFIG_BB_PHY_REG) {
|
||||
READ_AND_CONFIG(8188E, _PHY_REG_1T_);
|
||||
} else if (config_tp == CONFIG_BB_AGC_TAB) {
|
||||
READ_AND_CONFIG(8188E, _AGC_TAB_1T_);
|
||||
} else if (config_tp == CONFIG_BB_PHY_REG_PG) {
|
||||
READ_AND_CONFIG(8188E, _PHY_REG_PG_);
|
||||
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
|
||||
(" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8188EPHY_REG_PGArray\n"));
|
||||
}
|
||||
}
|
||||
return HAL_STATUS_SUCCESS;
|
||||
}
|
||||
|
||||
enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *dm_odm)
|
||||
{
|
||||
u8 result = HAL_STATUS_SUCCESS;
|
||||
if (dm_odm->SupportICType == ODM_RTL8188E)
|
||||
result = READ_AND_CONFIG(8188E, _MAC_REG_);
|
||||
return result;
|
||||
}
|
||||
203
drivers/staging/rtl8188eu/hal/odm_interface.c
Normal file
203
drivers/staging/rtl8188eu/hal/odm_interface.c
Normal file
@@ -0,0 +1,203 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include "odm_precomp.h"
|
||||
/* ODM IO Relative API. */
|
||||
|
||||
u8 ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr)
|
||||
{
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
return rtw_read8(Adapter, RegAddr);
|
||||
}
|
||||
|
||||
u16 ODM_Read2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr)
|
||||
{
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
return rtw_read16(Adapter, RegAddr);
|
||||
}
|
||||
|
||||
u32 ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr)
|
||||
{
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
return rtw_read32(Adapter, RegAddr);
|
||||
}
|
||||
|
||||
void ODM_Write1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u8 Data)
|
||||
{
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
rtw_write8(Adapter, RegAddr, Data);
|
||||
}
|
||||
|
||||
void ODM_Write2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u16 Data)
|
||||
{
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
rtw_write16(Adapter, RegAddr, Data);
|
||||
}
|
||||
|
||||
void ODM_Write4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 Data)
|
||||
{
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
rtw_write32(Adapter, RegAddr, Data);
|
||||
}
|
||||
|
||||
void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data)
|
||||
{
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
|
||||
}
|
||||
|
||||
u32 ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask)
|
||||
{
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
|
||||
}
|
||||
|
||||
void ODM_SetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data)
|
||||
{
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
|
||||
}
|
||||
|
||||
u32 ODM_GetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask)
|
||||
{
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
|
||||
}
|
||||
|
||||
void ODM_SetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
|
||||
{
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, RegAddr, BitMask, Data);
|
||||
}
|
||||
|
||||
u32 ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u32 RegAddr, u32 BitMask)
|
||||
{
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
return PHY_QueryRFReg(Adapter, (enum rf_radio_path)eRFPath, RegAddr, BitMask);
|
||||
}
|
||||
|
||||
/* ODM Memory relative API. */
|
||||
void ODM_AllocateMemory(struct odm_dm_struct *pDM_Odm, void **pPtr, u32 length)
|
||||
{
|
||||
*pPtr = rtw_zvmalloc(length);
|
||||
}
|
||||
|
||||
/* length could be ignored, used to detect memory leakage. */
|
||||
void ODM_FreeMemory(struct odm_dm_struct *pDM_Odm, void *pPtr, u32 length)
|
||||
{
|
||||
rtw_vmfree(pPtr, length);
|
||||
}
|
||||
|
||||
s32 ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2, u32 length)
|
||||
{
|
||||
return _rtw_memcmp(pBuf1, pBuf2, length);
|
||||
}
|
||||
|
||||
/* ODM MISC relative API. */
|
||||
void ODM_AcquireSpinLock(struct odm_dm_struct *pDM_Odm, enum RT_SPINLOCK_TYPE type)
|
||||
{
|
||||
}
|
||||
|
||||
void ODM_ReleaseSpinLock(struct odm_dm_struct *pDM_Odm, enum RT_SPINLOCK_TYPE type)
|
||||
{
|
||||
}
|
||||
|
||||
/* Work item relative API. FOr MP driver only~! */
|
||||
void ODM_InitializeWorkItem(struct odm_dm_struct *pDM_Odm, void *pRtWorkItem,
|
||||
RT_WORKITEM_CALL_BACK RtWorkItemCallback,
|
||||
void *pContext, const char *szID)
|
||||
{
|
||||
}
|
||||
|
||||
void ODM_StartWorkItem(void *pRtWorkItem)
|
||||
{
|
||||
}
|
||||
|
||||
void ODM_StopWorkItem(void *pRtWorkItem)
|
||||
{
|
||||
}
|
||||
|
||||
void ODM_FreeWorkItem(void *pRtWorkItem)
|
||||
{
|
||||
}
|
||||
|
||||
void ODM_ScheduleWorkItem(void *pRtWorkItem)
|
||||
{
|
||||
}
|
||||
|
||||
void ODM_IsWorkItemScheduled(void *pRtWorkItem)
|
||||
{
|
||||
}
|
||||
|
||||
/* ODM Timer relative API. */
|
||||
void ODM_StallExecution(u32 usDelay)
|
||||
{
|
||||
rtw_udelay_os(usDelay);
|
||||
}
|
||||
|
||||
void ODM_delay_ms(u32 ms)
|
||||
{
|
||||
rtw_mdelay_os(ms);
|
||||
}
|
||||
|
||||
void ODM_delay_us(u32 us)
|
||||
{
|
||||
rtw_udelay_os(us);
|
||||
}
|
||||
|
||||
void ODM_sleep_ms(u32 ms)
|
||||
{
|
||||
rtw_msleep_os(ms);
|
||||
}
|
||||
|
||||
void ODM_sleep_us(u32 us)
|
||||
{
|
||||
rtw_usleep_os(us);
|
||||
}
|
||||
|
||||
void ODM_SetTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer, u32 msDelay)
|
||||
{
|
||||
_set_timer(pTimer, msDelay); /* ms */
|
||||
}
|
||||
|
||||
void ODM_InitializeTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer,
|
||||
void *CallBackFunc, void *pContext,
|
||||
const char *szID)
|
||||
{
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
_init_timer(pTimer, Adapter->pnetdev, CallBackFunc, pDM_Odm);
|
||||
}
|
||||
|
||||
void ODM_CancelTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer)
|
||||
{
|
||||
_cancel_timer_ex(pTimer);
|
||||
}
|
||||
|
||||
void ODM_ReleaseTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer)
|
||||
{
|
||||
}
|
||||
|
||||
/* ODM FW relative API. */
|
||||
u32 ODM_FillH2CCmd(u8 *pH2CBuffer, u32 H2CBufferLen, u32 CmdNum,
|
||||
u32 *pElementID, u32 *pCmdLen,
|
||||
u8 **pCmbBuffer, u8 *CmdStartSeq)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
Reference in New Issue
Block a user