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drm/nouveau/gr/gf100-: stop using NV_PGRAPH_FECS_CTXSW_MAILBOX_CLEAR

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This doesn't work on Ampere for some reason, switch to directly modifying
NV_PGRAPH_FECS_CTXSW_MAILBOX instead.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
Ben Skeggs
2022-06-01 20:48:07 +10:00
parent 78a43c7e3b
commit 6c55b5947b
1 changed files with 7 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
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@@ -752,7 +752,7 @@ gf100_gr_fecs_ctrl_ctxsw(struct gf100_gr *gr, u32 mthd)
struct nvkm_device *device = gr->base.engine.subdev.device;
nvkm_wr32(device, 0x409804, 0xffffffff);
nvkm_wr32(device, 0x409840, 0xffffffff);
nvkm_wr32(device, 0x409800, 0x00000000);
nvkm_wr32(device, 0x409500, 0xffffffff);
nvkm_wr32(device, 0x409504, mthd);
nvkm_msec(device, 2000,
@@ -801,7 +801,7 @@ gf100_gr_fecs_bind_pointer(struct gf100_gr *gr, u32 inst)
{
struct nvkm_device *device = gr->base.engine.subdev.device;
nvkm_wr32(device, 0x409840, 0x00000030);
nvkm_mask(device, 0x409800, 0x00000030, 0x00000000);
nvkm_wr32(device, 0x409500, inst);
nvkm_wr32(device, 0x409504, 0x00000003);
nvkm_msec(device, 2000,
@@ -892,7 +892,7 @@ gf100_gr_fecs_discover_pm_image_size(struct gf100_gr *gr, u32 *psize)
{
struct nvkm_device *device = gr->base.engine.subdev.device;
nvkm_wr32(device, 0x409840, 0xffffffff);
nvkm_wr32(device, 0x409800, 0x00000000);
nvkm_wr32(device, 0x409500, 0x00000000);
nvkm_wr32(device, 0x409504, 0x00000025);
nvkm_msec(device, 2000,
@@ -908,7 +908,7 @@ gf100_gr_fecs_discover_zcull_image_size(struct gf100_gr *gr, u32 *psize)
{
struct nvkm_device *device = gr->base.engine.subdev.device;
nvkm_wr32(device, 0x409840, 0xffffffff);
nvkm_wr32(device, 0x409800, 0x00000000);
nvkm_wr32(device, 0x409500, 0x00000000);
nvkm_wr32(device, 0x409504, 0x00000016);
nvkm_msec(device, 2000,
@@ -924,7 +924,7 @@ gf100_gr_fecs_discover_image_size(struct gf100_gr *gr, u32 *psize)
{
struct nvkm_device *device = gr->base.engine.subdev.device;
nvkm_wr32(device, 0x409840, 0xffffffff);
nvkm_wr32(device, 0x409800, 0x00000000);
nvkm_wr32(device, 0x409500, 0x00000000);
nvkm_wr32(device, 0x409504, 0x00000010);
nvkm_msec(device, 2000,
@@ -940,7 +940,7 @@ gf100_gr_fecs_set_watchdog_timeout(struct gf100_gr *gr, u32 timeout)
{
struct nvkm_device *device = gr->base.engine.subdev.device;
nvkm_wr32(device, 0x409840, 0xffffffff);
nvkm_wr32(device, 0x409800, 0x00000000);
nvkm_wr32(device, 0x409500, timeout);
nvkm_wr32(device, 0x409504, 0x00000021);
}
@@ -1746,7 +1746,7 @@ gf100_gr_init_ctxctl_ext(struct gf100_gr *gr)
nvkm_mc_unk260(device, 1);
/* start both of them running */
nvkm_wr32(device, 0x409840, 0xffffffff);
nvkm_wr32(device, 0x409800, 0x00000000);
nvkm_wr32(device, 0x41a10c, 0x00000000);
nvkm_wr32(device, 0x40910c, 0x00000000);