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drm/amdgpu: add IP's FW information to devcoredump
Add FW information of all the IP's in the devcoredump. Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Sunil Khatri
committed by
Alex Deucher
Alex Deucher
parent
108ab31be9
commit
6a0e1bafd7
@@ -25,6 +25,7 @@
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#include <generated/utsrelease.h>
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#include <linux/devcoredump.h>
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#include "amdgpu_dev_coredump.h"
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#include "atom.h"
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#ifndef CONFIG_DEV_COREDUMP
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void amdgpu_coredump(struct amdgpu_device *adev, bool vram_lost,
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@@ -69,6 +70,130 @@ const char *hw_ip_names[MAX_HWIP] = {
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[PCIE_HWIP] = "PCIE",
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};
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static void amdgpu_devcoredump_fw_info(struct amdgpu_device *adev,
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struct drm_printer *p)
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{
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uint32_t version;
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uint32_t feature;
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uint8_t smu_program, smu_major, smu_minor, smu_debug;
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struct atom_context *ctx = adev->mode_info.atom_context;
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drm_printf(p, "VCE feature version: %u, fw version: 0x%08x\n",
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adev->vce.fb_version, adev->vce.fw_version);
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drm_printf(p, "UVD feature version: %u, fw version: 0x%08x\n", 0,
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adev->uvd.fw_version);
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drm_printf(p, "GMC feature version: %u, fw version: 0x%08x\n", 0,
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adev->gmc.fw_version);
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drm_printf(p, "ME feature version: %u, fw version: 0x%08x\n",
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adev->gfx.me_feature_version, adev->gfx.me_fw_version);
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drm_printf(p, "PFP feature version: %u, fw version: 0x%08x\n",
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adev->gfx.pfp_feature_version, adev->gfx.pfp_fw_version);
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drm_printf(p, "CE feature version: %u, fw version: 0x%08x\n",
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adev->gfx.ce_feature_version, adev->gfx.ce_fw_version);
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drm_printf(p, "RLC feature version: %u, fw version: 0x%08x\n",
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adev->gfx.rlc_feature_version, adev->gfx.rlc_fw_version);
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drm_printf(p, "RLC SRLC feature version: %u, fw version: 0x%08x\n",
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adev->gfx.rlc_srlc_feature_version,
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adev->gfx.rlc_srlc_fw_version);
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drm_printf(p, "RLC SRLG feature version: %u, fw version: 0x%08x\n",
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adev->gfx.rlc_srlg_feature_version,
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adev->gfx.rlc_srlg_fw_version);
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drm_printf(p, "RLC SRLS feature version: %u, fw version: 0x%08x\n",
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adev->gfx.rlc_srls_feature_version,
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adev->gfx.rlc_srls_fw_version);
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drm_printf(p, "RLCP feature version: %u, fw version: 0x%08x\n",
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adev->gfx.rlcp_ucode_feature_version,
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adev->gfx.rlcp_ucode_version);
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drm_printf(p, "RLCV feature version: %u, fw version: 0x%08x\n",
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adev->gfx.rlcv_ucode_feature_version,
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adev->gfx.rlcv_ucode_version);
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drm_printf(p, "MEC feature version: %u, fw version: 0x%08x\n",
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adev->gfx.mec_feature_version, adev->gfx.mec_fw_version);
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if (adev->gfx.mec2_fw)
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drm_printf(p, "MEC2 feature version: %u, fw version: 0x%08x\n",
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adev->gfx.mec2_feature_version,
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adev->gfx.mec2_fw_version);
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drm_printf(p, "IMU feature version: %u, fw version: 0x%08x\n", 0,
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adev->gfx.imu_fw_version);
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drm_printf(p, "PSP SOS feature version: %u, fw version: 0x%08x\n",
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adev->psp.sos.feature_version, adev->psp.sos.fw_version);
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drm_printf(p, "PSP ASD feature version: %u, fw version: 0x%08x\n",
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adev->psp.asd_context.bin_desc.feature_version,
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adev->psp.asd_context.bin_desc.fw_version);
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drm_printf(p, "TA XGMI feature version: 0x%08x, fw version: 0x%08x\n",
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adev->psp.xgmi_context.context.bin_desc.feature_version,
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adev->psp.xgmi_context.context.bin_desc.fw_version);
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drm_printf(p, "TA RAS feature version: 0x%08x, fw version: 0x%08x\n",
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adev->psp.ras_context.context.bin_desc.feature_version,
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adev->psp.ras_context.context.bin_desc.fw_version);
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drm_printf(p, "TA HDCP feature version: 0x%08x, fw version: 0x%08x\n",
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adev->psp.hdcp_context.context.bin_desc.feature_version,
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adev->psp.hdcp_context.context.bin_desc.fw_version);
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drm_printf(p, "TA DTM feature version: 0x%08x, fw version: 0x%08x\n",
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adev->psp.dtm_context.context.bin_desc.feature_version,
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adev->psp.dtm_context.context.bin_desc.fw_version);
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drm_printf(p, "TA RAP feature version: 0x%08x, fw version: 0x%08x\n",
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adev->psp.rap_context.context.bin_desc.feature_version,
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adev->psp.rap_context.context.bin_desc.fw_version);
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drm_printf(p,
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"TA SECURE DISPLAY feature version: 0x%08x, fw version: 0x%08x\n",
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adev->psp.securedisplay_context.context.bin_desc.feature_version,
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adev->psp.securedisplay_context.context.bin_desc.fw_version);
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/* SMC firmware */
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version = adev->pm.fw_version;
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smu_program = (version >> 24) & 0xff;
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smu_major = (version >> 16) & 0xff;
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smu_minor = (version >> 8) & 0xff;
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smu_debug = (version >> 0) & 0xff;
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drm_printf(p,
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"SMC feature version: %u, program: %d, fw version: 0x%08x (%d.%d.%d)\n",
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0, smu_program, version, smu_major, smu_minor, smu_debug);
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/* SDMA firmware */
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for (int i = 0; i < adev->sdma.num_instances; i++) {
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drm_printf(p,
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"SDMA%d feature version: %u, firmware version: 0x%08x\n",
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i, adev->sdma.instance[i].feature_version,
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adev->sdma.instance[i].fw_version);
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}
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drm_printf(p, "VCN feature version: %u, fw version: 0x%08x\n", 0,
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adev->vcn.fw_version);
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drm_printf(p, "DMCU feature version: %u, fw version: 0x%08x\n", 0,
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adev->dm.dmcu_fw_version);
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drm_printf(p, "DMCUB feature version: %u, fw version: 0x%08x\n", 0,
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adev->dm.dmcub_fw_version);
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drm_printf(p, "PSP TOC feature version: %u, fw version: 0x%08x\n",
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adev->psp.toc.feature_version, adev->psp.toc.fw_version);
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version = adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK;
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feature = (adev->mes.kiq_version & AMDGPU_MES_FEAT_VERSION_MASK) >>
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AMDGPU_MES_FEAT_VERSION_SHIFT;
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drm_printf(p, "MES_KIQ feature version: %u, fw version: 0x%08x\n",
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feature, version);
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version = adev->mes.sched_version & AMDGPU_MES_VERSION_MASK;
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feature = (adev->mes.sched_version & AMDGPU_MES_FEAT_VERSION_MASK) >>
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AMDGPU_MES_FEAT_VERSION_SHIFT;
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drm_printf(p, "MES feature version: %u, fw version: 0x%08x\n", feature,
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version);
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drm_printf(p, "VPE feature version: %u, fw version: 0x%08x\n",
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adev->vpe.feature_version, adev->vpe.fw_version);
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drm_printf(p, "\nVBIOS Information\n");
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drm_printf(p, "name: %s\n", ctx->name);
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drm_printf(p, "pn %s\n", ctx->vbios_pn);
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drm_printf(p, "version: %s\n", ctx->vbios_ver_str);
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drm_printf(p, "date: %s\n", ctx->date);
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}
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static ssize_t
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amdgpu_devcoredump_read(char *buffer, loff_t offset, size_t count,
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void *data, size_t datalen)
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@@ -118,6 +243,10 @@ amdgpu_devcoredump_read(char *buffer, loff_t offset, size_t count,
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}
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}
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/* IP firmware information */
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drm_printf(&p, "\nIP Firmwares\n");
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amdgpu_devcoredump_fw_info(coredump->adev, &p);
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if (coredump->ring) {
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drm_printf(&p, "\nRing timed out details\n");
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drm_printf(&p, "IP Type: %d Ring Name: %s\n",
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