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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-09 22:14:36 -04:00
drm/i915: Convert intel_cursor.c to struct intel_display
struct intel_display will replace struct drm_i915_private as the main thing for display code. Convert the cursor code to use it. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250206185533.32306-10-ville.syrjala@linux.intel.com
This commit is contained in:
@@ -344,7 +344,7 @@ int intel_crtc_init(struct intel_display *display, enum pipe pipe)
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crtc->plane_ids_mask |= BIT(plane->id);
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}
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cursor = intel_cursor_plane_create(dev_priv, pipe);
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cursor = intel_cursor_plane_create(display, pipe);
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if (IS_ERR(cursor)) {
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ret = PTR_ERR(cursor);
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goto fail;
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@@ -35,11 +35,10 @@ static const u32 intel_cursor_formats[] = {
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static u32 intel_cursor_base(const struct intel_plane_state *plane_state)
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{
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struct drm_i915_private *dev_priv =
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to_i915(plane_state->uapi.plane->dev);
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struct intel_display *display = to_intel_display(plane_state);
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u32 base;
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if (DISPLAY_INFO(dev_priv)->cursor_needs_physical)
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if (DISPLAY_INFO(display)->cursor_needs_physical)
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base = plane_state->phys_dma_addr;
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else
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base = intel_plane_ggtt_offset(plane_state);
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@@ -92,8 +91,7 @@ static bool intel_cursor_size_ok(const struct intel_plane_state *plane_state)
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static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
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{
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struct drm_i915_private *dev_priv =
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to_i915(plane_state->uapi.plane->dev);
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struct intel_display *display = to_intel_display(plane_state);
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unsigned int rotation = plane_state->hw.rotation;
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int src_x, src_y;
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u32 offset;
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@@ -114,7 +112,7 @@ static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
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plane_state, 0);
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if (src_x != 0 || src_y != 0) {
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drm_dbg_kms(&dev_priv->drm,
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drm_dbg_kms(display->drm,
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"Arbitrary cursor panning not supported\n");
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return -EINVAL;
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}
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@@ -127,7 +125,7 @@ static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
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src_x << 16, src_y << 16);
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/* ILK+ do this automagically in hardware */
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if (HAS_GMCH(dev_priv) && rotation & DRM_MODE_ROTATE_180) {
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if (HAS_GMCH(display) && rotation & DRM_MODE_ROTATE_180) {
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const struct drm_framebuffer *fb = plane_state->hw.fb;
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int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
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int src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
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@@ -145,14 +143,14 @@ static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
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static int intel_check_cursor(struct intel_crtc_state *crtc_state,
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struct intel_plane_state *plane_state)
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{
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struct intel_display *display = to_intel_display(plane_state);
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const struct drm_framebuffer *fb = plane_state->hw.fb;
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struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
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const struct drm_rect src = plane_state->uapi.src;
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const struct drm_rect dst = plane_state->uapi.dst;
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int ret;
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if (fb && fb->modifier != DRM_FORMAT_MOD_LINEAR) {
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drm_dbg_kms(&i915->drm, "cursor cannot be tiled\n");
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drm_dbg_kms(display->drm, "cursor cannot be tiled\n");
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return -EINVAL;
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}
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@@ -233,8 +231,8 @@ static bool i845_cursor_size_ok(const struct intel_plane_state *plane_state)
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static int i845_check_cursor(struct intel_crtc_state *crtc_state,
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struct intel_plane_state *plane_state)
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{
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struct intel_display *display = to_intel_display(plane_state);
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const struct drm_framebuffer *fb = plane_state->hw.fb;
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struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
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int ret;
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ret = intel_check_cursor(crtc_state, plane_state);
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@@ -247,14 +245,14 @@ static int i845_check_cursor(struct intel_crtc_state *crtc_state,
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/* Check for which cursor types we support */
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if (!i845_cursor_size_ok(plane_state)) {
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drm_dbg_kms(&i915->drm,
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drm_dbg_kms(display->drm,
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"Cursor dimension %dx%d not supported\n",
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drm_rect_width(&plane_state->uapi.dst),
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drm_rect_height(&plane_state->uapi.dst));
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return -EINVAL;
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}
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drm_WARN_ON(&i915->drm, plane_state->uapi.visible &&
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drm_WARN_ON(display->drm, plane_state->uapi.visible &&
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plane_state->view.color_plane[0].mapping_stride != fb->pitches[0]);
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switch (fb->pitches[0]) {
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@@ -264,7 +262,7 @@ static int i845_check_cursor(struct intel_crtc_state *crtc_state,
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case 2048:
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break;
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default:
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drm_dbg_kms(&i915->drm, "Invalid cursor stride (%u)\n",
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drm_dbg_kms(display->drm, "Invalid cursor stride (%u)\n",
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fb->pitches[0]);
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return -EINVAL;
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}
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@@ -280,7 +278,7 @@ static void i845_cursor_update_arm(struct intel_dsb *dsb,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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{
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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struct intel_display *display = to_intel_display(plane);
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u32 cntl = 0, base = 0, pos = 0, size = 0;
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if (plane_state && plane_state->uapi.visible) {
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@@ -302,17 +300,17 @@ static void i845_cursor_update_arm(struct intel_dsb *dsb,
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if (plane->cursor.base != base ||
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plane->cursor.size != size ||
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plane->cursor.cntl != cntl) {
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intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), 0);
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intel_de_write_fw(dev_priv, CURBASE(dev_priv, PIPE_A), base);
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intel_de_write_fw(dev_priv, CURSIZE(dev_priv, PIPE_A), size);
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intel_de_write_fw(dev_priv, CURPOS(dev_priv, PIPE_A), pos);
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intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), cntl);
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intel_de_write_fw(display, CURCNTR(display, PIPE_A), 0);
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intel_de_write_fw(display, CURBASE(display, PIPE_A), base);
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intel_de_write_fw(display, CURSIZE(display, PIPE_A), size);
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intel_de_write_fw(display, CURPOS(display, PIPE_A), pos);
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intel_de_write_fw(display, CURCNTR(display, PIPE_A), cntl);
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plane->cursor.base = base;
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plane->cursor.size = size;
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plane->cursor.cntl = cntl;
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} else {
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intel_de_write_fw(dev_priv, CURPOS(dev_priv, PIPE_A), pos);
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intel_de_write_fw(display, CURPOS(display, PIPE_A), pos);
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}
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}
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@@ -327,7 +325,6 @@ static bool i845_cursor_get_hw_state(struct intel_plane *plane,
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enum pipe *pipe)
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{
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struct intel_display *display = to_intel_display(plane);
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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enum intel_display_power_domain power_domain;
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intel_wakeref_t wakeref;
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bool ret;
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@@ -337,7 +334,7 @@ static bool i845_cursor_get_hw_state(struct intel_plane *plane,
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if (!wakeref)
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return false;
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ret = intel_de_read(dev_priv, CURCNTR(dev_priv, PIPE_A)) & CURSOR_ENABLE;
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ret = intel_de_read(display, CURCNTR(display, PIPE_A)) & CURSOR_ENABLE;
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*pipe = PIPE_A;
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@@ -383,11 +380,11 @@ static unsigned int i9xx_cursor_min_alignment(struct intel_plane *plane,
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static u32 i9xx_cursor_ctl_crtc(const struct intel_crtc_state *crtc_state)
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{
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struct intel_display *display = to_intel_display(crtc_state);
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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u32 cntl = 0;
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if (DISPLAY_VER(dev_priv) >= 11)
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if (DISPLAY_VER(display) >= 11)
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return cntl;
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if (crtc_state->gamma_enable)
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@@ -396,7 +393,7 @@ static u32 i9xx_cursor_ctl_crtc(const struct intel_crtc_state *crtc_state)
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if (crtc_state->csc_enable)
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cntl |= MCURSOR_PIPE_CSC_ENABLE;
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if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
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if (DISPLAY_VER(display) < 5 && !display->platform.g4x)
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cntl |= MCURSOR_PIPE_SEL(crtc->pipe);
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return cntl;
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@@ -405,11 +402,10 @@ static u32 i9xx_cursor_ctl_crtc(const struct intel_crtc_state *crtc_state)
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static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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{
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struct drm_i915_private *dev_priv =
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to_i915(plane_state->uapi.plane->dev);
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struct intel_display *display = to_intel_display(plane_state);
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u32 cntl = 0;
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if (IS_SANDYBRIDGE(dev_priv) || IS_IVYBRIDGE(dev_priv))
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if (display->platform.sandybridge || display->platform.ivybridge)
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cntl |= MCURSOR_TRICKLE_FEED_DISABLE;
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switch (drm_rect_width(&plane_state->uapi.dst)) {
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@@ -431,7 +427,7 @@ static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state,
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cntl |= MCURSOR_ROTATE_180;
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/* Wa_22012358565:adl-p */
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if (DISPLAY_VER(dev_priv) == 13)
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if (DISPLAY_VER(display) == 13)
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cntl |= MCURSOR_ARB_SLOTS(1);
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return cntl;
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@@ -439,8 +435,7 @@ static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state,
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static bool i9xx_cursor_size_ok(const struct intel_plane_state *plane_state)
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{
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struct drm_i915_private *dev_priv =
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to_i915(plane_state->uapi.plane->dev);
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struct intel_display *display = to_intel_display(plane_state);
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int width = drm_rect_width(&plane_state->uapi.dst);
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int height = drm_rect_height(&plane_state->uapi.dst);
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@@ -463,7 +458,7 @@ static bool i9xx_cursor_size_ok(const struct intel_plane_state *plane_state)
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* cursor is not rotated. Everything else requires square
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* cursors.
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*/
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if (HAS_CUR_FBC(dev_priv) &&
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if (HAS_CUR_FBC(display) &&
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plane_state->hw.rotation & DRM_MODE_ROTATE_0) {
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if (height < 8 || height > width)
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return false;
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@@ -478,8 +473,8 @@ static bool i9xx_cursor_size_ok(const struct intel_plane_state *plane_state)
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static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,
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struct intel_plane_state *plane_state)
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{
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struct intel_display *display = to_intel_display(plane_state);
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struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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const struct drm_framebuffer *fb = plane_state->hw.fb;
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enum pipe pipe = plane->pipe;
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int ret;
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@@ -494,19 +489,19 @@ static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,
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/* Check for which cursor types we support */
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if (!i9xx_cursor_size_ok(plane_state)) {
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drm_dbg(&dev_priv->drm,
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drm_dbg(display->drm,
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"Cursor dimension %dx%d not supported\n",
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drm_rect_width(&plane_state->uapi.dst),
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drm_rect_height(&plane_state->uapi.dst));
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return -EINVAL;
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}
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drm_WARN_ON(&dev_priv->drm, plane_state->uapi.visible &&
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drm_WARN_ON(display->drm, plane_state->uapi.visible &&
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plane_state->view.color_plane[0].mapping_stride != fb->pitches[0]);
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if (fb->pitches[0] !=
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drm_rect_width(&plane_state->uapi.dst) * fb->format->cpp[0]) {
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drm_dbg_kms(&dev_priv->drm,
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drm_dbg_kms(display->drm,
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"Invalid cursor stride (%u) (cursor width %d)\n",
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fb->pitches[0],
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drm_rect_width(&plane_state->uapi.dst));
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@@ -523,9 +518,9 @@ static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,
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* display power well must be turned off and on again.
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* Refuse the put the cursor into that compromised position.
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*/
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if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_C &&
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if (display->platform.cherryview && pipe == PIPE_C &&
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plane_state->uapi.visible && plane_state->uapi.dst.x1 < 0) {
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drm_dbg_kms(&dev_priv->drm,
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drm_dbg_kms(display->drm,
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"CHV cursor C not allowed to straddle the left screen edge\n");
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return -EINVAL;
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}
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@@ -539,7 +534,7 @@ static void i9xx_cursor_disable_sel_fetch_arm(struct intel_dsb *dsb,
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struct intel_plane *plane,
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const struct intel_crtc_state *crtc_state)
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{
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struct intel_display *display = to_intel_display(plane->base.dev);
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struct intel_display *display = to_intel_display(plane);
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enum pipe pipe = plane->pipe;
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if (!crtc_state->enable_psr2_sel_fetch)
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@@ -553,8 +548,7 @@ static void wa_16021440873(struct intel_dsb *dsb,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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{
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struct intel_display *display = to_intel_display(plane->base.dev);
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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struct intel_display *display = to_intel_display(plane);
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u32 ctl = plane_state->ctl;
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int et_y_position = drm_rect_height(&crtc_state->pipe_src) + 1;
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enum pipe pipe = plane->pipe;
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@@ -564,7 +558,7 @@ static void wa_16021440873(struct intel_dsb *dsb,
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intel_de_write_dsb(display, dsb, SEL_FETCH_CUR_CTL(pipe), ctl);
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intel_de_write_dsb(display, dsb, CURPOS_ERLY_TPT(dev_priv, pipe),
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intel_de_write_dsb(display, dsb, CURPOS_ERLY_TPT(display, pipe),
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CURSOR_POS_Y(et_y_position));
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}
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@@ -573,8 +567,7 @@ static void i9xx_cursor_update_sel_fetch_arm(struct intel_dsb *dsb,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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{
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struct intel_display *display = to_intel_display(plane->base.dev);
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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struct intel_display *display = to_intel_display(plane);
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enum pipe pipe = plane->pipe;
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if (!crtc_state->enable_psr2_sel_fetch)
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@@ -585,7 +578,7 @@ static void i9xx_cursor_update_sel_fetch_arm(struct intel_dsb *dsb,
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u32 val = intel_cursor_position(crtc_state, plane_state,
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true);
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intel_de_write_dsb(display, dsb, CURPOS_ERLY_TPT(dev_priv, pipe), val);
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intel_de_write_dsb(display, dsb, CURPOS_ERLY_TPT(display, pipe), val);
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}
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intel_de_write_dsb(display, dsb, SEL_FETCH_CUR_CTL(pipe), plane_state->ctl);
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@@ -659,8 +652,7 @@ static void i9xx_cursor_update_arm(struct intel_dsb *dsb,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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{
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struct intel_display *display = to_intel_display(plane->base.dev);
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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struct intel_display *display = to_intel_display(plane);
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enum pipe pipe = plane->pipe;
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u32 cntl = 0, base = 0, pos = 0, fbc_ctl = 0;
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@@ -698,7 +690,7 @@ static void i9xx_cursor_update_arm(struct intel_dsb *dsb,
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* the CURCNTR write arms the update.
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*/
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if (DISPLAY_VER(dev_priv) >= 9)
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if (DISPLAY_VER(display) >= 9)
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skl_write_cursor_wm(dsb, plane, crtc_state);
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if (plane_state)
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@@ -709,18 +701,18 @@ static void i9xx_cursor_update_arm(struct intel_dsb *dsb,
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if (plane->cursor.base != base ||
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plane->cursor.size != fbc_ctl ||
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plane->cursor.cntl != cntl) {
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if (HAS_CUR_FBC(dev_priv))
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intel_de_write_dsb(display, dsb, CUR_FBC_CTL(dev_priv, pipe), fbc_ctl);
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intel_de_write_dsb(display, dsb, CURCNTR(dev_priv, pipe), cntl);
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intel_de_write_dsb(display, dsb, CURPOS(dev_priv, pipe), pos);
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intel_de_write_dsb(display, dsb, CURBASE(dev_priv, pipe), base);
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if (HAS_CUR_FBC(display))
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intel_de_write_dsb(display, dsb, CUR_FBC_CTL(display, pipe), fbc_ctl);
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intel_de_write_dsb(display, dsb, CURCNTR(display, pipe), cntl);
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intel_de_write_dsb(display, dsb, CURPOS(display, pipe), pos);
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intel_de_write_dsb(display, dsb, CURBASE(display, pipe), base);
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plane->cursor.base = base;
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plane->cursor.size = fbc_ctl;
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plane->cursor.cntl = cntl;
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} else {
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intel_de_write_dsb(display, dsb, CURPOS(dev_priv, pipe), pos);
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intel_de_write_dsb(display, dsb, CURBASE(dev_priv, pipe), base);
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intel_de_write_dsb(display, dsb, CURPOS(display, pipe), pos);
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intel_de_write_dsb(display, dsb, CURBASE(display, pipe), base);
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}
|
||||
}
|
||||
|
||||
@@ -735,7 +727,6 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane *plane,
|
||||
enum pipe *pipe)
|
||||
{
|
||||
struct intel_display *display = to_intel_display(plane);
|
||||
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
|
||||
enum intel_display_power_domain power_domain;
|
||||
intel_wakeref_t wakeref;
|
||||
bool ret;
|
||||
@@ -751,11 +742,11 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane *plane,
|
||||
if (!wakeref)
|
||||
return false;
|
||||
|
||||
val = intel_de_read(dev_priv, CURCNTR(dev_priv, plane->pipe));
|
||||
val = intel_de_read(display, CURCNTR(display, plane->pipe));
|
||||
|
||||
ret = val & MCURSOR_MODE_MASK;
|
||||
|
||||
if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv))
|
||||
if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
|
||||
*pipe = plane->pipe;
|
||||
else
|
||||
*pipe = REG_FIELD_GET(MCURSOR_PIPE_SEL_MASK, val);
|
||||
@@ -797,7 +788,7 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
|
||||
{
|
||||
struct intel_plane *plane = to_intel_plane(_plane);
|
||||
struct intel_crtc *crtc = to_intel_crtc(_crtc);
|
||||
struct drm_i915_private *i915 = to_i915(plane->base.dev);
|
||||
struct intel_display *display = to_intel_display(plane);
|
||||
struct intel_plane_state *old_plane_state =
|
||||
to_intel_plane_state(plane->base.state);
|
||||
struct intel_plane_state *new_plane_state;
|
||||
@@ -901,7 +892,7 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
|
||||
|
||||
intel_psr_lock(crtc_state);
|
||||
|
||||
if (!drm_WARN_ON(&i915->drm, drm_crtc_vblank_get(&crtc->base))) {
|
||||
if (!drm_WARN_ON(display->drm, drm_crtc_vblank_get(&crtc->base))) {
|
||||
/*
|
||||
* TODO: maybe check if we're still in PSR
|
||||
* and skip the vblank evasion entirely?
|
||||
@@ -967,8 +958,8 @@ static const struct drm_plane_funcs intel_cursor_plane_funcs = {
|
||||
|
||||
static void intel_cursor_add_size_hints_property(struct intel_plane *plane)
|
||||
{
|
||||
struct drm_i915_private *i915 = to_i915(plane->base.dev);
|
||||
const struct drm_mode_config *config = &i915->drm.mode_config;
|
||||
struct intel_display *display = to_intel_display(plane);
|
||||
const struct drm_mode_config *config = &display->drm->mode_config;
|
||||
struct drm_plane_size_hint hints[4];
|
||||
int size, max_size, num_hints = 0;
|
||||
|
||||
@@ -976,7 +967,7 @@ static void intel_cursor_add_size_hints_property(struct intel_plane *plane)
|
||||
|
||||
/* for simplicity only enumerate the supported square+POT sizes */
|
||||
for (size = 64; size <= max_size; size *= 2) {
|
||||
if (drm_WARN_ON(&i915->drm, num_hints >= ARRAY_SIZE(hints)))
|
||||
if (drm_WARN_ON(display->drm, num_hints >= ARRAY_SIZE(hints)))
|
||||
break;
|
||||
|
||||
hints[num_hints].width = size;
|
||||
@@ -988,10 +979,9 @@ static void intel_cursor_add_size_hints_property(struct intel_plane *plane)
|
||||
}
|
||||
|
||||
struct intel_plane *
|
||||
intel_cursor_plane_create(struct drm_i915_private *dev_priv,
|
||||
intel_cursor_plane_create(struct intel_display *display,
|
||||
enum pipe pipe)
|
||||
{
|
||||
struct intel_display *display = &dev_priv->display;
|
||||
struct intel_plane *cursor;
|
||||
int ret, zpos;
|
||||
u64 *modifiers;
|
||||
@@ -1005,7 +995,7 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
|
||||
cursor->id = PLANE_CURSOR;
|
||||
cursor->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, cursor->id);
|
||||
|
||||
if (IS_I845G(dev_priv) || IS_I865G(dev_priv)) {
|
||||
if (display->platform.i845g || display->platform.i865g) {
|
||||
cursor->max_stride = i845_cursor_max_stride;
|
||||
cursor->min_alignment = i845_cursor_min_alignment;
|
||||
cursor->update_arm = i845_cursor_update_arm;
|
||||
@@ -1015,9 +1005,9 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
|
||||
} else {
|
||||
cursor->max_stride = i9xx_cursor_max_stride;
|
||||
|
||||
if (IS_I830(dev_priv))
|
||||
if (display->platform.i830)
|
||||
cursor->min_alignment = i830_cursor_min_alignment;
|
||||
else if (IS_I85X(dev_priv))
|
||||
else if (display->platform.i85x)
|
||||
cursor->min_alignment = i85x_cursor_min_alignment;
|
||||
else
|
||||
cursor->min_alignment = i9xx_cursor_min_alignment;
|
||||
@@ -1034,12 +1024,12 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
|
||||
cursor->cursor.base = ~0;
|
||||
cursor->cursor.cntl = ~0;
|
||||
|
||||
if (IS_I845G(dev_priv) || IS_I865G(dev_priv) || HAS_CUR_FBC(dev_priv))
|
||||
if (display->platform.i845g || display->platform.i865g || HAS_CUR_FBC(display))
|
||||
cursor->cursor.size = ~0;
|
||||
|
||||
modifiers = intel_fb_plane_get_modifiers(display, INTEL_PLANE_CAP_NONE);
|
||||
|
||||
ret = drm_universal_plane_init(&dev_priv->drm, &cursor->base,
|
||||
ret = drm_universal_plane_init(display->drm, &cursor->base,
|
||||
0, &intel_cursor_plane_funcs,
|
||||
intel_cursor_formats,
|
||||
ARRAY_SIZE(intel_cursor_formats),
|
||||
@@ -1052,7 +1042,7 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
|
||||
if (ret)
|
||||
goto fail;
|
||||
|
||||
if (DISPLAY_VER(dev_priv) >= 4)
|
||||
if (DISPLAY_VER(display) >= 4)
|
||||
drm_plane_create_rotation_property(&cursor->base,
|
||||
DRM_MODE_ROTATE_0,
|
||||
DRM_MODE_ROTATE_0 |
|
||||
@@ -1060,10 +1050,10 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
|
||||
|
||||
intel_cursor_add_size_hints_property(cursor);
|
||||
|
||||
zpos = DISPLAY_RUNTIME_INFO(dev_priv)->num_sprites[pipe] + 1;
|
||||
zpos = DISPLAY_RUNTIME_INFO(display)->num_sprites[pipe] + 1;
|
||||
drm_plane_create_zpos_immutable_property(&cursor->base, zpos);
|
||||
|
||||
if (DISPLAY_VER(dev_priv) >= 12)
|
||||
if (DISPLAY_VER(display) >= 12)
|
||||
drm_plane_enable_fb_damage_clips(&cursor->base);
|
||||
|
||||
intel_plane_helper_add(cursor);
|
||||
|
||||
@@ -7,12 +7,12 @@
|
||||
#define _INTEL_CURSOR_H_
|
||||
|
||||
enum pipe;
|
||||
struct drm_i915_private;
|
||||
struct intel_display;
|
||||
struct intel_plane;
|
||||
struct kthread_work;
|
||||
|
||||
struct intel_plane *
|
||||
intel_cursor_plane_create(struct drm_i915_private *dev_priv,
|
||||
intel_cursor_plane_create(struct intel_display *display,
|
||||
enum pipe pipe);
|
||||
|
||||
void intel_cursor_unpin_work(struct kthread_work *base);
|
||||
|
||||
Reference in New Issue
Block a user