wifi: rtw89: phy: define BB wrap data for RTL8922D variants

The BB wrap is a hardware block to control TX power. Since RTL8922D has
many variants with different CID and RFE types, prepare flow and dummy
struct adopt to configuration functions for coming patches.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20260511070148.25257-2-pkshih@realtek.com
This commit is contained in:
Ping-Ke Shih
2026-05-11 15:01:38 +08:00
parent 4c13e00cc6
commit 695e7f2e79
10 changed files with 64 additions and 0 deletions

View File

@@ -7312,6 +7312,10 @@ int rtw89_chip_info_setup(struct rtw89_dev *rtwdev)
if (ret)
goto out;
ret = rtw89_chip_data_setup(rtwdev);
if (ret)
goto out;
rtw89_core_setup_rfe_parms(rtwdev);
rtwdev->ps_mode = rtw89_update_ps_mode(rtwdev);

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@@ -29,6 +29,7 @@ struct rtw89_phy_sts_ie10;
struct rtw89_debugfs;
struct rtw89_regd_data;
struct rtw89_wow_cam_info;
struct rtw89_bb_wrap_data;
struct rtw89_fw_cmd_ofld_info;
extern const struct ieee80211_ops rtw89_ops;
@@ -3851,6 +3852,7 @@ struct rtw89_chip_ops {
enum rtw89_efuse_block block);
int (*read_phycap)(struct rtw89_dev *rtwdev, u8 *phycap_map);
void (*fem_setup)(struct rtw89_dev *rtwdev);
int (*data_setup)(struct rtw89_dev *rtwdev);
void (*rfe_gpio)(struct rtw89_dev *rtwdev);
void (*rfk_hw_init)(struct rtw89_dev *rtwdev);
void (*rfk_init)(struct rtw89_dev *rtwdev);
@@ -4597,6 +4599,7 @@ struct rtw89_bb_stat_cfg {
};
struct rtw89_phy_info {
const struct rtw89_bb_wrap_data *bb_wrap_data;
struct rtw89_bb_stat_cfg bb_stat_cfg;
};
@@ -7484,6 +7487,16 @@ static inline void rtw89_chip_fem_setup(struct rtw89_dev *rtwdev)
chip->ops->fem_setup(rtwdev);
}
static inline int rtw89_chip_data_setup(struct rtw89_dev *rtwdev)
{
const struct rtw89_chip_info *chip = rtwdev->chip;
if (!chip->ops->data_setup)
return 0;
return chip->ops->data_setup(rtwdev);
}
static inline void rtw89_chip_rfe_gpio(struct rtw89_dev *rtwdev)
{
const struct rtw89_chip_info *chip = rtwdev->chip;

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@@ -572,6 +572,9 @@ struct rtw89_phy_rfk_log_fmt {
const struct rtw89_fw_element_hdr *elm[RTW89_PHY_C2H_RFK_LOG_FUNC_NUM];
};
struct rtw89_bb_wrap_data {
};
struct rtw89_phy_gen_def {
u32 cr_base;
u32 physt_bmp_start;

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@@ -2556,6 +2556,7 @@ static const struct rtw89_chip_ops rtw8851b_chip_ops = {
.read_efuse = rtw8851b_read_efuse,
.read_phycap = rtw8851b_read_phycap,
.fem_setup = NULL,
.data_setup = NULL,
.rfe_gpio = rtw8851b_rfe_gpio,
.rfk_hw_init = NULL,
.rfk_init = rtw8851b_rfk_init,

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@@ -2302,6 +2302,7 @@ static const struct rtw89_chip_ops rtw8852a_chip_ops = {
.read_efuse = rtw8852a_read_efuse,
.read_phycap = rtw8852a_read_phycap,
.fem_setup = rtw8852a_fem_setup,
.data_setup = NULL,
.rfe_gpio = NULL,
.rfk_hw_init = NULL,
.rfk_init = rtw8852a_rfk_init,

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@@ -883,6 +883,7 @@ static const struct rtw89_chip_ops rtw8852b_chip_ops = {
.read_efuse = rtw8852bx_read_efuse,
.read_phycap = rtw8852bx_read_phycap,
.fem_setup = NULL,
.data_setup = NULL,
.rfe_gpio = NULL,
.rfk_hw_init = NULL,
.rfk_init = rtw8852b_rfk_init,

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@@ -729,6 +729,7 @@ static const struct rtw89_chip_ops rtw8852bt_chip_ops = {
.read_efuse = rtw8852bx_read_efuse,
.read_phycap = rtw8852bx_read_phycap,
.fem_setup = NULL,
.data_setup = NULL,
.rfe_gpio = NULL,
.rfk_hw_init = NULL,
.rfk_init = rtw8852bt_rfk_init,

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@@ -3091,6 +3091,7 @@ static const struct rtw89_chip_ops rtw8852c_chip_ops = {
.read_efuse = rtw8852c_read_efuse,
.read_phycap = rtw8852c_read_phycap,
.fem_setup = NULL,
.data_setup = NULL,
.rfe_gpio = NULL,
.rfk_hw_init = NULL,
.rfk_init = rtw8852c_rfk_init,

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@@ -3086,6 +3086,7 @@ static const struct rtw89_chip_ops rtw8922a_chip_ops = {
.read_efuse = rtw8922a_read_efuse,
.read_phycap = rtw8922a_read_phycap,
.fem_setup = NULL,
.data_setup = NULL,
.rfe_gpio = NULL,
.rfk_hw_init = rtw8922a_rfk_hw_init,
.rfk_init = rtw8922a_rfk_init,

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@@ -286,6 +286,15 @@ static const struct rtw89_efuse_block_cfg rtw8922d_efuse_blocks[] = {
[RTW89_EFUSE_BLOCK_ADIE] = {.offset = 0x70000, .size = 0x10},
};
static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7025_default = {
};
static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_default = {
};
static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_rfe35_41_44 = {
};
static void rtw8922d_sel_bt_rx_path(struct rtw89_dev *rtwdev, u8 val,
enum rtw89_rf_path rx_path)
{
@@ -918,6 +927,34 @@ static void rtw8922d_power_trim(struct rtw89_dev *rtwdev)
rtw8922d_pad_bias_trim(rtwdev);
}
static int rtw8922d_data_setup(struct rtw89_dev *rtwdev)
{
const struct rtw89_bb_wrap_data *data;
struct rtw89_hal *hal = &rtwdev->hal;
bool rfe35_41_44 = false;
switch (rtwdev->efuse.rfe_type) {
case 35:
case 41:
case 44:
rfe35_41_44 = true;
break;
}
if (hal->cid == RTL8922D_CID7025) {
data = &rtw8922d_bb_wrap_data_7025_default;
} else {
if (rfe35_41_44)
data = &rtw8922d_bb_wrap_data_7090_rfe35_41_44;
else
data = &rtw8922d_bb_wrap_data_7090_default;
}
rtwdev->phy_info.bb_wrap_data = data;
return 0;
}
static void rtw8922d_set_channel_mac(struct rtw89_dev *rtwdev,
const struct rtw89_chan *chan,
u8 mac_idx)
@@ -2933,6 +2970,7 @@ static const struct rtw89_chip_ops rtw8922d_chip_ops = {
.read_efuse = rtw8922d_read_efuse,
.read_phycap = rtw8922d_read_phycap,
.fem_setup = NULL,
.data_setup = rtw8922d_data_setup,
.rfe_gpio = NULL,
.rfk_hw_init = rtw8922d_rfk_hw_init,
.rfk_init = rtw8922d_rfk_init,