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synced 2026-08-30 23:59:33 -04:00
wifi: rtw89: phy: define BB wrap data for RTL8922D variants
The BB wrap is a hardware block to control TX power. Since RTL8922D has many variants with different CID and RFE types, prepare flow and dummy struct adopt to configuration functions for coming patches. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260511070148.25257-2-pkshih@realtek.com
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@@ -7312,6 +7312,10 @@ int rtw89_chip_info_setup(struct rtw89_dev *rtwdev)
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if (ret)
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goto out;
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ret = rtw89_chip_data_setup(rtwdev);
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if (ret)
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goto out;
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rtw89_core_setup_rfe_parms(rtwdev);
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rtwdev->ps_mode = rtw89_update_ps_mode(rtwdev);
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@@ -29,6 +29,7 @@ struct rtw89_phy_sts_ie10;
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struct rtw89_debugfs;
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struct rtw89_regd_data;
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struct rtw89_wow_cam_info;
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struct rtw89_bb_wrap_data;
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struct rtw89_fw_cmd_ofld_info;
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extern const struct ieee80211_ops rtw89_ops;
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@@ -3851,6 +3852,7 @@ struct rtw89_chip_ops {
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enum rtw89_efuse_block block);
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int (*read_phycap)(struct rtw89_dev *rtwdev, u8 *phycap_map);
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void (*fem_setup)(struct rtw89_dev *rtwdev);
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int (*data_setup)(struct rtw89_dev *rtwdev);
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void (*rfe_gpio)(struct rtw89_dev *rtwdev);
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void (*rfk_hw_init)(struct rtw89_dev *rtwdev);
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void (*rfk_init)(struct rtw89_dev *rtwdev);
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@@ -4597,6 +4599,7 @@ struct rtw89_bb_stat_cfg {
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};
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struct rtw89_phy_info {
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const struct rtw89_bb_wrap_data *bb_wrap_data;
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struct rtw89_bb_stat_cfg bb_stat_cfg;
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};
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@@ -7484,6 +7487,16 @@ static inline void rtw89_chip_fem_setup(struct rtw89_dev *rtwdev)
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chip->ops->fem_setup(rtwdev);
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}
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static inline int rtw89_chip_data_setup(struct rtw89_dev *rtwdev)
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{
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const struct rtw89_chip_info *chip = rtwdev->chip;
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if (!chip->ops->data_setup)
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return 0;
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return chip->ops->data_setup(rtwdev);
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}
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static inline void rtw89_chip_rfe_gpio(struct rtw89_dev *rtwdev)
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{
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const struct rtw89_chip_info *chip = rtwdev->chip;
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@@ -572,6 +572,9 @@ struct rtw89_phy_rfk_log_fmt {
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const struct rtw89_fw_element_hdr *elm[RTW89_PHY_C2H_RFK_LOG_FUNC_NUM];
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};
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struct rtw89_bb_wrap_data {
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};
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struct rtw89_phy_gen_def {
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u32 cr_base;
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u32 physt_bmp_start;
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@@ -2556,6 +2556,7 @@ static const struct rtw89_chip_ops rtw8851b_chip_ops = {
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.read_efuse = rtw8851b_read_efuse,
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.read_phycap = rtw8851b_read_phycap,
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.fem_setup = NULL,
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.data_setup = NULL,
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.rfe_gpio = rtw8851b_rfe_gpio,
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.rfk_hw_init = NULL,
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.rfk_init = rtw8851b_rfk_init,
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@@ -2302,6 +2302,7 @@ static const struct rtw89_chip_ops rtw8852a_chip_ops = {
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.read_efuse = rtw8852a_read_efuse,
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.read_phycap = rtw8852a_read_phycap,
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.fem_setup = rtw8852a_fem_setup,
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.data_setup = NULL,
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.rfe_gpio = NULL,
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.rfk_hw_init = NULL,
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.rfk_init = rtw8852a_rfk_init,
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@@ -883,6 +883,7 @@ static const struct rtw89_chip_ops rtw8852b_chip_ops = {
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.read_efuse = rtw8852bx_read_efuse,
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.read_phycap = rtw8852bx_read_phycap,
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.fem_setup = NULL,
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.data_setup = NULL,
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.rfe_gpio = NULL,
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.rfk_hw_init = NULL,
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.rfk_init = rtw8852b_rfk_init,
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@@ -729,6 +729,7 @@ static const struct rtw89_chip_ops rtw8852bt_chip_ops = {
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.read_efuse = rtw8852bx_read_efuse,
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.read_phycap = rtw8852bx_read_phycap,
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.fem_setup = NULL,
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.data_setup = NULL,
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.rfe_gpio = NULL,
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.rfk_hw_init = NULL,
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.rfk_init = rtw8852bt_rfk_init,
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@@ -3091,6 +3091,7 @@ static const struct rtw89_chip_ops rtw8852c_chip_ops = {
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.read_efuse = rtw8852c_read_efuse,
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.read_phycap = rtw8852c_read_phycap,
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.fem_setup = NULL,
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.data_setup = NULL,
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.rfe_gpio = NULL,
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.rfk_hw_init = NULL,
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.rfk_init = rtw8852c_rfk_init,
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@@ -3086,6 +3086,7 @@ static const struct rtw89_chip_ops rtw8922a_chip_ops = {
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.read_efuse = rtw8922a_read_efuse,
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.read_phycap = rtw8922a_read_phycap,
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.fem_setup = NULL,
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.data_setup = NULL,
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.rfe_gpio = NULL,
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.rfk_hw_init = rtw8922a_rfk_hw_init,
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.rfk_init = rtw8922a_rfk_init,
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@@ -286,6 +286,15 @@ static const struct rtw89_efuse_block_cfg rtw8922d_efuse_blocks[] = {
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[RTW89_EFUSE_BLOCK_ADIE] = {.offset = 0x70000, .size = 0x10},
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};
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static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7025_default = {
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};
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static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_default = {
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};
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static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_rfe35_41_44 = {
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};
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static void rtw8922d_sel_bt_rx_path(struct rtw89_dev *rtwdev, u8 val,
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enum rtw89_rf_path rx_path)
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{
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@@ -918,6 +927,34 @@ static void rtw8922d_power_trim(struct rtw89_dev *rtwdev)
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rtw8922d_pad_bias_trim(rtwdev);
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}
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static int rtw8922d_data_setup(struct rtw89_dev *rtwdev)
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{
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const struct rtw89_bb_wrap_data *data;
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struct rtw89_hal *hal = &rtwdev->hal;
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bool rfe35_41_44 = false;
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switch (rtwdev->efuse.rfe_type) {
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case 35:
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case 41:
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case 44:
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rfe35_41_44 = true;
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break;
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}
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if (hal->cid == RTL8922D_CID7025) {
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data = &rtw8922d_bb_wrap_data_7025_default;
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} else {
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if (rfe35_41_44)
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data = &rtw8922d_bb_wrap_data_7090_rfe35_41_44;
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else
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data = &rtw8922d_bb_wrap_data_7090_default;
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}
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rtwdev->phy_info.bb_wrap_data = data;
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return 0;
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}
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static void rtw8922d_set_channel_mac(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan,
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u8 mac_idx)
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@@ -2933,6 +2970,7 @@ static const struct rtw89_chip_ops rtw8922d_chip_ops = {
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.read_efuse = rtw8922d_read_efuse,
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.read_phycap = rtw8922d_read_phycap,
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.fem_setup = NULL,
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.data_setup = rtw8922d_data_setup,
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.rfe_gpio = NULL,
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.rfk_hw_init = rtw8922d_rfk_hw_init,
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.rfk_init = rtw8922d_rfk_init,
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