drm/amdgpu: use VCN firmware offset for cache window

Since we are using the signed FW now, and also using PSP firmware loading,
but it's still potential to break driver when loading FW directly
instead of PSP, so we should add offset.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
James Zhu
2019-07-23 16:45:19 -04:00
committed by Alex Deucher
parent 668a9469f1
commit 6913848087

View File

@@ -396,11 +396,8 @@ static void vcn_v2_5_mc_resume(struct amdgpu_device *adev)
WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,
upper_32_bits(adev->vcn.inst[i].gpu_addr));
offset = size;
/* No signed header for now from firmware
WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0,
AMDGPU_UVD_FIRMWARE_OFFSET >> 3);
*/
WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0, 0);
}
WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE0, size);