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drm/dp: Add DPCD for configuring AS SDP for PR + VRR

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Add additional DPCDs required to be configured to support VRR with Panel
Replay. These DPCDs are specifically required for configuring Adaptive Sync
SDP and are introduced in DP v2.1.

v2:
 - Correct the shift for the bits. (Ville)
 - Add DP_PR_ prefix for the PR-related fields.
v3:
 - Use macro values in their shifted form to match the convention. (Ville)
v4:
 - Add macro for the mask. (Ville)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260428074457.3566918-5-ankit.k.nautiyal@intel.com
This commit is contained in:
Ankit Nautiyal
2026-04-28 13:14:52 +05:30
committed by Suraj Kandpal
parent 715e0fd96b
commit 69070f4d2d
1 changed files with 6 additions and 0 deletions
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6
include/drm/display/drm_dp.h
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@@ -718,6 +718,12 @@
#define DP_EXTENDED_DPRX_SLEEP_WAKE_TIMEOUT_GRANT 0x119 /* 1.4a */
# define DP_DPRX_SLEEP_WAKE_TIMEOUT_PERIOD_GRANTED (1 << 0)
#define PANEL_REPLAY_CONFIG3 0x11a /* DP 2.1 */
# define DP_PR_AS_SDP_SETUP_TIME_MASK (3 << 6)
# define DP_PR_AS_SDP_SETUP_TIME_T1 (0 << 6)
# define DP_PR_AS_SDP_SETUP_TIME_DYNAMIC (1 << 6) /* DP 2.1 Table 2-227 */
# define DP_PR_AS_SDP_SETUP_TIME_T2 (2 << 6)
#define DP_FEC_CONFIGURATION 0x120 /* 1.4 */
# define DP_FEC_READY (1 << 0)
# define DP_FEC_ERR_COUNT_SEL_MASK (7 << 1)