drm/i915: rename vlv_sideband*.[ch] to vlv_iosf_sb*.[ch]

Be more specific in the naming, and follow the existing function naming pattern of vlv_iosf_sb_*() in the file. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://lore.kernel.org/r/d3d97d34a197ba801c558c3fd72b29f9e5c783af.1747061743.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2026-02-22 00:39:33 -05:00 · 2025-05-12 17:56:52 +03:00
parent f77d8675c1
commit 6819b5a67e
22 changed files with 31 additions and 31 deletions
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -45,7 +45,7 @@ i915-y += \
 	intel_uncore.o \
 	intel_uncore_trace.o \
 	intel_wakeref.o \
-	vlv_sideband.o \
+	vlv_iosf_sb.o \
 	vlv_suspend.o

 # core peripheral code
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -16,7 +16,7 @@
 #include "intel_mchbar_regs.h"
 #include "intel_wm.h"
 #include "skl_watermark.h"
-#include "vlv_sideband.h"
+#include "vlv_iosf_sb.h"

 struct intel_watermark_params {
 	u16 fifo_size;
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -47,7 +47,7 @@
 #include "skl_watermark.h"
 #include "skl_watermark_regs.h"
 #include "vlv_dsi.h"
-#include "vlv_sideband.h"
+#include "vlv_iosf_sb.h"

 /**
 * DOC: CDCLK / RAWCLK
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -131,7 +131,7 @@
 #include "vlv_dsi.h"
 #include "vlv_dsi_pll.h"
 #include "vlv_dsi_regs.h"
-#include "vlv_sideband.h"
+#include "vlv_iosf_sb.h"

 static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_state);
 static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state);
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -27,7 +27,7 @@
 #include "intel_snps_phy.h"
 #include "skl_watermark.h"
 #include "skl_watermark_regs.h"
-#include "vlv_sideband.h"
+#include "vlv_iosf_sb.h"

 #define for_each_power_domain_well(__display, __power_well, __domain)	\
 	for_each_power_well((__display), __power_well)			\
--- a/drivers/gpu/drm/i915/display/intel_display_power_map.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c
@@ -10,7 +10,7 @@
 #include "intel_display_power_map.h"
 #include "intel_display_power_well.h"
 #include "intel_display_types.h"
-#include "vlv_sideband_reg.h"
+#include "vlv_iosf_sb_reg.h"

 #define __LIST_INLINE_ELEMS(__elem_type, ...) \
 	((__elem_type[]) { __VA_ARGS__ })
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -30,8 +30,8 @@
 #include "intel_vga.h"
 #include "skl_watermark.h"
 #include "vlv_dpio_phy_regs.h"
-#include "vlv_sideband.h"
-#include "vlv_sideband_reg.h"
+#include "vlv_iosf_sb.h"
+#include "vlv_iosf_sb_reg.h"

 struct i915_power_well_regs {
 	i915_reg_t bios;
--- a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
@@ -32,7 +32,7 @@
 #include "intel_dp.h"
 #include "intel_dpio_phy.h"
 #include "vlv_dpio_phy_regs.h"
-#include "vlv_sideband.h"
+#include "vlv_iosf_sb.h"

 /**
 * DOC: DPIO
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -22,7 +22,7 @@
 #include "intel_pps.h"
 #include "intel_snps_phy.h"
 #include "vlv_dpio_phy_regs.h"
-#include "vlv_sideband.h"
+#include "vlv_iosf_sb.h"

 struct intel_dpll_funcs {
 	int (*crtc_compute_clock)(struct intel_atomic_state *state,
--- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
@@ -49,7 +49,7 @@
 #include "intel_pps_regs.h"
 #include "vlv_dsi.h"
 #include "vlv_dsi_regs.h"
-#include "vlv_sideband.h"
+#include "vlv_iosf_sb.h"

 #define MIPI_TRANSFER_MODE_SHIFT	0
 #define MIPI_VIRTUAL_CHANNEL_SHIFT	1
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -49,7 +49,7 @@
 #include "vlv_dsi.h"
 #include "vlv_dsi_pll.h"
 #include "vlv_dsi_regs.h"
-#include "vlv_sideband.h"
+#include "vlv_iosf_sb.h"

 /* return pixels in terms of txbyteclkhs */
 static u16 txbyteclkhs(u16 pixels, int bpp, int lane_count,
--- a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
@@ -34,7 +34,7 @@
 #include "intel_dsi.h"
 #include "vlv_dsi_pll.h"
 #include "vlv_dsi_pll_regs.h"
-#include "vlv_sideband.h"
+#include "vlv_iosf_sb.h"

 static const u16 lfsr_converts[] = {
 	426, 469, 234, 373, 442, 221, 110, 311, 411,		/* 62 - 70 */
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
@@ -22,7 +22,7 @@
 #include "intel_rps.h"
 #include "intel_runtime_pm.h"
 #include "intel_uncore.h"
-#include "vlv_sideband.h"
+#include "vlv_iosf_sb.h"

 void intel_gt_pm_debugfs_forcewake_user_open(struct intel_gt *gt)
 {
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -23,7 +23,7 @@
 #include "intel_mchbar_regs.h"
 #include "intel_pcode.h"
 #include "intel_rps.h"
-#include "vlv_sideband.h"
+#include "vlv_iosf_sb.h"
 #include "../../../platform/x86/intel_ips.h"

 #define BUSY_MAX_EI	20u /* ms */
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -108,7 +108,7 @@
 #include "intel_pcode.h"
 #include "intel_region_ttm.h"
 #include "intel_sbi.h"
-#include "vlv_sideband.h"
+#include "vlv_iosf_sb.h"
 #include "vlv_suspend.h"

 static const struct drm_driver i915_drm_driver;
--- a/drivers/gpu/drm/i915/intel_clock_gating.c
+++ b/drivers/gpu/drm/i915/intel_clock_gating.c
@@ -37,7 +37,7 @@
 #include "i915_reg.h"
 #include "intel_clock_gating.h"
 #include "intel_mchbar_regs.h"
-#include "vlv_sideband.h"
+#include "vlv_iosf_sb.h"

 struct drm_i915_clock_gating_funcs {
 	void (*init_clock_gating)(struct drm_i915_private *i915);
--- a/drivers/gpu/drm/i915/soc/intel_dram.c
+++ b/drivers/gpu/drm/i915/soc/intel_dram.c
@@ -10,7 +10,7 @@
 #include "intel_dram.h"
 #include "intel_mchbar_regs.h"
 #include "intel_pcode.h"
-#include "vlv_sideband.h"
+#include "vlv_iosf_sb.h"

 struct dram_dimm_info {
 	u16 size;
--- a/drivers/gpu/drm/i915/vlv_sideband.c
+++ b/drivers/gpu/drm/i915/vlv_sideband.c
@@ -6,7 +6,7 @@
 #include "i915_drv.h"
 #include "i915_iosf_mbi.h"
 #include "i915_reg.h"
-#include "vlv_sideband.h"
+#include "vlv_iosf_sb.h"

 #include "display/intel_dpio_phy.h"

--- a/drivers/gpu/drm/i915/vlv_sideband.h
+++ b/drivers/gpu/drm/i915/vlv_sideband.h
@@ -3,13 +3,13 @@
 * Copyright © 2013-2021 Intel Corporation
 */

-#ifndef _VLV_SIDEBAND_H_
-#define _VLV_SIDEBAND_H_
+#ifndef _VLV_IOSF_SB_H_
+#define _VLV_IOSF_SB_H_

 #include <linux/bitops.h>
 #include <linux/types.h>

-#include "vlv_sideband_reg.h"
+#include "vlv_iosf_sb_reg.h"

 enum dpio_phy;
 struct drm_i915_private;
@@ -122,4 +122,4 @@ static inline void vlv_punit_put(struct drm_i915_private *i915)
 	vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_PUNIT));
 }

-#endif /* _VLV_SIDEBAND_H_ */
+#endif /* _VLV_IOSF_SB_H_ */
--- a/drivers/gpu/drm/i915/vlv_sideband_reg.h
+++ b/drivers/gpu/drm/i915/vlv_sideband_reg.h
@@ -3,8 +3,8 @@
 * Copyright © 2022 Intel Corporation
 */

-#ifndef _VLV_SIDEBAND_REG_H_
-#define _VLV_SIDEBAND_REG_H_
+#ifndef _VLV_IOSF_SB_REG_H_
+#define _VLV_IOSF_SB_REG_H_

 /* See configdb bunit SB addr map */
 #define BUNIT_REG_BISOC				0x11
@@ -177,4 +177,4 @@
 #define  CCK_FREQUENCY_STATUS_SHIFT		8
 #define  CCK_FREQUENCY_VALUES			(0x1f << 0)

-#endif /* _VLV_SIDEBAND_REG_H_ */
+#endif /* _VLV_IOSF_SB_REG_H_ */
--- a/drivers/gpu/drm/xe/compat-i915-headers/vlv_sideband.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/vlv_sideband.h
@@ -3,12 +3,12 @@
 * Copyright © 2013-2021 Intel Corporation
 */

-#ifndef _VLV_SIDEBAND_H_
-#define _VLV_SIDEBAND_H_
+#ifndef _VLV_IOSF_SB_H_
+#define _VLV_IOSF_SB_H_

 #include <linux/types.h>

-#include "vlv_sideband_reg.h"
+#include "vlv_iosf_sb_reg.h"

 enum pipe;
 struct drm_i915_private;
@@ -129,4 +129,4 @@ static inline void vlv_punit_put(struct drm_i915_private *i915)
 {
 }

-#endif /* _VLV_SIDEBAND_H_ */
+#endif /* _VLV_IOSF_SB_H_ */
--- a/drivers/gpu/drm/xe/compat-i915-headers/vlv_sideband_reg.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/vlv_sideband_reg.h
@@ -3,4 +3,4 @@
 * Copyright © 2023 Intel Corporation
 */

-#include "../../i915/vlv_sideband_reg.h"
+#include "../../i915/vlv_iosf_sb_reg.h"