arm64: dts: qcom: sm6115: add resets for sdhc_1

These are documented and supported everywhere, but not described in DT.
Add them.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240624120849.2550621-2-caleb.connolly@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Caleb Connolly
2024-06-24 14:08:36 +02:00
committed by Bjorn Andersson
parent 653f0a1e7d
commit 66d83a42f2

View File

@@ -1088,6 +1088,8 @@ sdhc_1: mmc@4744000 {
<&gcc GCC_SDCC1_ICE_CORE_CLK>;
clock-names = "iface", "core", "xo", "ice";
resets = <&gcc GCC_SDCC1_BCR>;
power-domains = <&rpmpd SM6115_VDDCX>;
operating-points-v2 = <&sdhc1_opp_table>;
interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG