drm/amd/pm: Add navi1x throttler translation

Perform dependent to independent throttle status translation
for navi1x.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Graham Sider
2021-06-07 09:35:56 -04:00
committed by Alex Deucher
parent f6b92e3313
commit 64cdee43a6

View File

@@ -238,6 +238,28 @@ static struct cmn2asic_mapping navi10_workload_map[PP_SMC_POWER_PROFILE_COUNT] =
WORKLOAD_MAP(PP_SMC_POWER_PROFILE_CUSTOM, WORKLOAD_PPLIB_CUSTOM_BIT),
};
static const uint8_t navi1x_throttler_map[] = {
[THROTTLER_TEMP_EDGE_BIT] = (SMU_THROTTLER_TEMP_EDGE_BIT),
[THROTTLER_TEMP_HOTSPOT_BIT] = (SMU_THROTTLER_TEMP_HOTSPOT_BIT),
[THROTTLER_TEMP_MEM_BIT] = (SMU_THROTTLER_TEMP_MEM_BIT),
[THROTTLER_TEMP_VR_GFX_BIT] = (SMU_THROTTLER_TEMP_VR_GFX_BIT),
[THROTTLER_TEMP_VR_MEM0_BIT] = (SMU_THROTTLER_TEMP_VR_MEM0_BIT),
[THROTTLER_TEMP_VR_MEM1_BIT] = (SMU_THROTTLER_TEMP_VR_MEM1_BIT),
[THROTTLER_TEMP_VR_SOC_BIT] = (SMU_THROTTLER_TEMP_VR_SOC_BIT),
[THROTTLER_TEMP_LIQUID0_BIT] = (SMU_THROTTLER_TEMP_LIQUID0_BIT),
[THROTTLER_TEMP_LIQUID1_BIT] = (SMU_THROTTLER_TEMP_LIQUID1_BIT),
[THROTTLER_TDC_GFX_BIT] = (SMU_THROTTLER_TDC_GFX_BIT),
[THROTTLER_TDC_SOC_BIT] = (SMU_THROTTLER_TDC_SOC_BIT),
[THROTTLER_PPT0_BIT] = (SMU_THROTTLER_PPT0_BIT),
[THROTTLER_PPT1_BIT] = (SMU_THROTTLER_PPT1_BIT),
[THROTTLER_PPT2_BIT] = (SMU_THROTTLER_PPT2_BIT),
[THROTTLER_PPT3_BIT] = (SMU_THROTTLER_PPT3_BIT),
[THROTTLER_FIT_BIT] = (SMU_THROTTLER_FIT_BIT),
[THROTTLER_PPM_BIT] = (SMU_THROTTLER_PPM_BIT),
[THROTTLER_APCC_BIT] = (SMU_THROTTLER_APCC_BIT),
};
static bool is_asic_secure(struct smu_context *smu)
{
struct amdgpu_device *adev = smu->adev;
@@ -2676,6 +2698,9 @@ static ssize_t navi10_get_legacy_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
gpu_metrics->throttle_status = metrics.ThrottlerStatus;
gpu_metrics->indep_throttle_status =
smu_cmn_get_indep_throttler_status(metrics.ThrottlerStatus,
navi1x_throttler_map);
gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
@@ -2753,6 +2778,9 @@ static ssize_t navi10_get_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
gpu_metrics->throttle_status = metrics.ThrottlerStatus;
gpu_metrics->indep_throttle_status =
smu_cmn_get_indep_throttler_status(metrics.ThrottlerStatus,
navi1x_throttler_map);
gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
@@ -2829,6 +2857,9 @@ static ssize_t navi12_get_legacy_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
gpu_metrics->throttle_status = metrics.ThrottlerStatus;
gpu_metrics->indep_throttle_status =
smu_cmn_get_indep_throttler_status(metrics.ThrottlerStatus,
navi1x_throttler_map);
gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
@@ -2911,6 +2942,9 @@ static ssize_t navi12_get_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
gpu_metrics->throttle_status = metrics.ThrottlerStatus;
gpu_metrics->indep_throttle_status =
smu_cmn_get_indep_throttler_status(metrics.ThrottlerStatus,
navi1x_throttler_map);
gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;