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drm/amd/display: Fix warnings in DC

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Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Harry Wentland
2017-02-24 11:31:23 -05:00
committed by Alex Deucher
parent 0d70570f71
commit 6480136967
4 changed files with 1 additions and 5 deletions
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2
drivers/gpu/drm/amd/display/dc/core/dc.c
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@@ -1068,7 +1068,6 @@ bool dc_pre_update_surfaces_to_stream(
int prev_disp_clk = core_dc->current_context->dispclk_khz;
struct dc_stream_status *stream_status = NULL;
struct validate_context *context;
struct validate_context *temp_context;
bool ret = true;
pre_surface_trace(dc, new_surfaces, new_surface_count);
@@ -1425,7 +1424,6 @@ void dc_update_surfaces_for_stream(struct dc *dc,
if (update_type == UPDATE_TYPE_FULL) {
for (j = 0; j < context->res_ctx.pool->pipe_count; j++) {
struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j];
struct core_stream *stream = pipe_ctx->stream;
if (pipe_ctx->surface != surface)
continue;

2
drivers/gpu/drm/amd/display/dc/core/dc_surface.c
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@@ -121,7 +121,7 @@ const struct dc_surface_status *dc_surface_get_status(
const struct dc_surface *dc_surface)
{
struct dc_surface_status *surface_status;
struct core_surface *core_surface = DC_SURFACE_TO_CORE(dc_surface);;
struct core_surface *core_surface = DC_SURFACE_TO_CORE(dc_surface);
struct core_dc *core_dc;
int i;

1
drivers/gpu/drm/amd/display/dc/dce/dce_abm.c
View File

@@ -292,7 +292,6 @@ static void dce_abm_init(struct abm *abm)
static bool dce_abm_set_level(struct abm *abm, uint32_t level)
{
struct dce_abm *abm_dce = TO_DCE_ABM(abm);
struct dc_context *ctx = abm_dce->base.ctx;
REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0,
100, 800);

1
drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c
View File

@@ -74,7 +74,6 @@ static bool dce110_timing_generator_v_disable_crtc(struct timing_generator *tg)
static void dce110_timing_generator_v_blank_crtc(struct timing_generator *tg)
{
struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg);
uint32_t addr = mmCRTCV_BLANK_CONTROL;
uint32_t value = dm_read_reg(tg->ctx, addr);