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octeontx2-af: cn10k: add workaround for ptp errata

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This patch adds workaround for PTP errata given below.

1. At the time of 1 sec rollover of nano-second counter,
   the nano-second counter is set to 0. However, it should
   be set to (existing counter_value - 10^9). This leads to
   an accumulating error in the timestamp value with each sec
   rollover.
2. Additionally, the nano-second counter currently is rolling
   over at 'h3B9A_C9FF. It should roll over at 'h3B9A_CA00.

The workaround for issue #1 is to speed up the ptp clock by
adjusting PTP_CLOCK_COMP register to the desired value to
compensate for the nanoseconds lost per each second.

The workaround for issue #2 is to slow down the ptp clock
such that the rollover occurs at ~1sec.

Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com>
Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com>
Signed-off-by: Rakesh Babu Saladi <rsaladi2@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Naveen Mamindlapalli
2022-02-21 12:15:08 +05:30
committed by David S. Miller
parent 74c1b2338e
commit 6426fc3aba
1 changed files with 80 additions and 7 deletions
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87
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
View File

@@ -51,9 +51,19 @@
#define PTP_TIMESTAMP 0xF20ULL
#define PTP_CLOCK_SEC 0xFD0ULL
#define CYCLE_MULT 1000
static struct ptp *first_ptp_block;
static const struct pci_device_id ptp_id_table[];
static bool cn10k_ptp_errata(struct ptp *ptp)
{
if (ptp->pdev->subsystem_device == PCI_SUBSYS_DEVID_CN10K_A_PTP ||
ptp->pdev->subsystem_device == PCI_SUBSYS_DEVID_CNF10K_A_PTP)
return true;
return false;
}
static bool is_ptp_tsfmt_sec_nsec(struct ptp *ptp)
{
if (ptp->pdev->subsystem_device == PCI_SUBSYS_DEVID_CN10K_A_PTP ||
@@ -86,6 +96,58 @@ static u64 read_ptp_tstmp_nsec(struct ptp *ptp)
return readq(ptp->reg_base + PTP_CLOCK_HI);
}
static u64 ptp_calc_adjusted_comp(u64 ptp_clock_freq)
{
u64 comp, adj = 0, cycles_per_sec, ns_drift = 0;
u32 ptp_clock_nsec, cycle_time;
int cycle;
/* Errata:
* Issue #1: At the time of 1 sec rollover of the nano-second counter,
* the nano-second counter is set to 0. However, it should be set to
* (existing counter_value - 10^9).
*
* Issue #2: The nano-second counter rolls over at 0x3B9A_C9FF.
* It should roll over at 0x3B9A_CA00.
*/
/* calculate ptp_clock_comp value */
comp = ((u64)1000000000ULL << 32) / ptp_clock_freq;
/* use CYCLE_MULT to avoid accuracy loss due to integer arithmetic */
cycle_time = NSEC_PER_SEC * CYCLE_MULT / ptp_clock_freq;
/* cycles per sec */
cycles_per_sec = ptp_clock_freq;
/* check whether ptp nanosecond counter rolls over early */
cycle = cycles_per_sec - 1;
ptp_clock_nsec = (cycle * comp) >> 32;
while (ptp_clock_nsec < NSEC_PER_SEC) {
if (ptp_clock_nsec == 0x3B9AC9FF)
goto calc_adj_comp;
cycle++;
ptp_clock_nsec = (cycle * comp) >> 32;
}
/* compute nanoseconds lost per second when nsec counter rolls over */
ns_drift = ptp_clock_nsec - NSEC_PER_SEC;
/* calculate ptp_clock_comp adjustment */
if (ns_drift > 0) {
adj = comp * ns_drift;
adj = adj / 1000000000ULL;
}
/* speed up the ptp clock to account for nanoseconds lost */
comp += adj;
return comp;
calc_adj_comp:
/* slow down the ptp clock to not rollover early */
adj = comp * cycle_time;
adj = adj / 1000000000ULL;
adj = adj / CYCLE_MULT;
comp -= adj;
return comp;
}
struct ptp *ptp_get(void)
{
struct ptp *ptp = first_ptp_block;
@@ -113,8 +175,8 @@ void ptp_put(struct ptp *ptp)
static int ptp_adjfine(struct ptp *ptp, long scaled_ppm)
{
bool neg_adj = false;
u64 comp;
u64 adj;
u32 freq, freq_adj;
u64 comp, adj;
s64 ppb;
if (scaled_ppm < 0) {
@@ -136,15 +198,22 @@ static int ptp_adjfine(struct ptp *ptp, long scaled_ppm)
* where tbase is the basic compensation value calculated
* initialy in the probe function.
*/
comp = ((u64)1000000000ull << 32) / ptp->clock_rate;
/* convert scaled_ppm to ppb */
ppb = 1 + scaled_ppm;
ppb *= 125;
ppb >>= 13;
adj = comp * ppb;
adj = div_u64(adj, 1000000000ull);
comp = neg_adj ? comp - adj : comp + adj;
if (cn10k_ptp_errata(ptp)) {
/* calculate the new frequency based on ppb */
freq_adj = (ptp->clock_rate * ppb) / 1000000000ULL;
freq = neg_adj ? ptp->clock_rate + freq_adj : ptp->clock_rate - freq_adj;
comp = ptp_calc_adjusted_comp(freq);
} else {
comp = ((u64)1000000000ull << 32) / ptp->clock_rate;
adj = comp * ppb;
adj = div_u64(adj, 1000000000ull);
comp = neg_adj ? comp - adj : comp + adj;
}
writeq(comp, ptp->reg_base + PTP_CLOCK_COMP);
return 0;
@@ -202,7 +271,11 @@ void ptp_start(struct ptp *ptp, u64 sclk, u32 ext_clk_freq, u32 extts)
writeq(0x1dcd650000000000, ptp->reg_base + PTP_PPS_HI_INCR);
writeq(0x1dcd650000000000, ptp->reg_base + PTP_PPS_LO_INCR);
clock_comp = ((u64)1000000000ull << 32) / ptp->clock_rate;
if (cn10k_ptp_errata(ptp))
clock_comp = ptp_calc_adjusted_comp(ptp->clock_rate);
else
clock_comp = ((u64)1000000000ull << 32) / ptp->clock_rate;
/* Initial compensation value to start the nanosecs counter */
writeq(clock_comp, ptp->reg_base + PTP_CLOCK_COMP);
}