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arm64: dts: qcom: sm8350: Add &tlmm gpio-line-names

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Add GPIO line names as described by the sm8350-hdk schematic.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117112537.1016250-1-rfoss@kernel.org
This commit is contained in:
Robert Foss
2023-01-17 12:25:37 +01:00
committed by Bjorn Andersson
parent 5f84c7c35d
commit 638b7ada91
1 changed files with 205 additions and 0 deletions
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205
arch/arm64/boot/dts/qcom/sm8350-hdk.dts
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@@ -386,6 +386,211 @@ &slpi {
&tlmm {
gpio-reserved-ranges = <52 8>;
gpio-line-names =
"APPS_I2C_SDA", /* GPIO_0 */
"APPS_I2C_SCL",
"FSA_INT_N",
"USER_LED3_EN",
"SMBUS_SDA_1P8",
"SMBUS_SCL_1P8",
"2M2_3P3_EN",
"ALERT_DUAL_M2_N",
"EXP_UART_CTS",
"EXP_UART_RFR",
"EXP_UART_TX", /* GPIO_10 */
"EXP_UART_RX",
"NC",
"NC",
"RCM_MARKER1",
"WSA0_EN",
"CAM1_RESET_N",
"CAM0_RESET_N",
"DEBUG_UART_TX",
"DEBUG_UART_RX",
"TS_I2C_SDA", /* GPIO_20 */
"TS_I2C_SCL",
"TS_RESET_N",
"TS_INT_N",
"DISP0_RESET_N",
"DISP1_RESET_N",
"ETH_RESET",
"RCM_MARKER2",
"CAM_DC_MIPI_MUX_EN",
"CAM_DC_MIPI_MUX_SEL",
"AFC_PHY_TA_D_PLUS", /* GPIO_30 */
"AFC_PHY_TA_D_MINUS",
"PM8008_1_IRQ",
"PM8008_1_RESET_N",
"PM8008_2_IRQ",
"PM8008_2_RESET_N",
"CAM_DC_I3C_SDA",
"CAM_DC_I3C_SCL",
"FP_INT_N",
"FP_WUHB_INT_N",
"SMB_SPMI_DATA", /* GPIO_40 */
"SMB_SPMI_CLK",
"USB_HUB_RESET",
"FORCE_USB_BOOT",
"LRF_IRQ",
"NC",
"IMU2_INT",
"HDMI_3P3_EN",
"HDMI_RSTN",
"HDMI_1P2_EN",
"HDMI_INT", /* GPIO_50 */
"USB1_ID",
"FP_SPI_MISO",
"FP_SPI_MOSI",
"FP_SPI_CLK",
"FP_SPI_CS_N",
"NFC_ESE_SPI_MISO",
"NFC_ESE_SPI_MOSI",
"NFC_ESE_SPI_CLK",
"NFC_ESE_SPI_CS",
"NFC_I2C_SDA", /* GPIO_60 */
"NFC_I2C_SCLC",
"NFC_EN",
"NFC_CLK_REQ",
"HST_WLAN_EN",
"HST_BT_EN",
"HST_SW_CTRL",
"NC",
"HST_BT_UART_CTS",
"HST_BT_UART_RFR",
"HST_BT_UART_TX", /* GPIO_70 */
"HST_BT_UART_RX",
"CAM_DC_SPI0_MISO",
"CAM_DC_SPI0_MOSI",
"CAM_DC_SPI0_CLK",
"CAM_DC_SPI0_CS_N",
"CAM_DC_SPI1_MISO",
"CAM_DC_SPI1_MOSI",
"CAM_DC_SPI1_CLK",
"CAM_DC_SPI1_CS_N",
"HALL_INT_N", /* GPIO_80 */
"USB_PHY_PS",
"MDP_VSYNC_P",
"MDP_VSYNC_S",
"ETH_3P3_EN",
"RADAR_INT",
"NFC_DWL_REQ",
"SM_GPIO_87",
"WCD_RESET_N",
"ALSP_INT_N",
"PRESS_INT", /* GPIO_90 */
"SAR_INT_N",
"SD_CARD_DET_N",
"NC",
"PCIE0_RESET_N",
"PCIE0_CLK_REQ_N",
"PCIE0_WAKE_N",
"PCIE1_RESET_N",
"PCIE1_CLK_REQ_N",
"PCIE1_WAKE_N",
"CAM_MCLK0", /* GPIO_100 */
"CAM_MCLK1",
"CAM_MCLK2",
"CAM_MCLK3",
"CAM_MCLK4",
"CAM_MCLK5",
"CAM2_RESET_N",
"CCI_I2C0_SDA",
"CCI_I2C0_SCL",
"CCI_I2C1_SDA",
"CCI_I2C1_SCL", /* GPIO_110 */
"CCI_I2C2_SDA",
"CCI_I2C2_SCL",
"CCI_I2C3_SDA",
"CCI_I2C3_SCL",
"CAM5_RESET_N",
"CAM4_RESET_N",
"CAM3_RESET_N",
"IMU1_INT",
"MAG_INT_N",
"MI2S2_I2S_SCK", /* GPIO_120 */
"MI2S2_I2S_DAT0",
"MI2S2_I2S_WS",
"HIFI_DAC_I2S_MCLK",
"MI2S2_I2S_DAT1",
"HIFI_DAC_I2S_SCK",
"HIFI_DAC_I2S_DAT0",
"NC",
"HIFI_DAC_I2S_WS",
"HST_BT_WLAN_SLIMBUS_CLK",
"HST_BT_WLAN_SLIMBUS_DAT0", /* GPIO_130 */
"BT_LED_EN",
"WLAN_LED_EN",
"NC",
"NC",
"NC",
"UIM2_PRESENT",
"NC",
"NC",
"NC",
"UIM1_PRESENT", /* GPIO_140 */
"NC",
"SM_RFFE0_DATA",
"NC",
"SM_RFFE1_DATA",
"SM_MSS_GRFC4",
"SM_MSS_GRFC5",
"SM_MSS_GRFC6",
"SM_MSS_GRFC7",
"SM_RFFE4_CLK",
"SM_RFFE4_DATA", /* GPIO_150 */
"WLAN_COEX_UART1_RX",
"WLAN_COEX_UART1_TX",
"HST_SW_CTRL",
"DSI0_STATUS",
"DSI1_STATUS",
"APPS_PBL_BOOT_SPEED_1",
"APPS_BOOT_FROM_ROM",
"APPS_PBL_BOOT_SPEED_0",
"QLINK0_REQ",
"QLINK0_EN", /* GPIO_160 */
"QLINK0_WMSS_RESET_N",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"WCD_SWR_TX_CLK",
"WCD_SWR_TX_DATA0",
"WCD_SWR_TX_DATA1", /* GPIO_170 */
"WCD_SWR_RX_CLK",
"WCD_SWR_RX_DATA0",
"WCD_SWR_RX_DATA1",
"DMIC01_CLK",
"DMIC01_DATA",
"DMIC23_CLK",
"DMIC23_DATA",
"WSA_SWR_CLK",
"WSA_SWR_DATA",
"DMIC45_CLK", /* GPIO_180 */
"DMIC45_DATA",
"WCD_SWR_TX_DATA2",
"SENSOR_I3C_SDA",
"SENSOR_I3C_SCL",
"CAM_OIS0_I3C_SDA",
"CAM_OIS0_I3C_SCL",
"IMU_SPI_MISO",
"IMU_SPI_MOSI",
"IMU_SPI_CLK",
"IMU_SPI_CS_N", /* GPIO_190 */
"MAG_I2C_SDA",
"MAG_I2C_SCL",
"SENSOR_I2C_SDA",
"SENSOR_I2C_SCL",
"RADAR_SPI_MISO",
"RADAR_SPI_MOSI",
"RADAR_SPI_CLK",
"RADAR_SPI_CS_N",
"HST_BLE_UART_TX",
"HST_BLE_UART_RX", /* GPIO_200 */
"HST_WLAN_UART_TX",
"HST_WLAN_UART_RX";
pcie0_default_state: pcie0-default-state {
perst-pins {
pins = "gpio94";