arm64: dts: qcom: sm6350: add LPASS LPI pin controller

Add LPASS LPI pinctrl node required for audio functionality on SM6350.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20260430-sm6350-lpi-tlmm-v2-4-81d068025b97@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Luca Weiss
2026-04-30 09:10:44 +02:00
committed by Bjorn Andersson
parent bde860892c
commit 6303981271

View File

@@ -1450,6 +1450,72 @@ compute-cb@5 {
};
};
lpass_tlmm: pinctrl@33c0000 {
compatible = "qcom,sm6350-lpass-lpi-pinctrl";
reg = <0x0 0x033c0000 0x0 0x20000>,
<0x0 0x03550000 0x0 0x10000>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&lpass_tlmm 0 0 15>;
clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
clock-names = "core",
"audio";
i2s1_active: i2s1-active-state {
clk-pins {
pins = "gpio6";
function = "i2s1_clk";
drive-strength = <8>;
bias-disable;
output-high;
};
ws-pins {
pins = "gpio7";
function = "i2s1_ws";
drive-strength = <8>;
bias-disable;
output-high;
};
data-pins {
pins = "gpio8", "gpio9";
function = "i2s1_data";
drive-strength = <8>;
bias-disable;
output-high;
};
};
i2s1_sleep: i2s1-sleep-state {
clk-pins {
pins = "gpio6";
function = "i2s1_clk";
drive-strength = <2>;
bias-pull-down;
input-enable;
};
ws-pins {
pins = "gpio7";
function = "i2s1_ws";
drive-strength = <2>;
bias-pull-down;
input-enable;
};
data-pins {
pins = "gpio8", "gpio9";
function = "i2s1_data";
drive-strength = <2>;
bias-pull-down;
input-enable;
};
};
};
gpu: gpu@3d00000 {
compatible = "qcom,adreno-619.0", "qcom,adreno";
reg = <0x0 0x03d00000 0x0 0x40000>,