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staging: ti dspbridge: deh: ensure only tlb #0 is enabled

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We don't want the DSP to continue writing into other mapped pages, no
matter how unlikely.

Based on extensive discussion with Fernando Guzman Lugo.

Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Felipe Contreras
2010-07-04 16:34:32 +03:00
committed by Greg Kroah-Hartman
parent 4574fae58d
commit 62f5242e2e
1 changed files with 8 additions and 0 deletions
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8
drivers/staging/tidspbridge/core/ue_deh.c
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@@ -186,6 +186,14 @@ void bridge_deh_notify(struct deh_mgr *deh_mgr, u32 ulEventMask, u32 dwErrInfo)
print_dsp_trace_buffer(dev_context);
dump_dl_modules(dev_context);
/*
* Before acking the MMU fault, let's make sure MMU can only
* access entry #0. Then add a new entry so that the DSP OS
* can continue in order to dump the stack.
*/
hw_mmu_twl_disable(resources->dw_dmmu_base);
hw_mmu_tlb_flush_all(resources->dw_dmmu_base);
hw_mmu_tlb_add(resources->dw_dmmu_base,
virt_to_phys(dummy_va_addr), fault_addr,
HW_PAGE_SIZE4KB, 1,