mirrors/linux
2
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-05-07 22:08:33 -04:00
Code Issues Packages Projects Releases Wiki Activity

RISC-V: clarify what some RISCV_ISA* config options do

Browse Source 
During some discussion on IRC yesterday and on Pu's bpf patch [1]
I noticed that these RISCV_ISA* Kconfig options are not really clear
about their implications. Many of these options have no impact on what
userspace is allowed to do, for example an application can use Zbb
regardless of whether or not the kernel does. Change the help text to
try and clarify whether or not an option affects just the kernel, or
also userspace. None of these options actually control whether or not an
extension is detected dynamically as that's done regardless of Kconfig
options, so drop any text that implies the option is required for
dynamic detection, rewording them as "do x when y is detected".

Link: https://lore.kernel.org/linux-riscv/20240328-ferocity-repose-c554f75a676c@spud/ [1]
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Link: https://lore.kernel.org/r/20241024-overdue-slogan-0b0f69d3da91@spud
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
This commit is contained in:
Conor Dooley
2024-10-24 11:19:40 +01:00
committed by Alexandre Ghiti
parent 4295f4ccfe
commit 6216182fb7
1 changed files with 19 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files

36
arch/riscv/Kconfig
View File

@@ -527,7 +527,8 @@ config RISCV_ISA_C
help
Adds "C" to the ISA subsets that the toolchain is allowed to emit
when building Linux, which results in compressed instructions in the
Linux binary.
Linux binary. This option produces a kernel that will not run on
systems that do not support compressed instructions.
If you don't know what to do here, say Y.
@@ -537,8 +538,8 @@ config RISCV_ISA_SVNAPOT
depends on RISCV_ALTERNATIVE
default y
help
Allow kernel to detect the Svnapot ISA-extension dynamically at boot
time and enable its usage.
Enable support for the Svnapot ISA-extension when it is detected
at boot.
The Svnapot extension is used to mark contiguous PTEs as a range
of contiguous virtual-to-physical translations for a naturally
@@ -556,9 +557,8 @@ config RISCV_ISA_SVPBMT
depends on RISCV_ALTERNATIVE
default y
help
Adds support to dynamically detect the presence of the Svpbmt
ISA-extension (Supervisor-mode: page-based memory types) and
enable its usage.
Add support for the Svpbmt ISA-extension (Supervisor-mode:
page-based memory types) in the kernel when it is detected at boot.
The memory type for a page contains a combination of attributes
that indicate the cacheability, idempotency, and ordering
@@ -577,14 +577,15 @@ config TOOLCHAIN_HAS_V
depends on AS_HAS_OPTION_ARCH
config RISCV_ISA_V
bool "VECTOR extension support"
bool "Vector extension support"
depends on TOOLCHAIN_HAS_V
depends on FPU
select DYNAMIC_SIGFRAME
default y
help
Say N here if you want to disable all vector related procedure
in the kernel.
Add support for the Vector extension when it is detected at boot.
When this option is disabled, neither the kernel nor userspace may
use vector procedures.
If you don't know what to do here, say Y.
@@ -667,8 +668,8 @@ config RISCV_ISA_ZBB
depends on RISCV_ALTERNATIVE
default y
help
Adds support to dynamically detect the presence of the ZBB
extension (basic bit manipulation) and enable its usage.
Add support for enabling optimisations in the kernel when the
Zbb extension is detected at boot.
The Zbb extension provides instructions to accelerate a number
of bit-specific operations (count bit population, sign extending,
@@ -707,9 +708,9 @@ config RISCV_ISA_ZICBOM
select RISCV_DMA_NONCOHERENT
select DMA_DIRECT_REMAP
help
Adds support to dynamically detect the presence of the ZICBOM
extension (Cache Block Management Operations) and enable its
usage.
Add support for the Zicbom extension (Cache Block Management
Operations) and enable its use in the kernel when it is detected
at boot.
The Zicbom extension can be used to handle for example
non-coherent DMA support on devices that need it.
@@ -722,7 +723,7 @@ config RISCV_ISA_ZICBOZ
default y
help
Enable the use of the Zicboz extension (cbo.zero instruction)
when available.
in the kernel when it is detected at boot.
The Zicboz extension is used for faster zeroing of memory.
@@ -760,8 +761,9 @@ config FPU
bool "FPU support"
default y
help
Say N here if you want to disable all floating-point related procedure
in the kernel.
Add support for floating point operations when an FPU is detected at
boot. When this option is disabled, neither the kernel nor userspace
may use the floating point unit.
If you don't know what to do here, say Y.