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ASoC: codecs: jz4725b: add missed Mixer inputs

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The Mixer couples analog input from 4 sources (DAC, Line In, Mic 1,
 Mic 2) each input has its own gain & mute controls.

At the moment only DAC is implemented fully and Line In path can be
switched on/off. The patch implements Mic 1 and Mic 2 paths and fully
implements Line In path.

Manual states that these controls (16.6.3.3 Programmable attenuation:
GOi) gain varies from -22.5dB to +6.0dB with 1.5dB step. Also there's
extra values below the minimum, but they behave the same as the minimum
value.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Link: https://lore.kernel.org/r/20221016132648.3011729-7-lis8215@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Siarhei Volkau
2022-10-16 16:26:47 +03:00
committed by Mark Brown
parent e6233ee250
commit 616c291820
1 changed files with 40 additions and 2 deletions
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42
sound/soc/codecs/jz4725b.c
View File

@@ -136,6 +136,18 @@ enum {
#define REG_CGR3_GO1L_OFFSET 0
#define REG_CGR3_GO1L_MASK (0x1f << REG_CGR3_GO1L_OFFSET)
#define REG_CGR4_GO2R_OFFSET 0
#define REG_CGR4_GO2R_MASK (0x1f << REG_CGR4_GO2R_OFFSET)
#define REG_CGR5_GO2L_OFFSET 0
#define REG_CGR5_GO2L_MASK (0x1f << REG_CGR5_GO2L_OFFSET)
#define REG_CGR6_GO3R_OFFSET 0
#define REG_CGR6_GO3R_MASK (0x1f << REG_CGR6_GO3R_OFFSET)
#define REG_CGR7_GO3L_OFFSET 0
#define REG_CGR7_GO3L_MASK (0x1f << REG_CGR7_GO3L_OFFSET)
#define REG_CGR8_GOR_OFFSET 0
#define REG_CGR8_GOR_MASK (0x1f << REG_CGR8_GOR_OFFSET)
@@ -153,6 +165,11 @@ struct jz_icdc {
static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(jz4725b_adc_tlv, 0, 150, 0);
static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(jz4725b_dac_tlv, -2250, 150, 0);
static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(jz4725b_mix_tlv,
0, 11, TLV_DB_SCALE_ITEM(-2250, 0, 0),
12, 31, TLV_DB_SCALE_ITEM(-2250, 150, 0),
);
static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(jz4725b_out_tlv,
0, 11, TLV_DB_SCALE_ITEM(-3350, 200, 0),
12, 23, TLV_DB_SCALE_ITEM(-1050, 100, 0),
@@ -170,6 +187,21 @@ static const struct snd_kcontrol_new jz4725b_codec_controls[] = {
REG_CGR10_GIL_OFFSET,
REG_CGR10_GIR_OFFSET,
0xf, 0, jz4725b_adc_tlv),
SOC_DOUBLE_R_TLV("Mixer Line In Bypass Playback Volume",
JZ4725B_CODEC_REG_CGR3,
JZ4725B_CODEC_REG_CGR2,
REG_CGR2_GO1R_OFFSET,
0x1f, 1, jz4725b_mix_tlv),
SOC_DOUBLE_R_TLV("Mixer Mic 1 Bypass Playback Volume",
JZ4725B_CODEC_REG_CGR5,
JZ4725B_CODEC_REG_CGR4,
REG_CGR4_GO2R_OFFSET,
0x1f, 1, jz4725b_mix_tlv),
SOC_DOUBLE_R_TLV("Mixer Mic 2 Bypass Playback Volume",
JZ4725B_CODEC_REG_CGR7,
JZ4725B_CODEC_REG_CGR6,
REG_CGR6_GO3R_OFFSET,
0x1f, 1, jz4725b_mix_tlv),
SOC_DOUBLE_R_TLV("Master Playback Volume",
JZ4725B_CODEC_REG_CGR9,
@@ -203,8 +235,12 @@ static const struct snd_kcontrol_new jz4725b_codec_adc_src_ctrl =
SOC_DAPM_ENUM("ADC Source Capture Route", jz4725b_codec_adc_src_enum);
static const struct snd_kcontrol_new jz4725b_codec_mixer_controls[] = {
SOC_DAPM_SINGLE("Line In Bypass", JZ4725B_CODEC_REG_CR1,
SOC_DAPM_SINGLE("Line In Bypass Playback Switch", JZ4725B_CODEC_REG_CR1,
REG_CR1_BYPASS_OFFSET, 1, 0),
SOC_DAPM_SINGLE("Mic 1 Bypass Playback Switch", JZ4725B_CODEC_REG_CR3,
REG_CR3_SIDETONE1_OFFSET, 1, 0),
SOC_DAPM_SINGLE("Mic 2 Bypass Playback Switch", JZ4725B_CODEC_REG_CR3,
REG_CR3_SIDETONE2_OFFSET, 1, 0),
};
static int jz4725b_out_stage_enable(struct snd_soc_dapm_widget *w,
@@ -299,7 +335,9 @@ static const struct snd_soc_dapm_route jz4725b_codec_dapm_routes[] = {
{"Line In", NULL, "LLINEIN"},
{"Line In", NULL, "RLINEIN"},
{"Mixer", "Line In Bypass", "Line In"},
{"Mixer", "Mic 1 Bypass Playback Switch", "Mic 1"},
{"Mixer", "Mic 2 Bypass Playback Switch", "Mic 2"},
{"Mixer", "Line In Bypass Playback Switch", "Line In"},
{"DAC to Mixer", NULL, "DAC"},
{"Mixer", NULL, "DAC to Mixer"},