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ARM: dts: r8a7743: Add APMU node and second CPU core

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Add DT nodes for the Advanced Power Management Unit (APMU) and the
second CPU core.  Use the enable-method to point out that the APMU
should be used for SMP support.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Biju Das
2017-08-08 11:56:32 +01:00
committed by Simon Horman
parent 02a5ab18d3
commit 60dce695b0
1 changed files with 16 additions and 0 deletions
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16
arch/arm/boot/dts/r8a7743.dtsi
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@@ -30,6 +30,7 @@ aliases {
cpus {
#address-cells = <1>;
#size-cells = <0>;
enable-method = "renesas,apmu";
cpu0: cpu@0 {
device_type = "cpu";
@@ -41,6 +42,15 @@ cpu0: cpu@0 {
next-level-cache = <&L2_CA15>;
};
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <1>;
clock-frequency = <1500000000>;
power-domains = <&sysc R8A7743_PD_CA15_CPU1>;
next-level-cache = <&L2_CA15>;
};
L2_CA15: cache-controller-0 {
compatible = "cache";
cache-unified;
@@ -57,6 +67,12 @@ soc {
#size-cells = <2>;
ranges;
apmu@e6152000 {
compatible = "renesas,r8a7743-apmu", "renesas,apmu";
reg = <0 0xe6152000 0 0x188>;
cpus = <&cpu0 &cpu1>;
};
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;