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x86/smp: Split sending INIT IPI out into a helper function
Putting CPUs into INIT is a safer place during kexec() to park CPUs. Split the INIT assert/deassert sequence out so it can be reused. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ashok Raj <ashok.raj@intel.com> Link: https://lore.kernel.org/r/20230615193330.551157083@linutronix.de
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@@ -853,47 +853,38 @@ wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip)
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return (send_status | accept_status);
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}
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static int
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wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
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static void send_init_sequence(int phys_apicid)
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{
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unsigned long send_status = 0, accept_status = 0;
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int maxlvt, num_starts, j;
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int maxlvt = lapic_get_maxlvt();
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maxlvt = lapic_get_maxlvt();
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/*
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* Be paranoid about clearing APIC errors.
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*/
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/* Be paranoid about clearing APIC errors. */
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if (APIC_INTEGRATED(boot_cpu_apic_version)) {
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if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
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/* Due to the Pentium erratum 3AP. */
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if (maxlvt > 3)
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apic_write(APIC_ESR, 0);
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apic_read(APIC_ESR);
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}
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pr_debug("Asserting INIT\n");
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/*
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* Turn INIT on target chip
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*/
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/*
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* Send IPI
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*/
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apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT,
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phys_apicid);
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pr_debug("Waiting for send to finish...\n");
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send_status = safe_apic_wait_icr_idle();
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/* Assert INIT on the target CPU */
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apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT, phys_apicid);
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safe_apic_wait_icr_idle();
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udelay(init_udelay);
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pr_debug("Deasserting INIT\n");
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/* Target chip */
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/* Send IPI */
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/* Deassert INIT on the target CPU */
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apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
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safe_apic_wait_icr_idle();
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}
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pr_debug("Waiting for send to finish...\n");
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send_status = safe_apic_wait_icr_idle();
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/*
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* Wake up AP by INIT, INIT, STARTUP sequence.
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*/
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static int wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
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{
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unsigned long send_status = 0, accept_status = 0;
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int num_starts, j, maxlvt = lapic_get_maxlvt();
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send_init_sequence(phys_apicid);
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mb();
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