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arm64: dts: qcom: msm8916: Fix tsens_mode unit address
The reg address of the tsens_mode nvmem cell is correct but the unit
address does not match (0xec vs 0xef). Fix it. No functional change.
Fixes: 24aafd041f ("arm64: dts: qcom: msm8916: specify per-sensor calibration cells")
Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230308123617.101211-1-stephan.gerhold@kernkonzept.com
This commit is contained in:
committed by
Bjorn Andersson
parent
f03908b23f
commit
608465f798
@@ -503,7 +503,7 @@ tsens_base2: base2@d7 {
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bits = <1 7>;
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};
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tsens_mode: mode@ec {
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tsens_mode: mode@ef {
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reg = <0xef 0x1>;
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bits = <5 3>;
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};
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