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Merge tag 'sunxi-fixes-for-4.7' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes
Pull "Allwinner Fixes for 4.7" from Maxime Ripard: Two patches fixing simplefb on the SoCs that had their display clocks enabled, and one fix for the CHIP that will enable its sched clock. * tag 'sunxi-fixes-for-4.7' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: ARM: dts: sun7i: Fix pll3x2 and pll7x2 not having a parent clock ARM: dts: sunxi: Add pll3 to simplefb nodes clocks lists ARM: sunxi/dt: make the CHIP inherit from allwinner,sun5i-a13
This commit is contained in:
@@ -65,8 +65,9 @@ framebuffer@0 {
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compatible = "allwinner,simple-framebuffer",
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"simple-framebuffer";
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allwinner,pipeline = "de_be0-lcd0-hdmi";
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clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
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<&ahb_gates 44>, <&dram_gates 26>;
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clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
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<&ahb_gates 43>, <&ahb_gates 44>,
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<&dram_gates 26>;
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status = "disabled";
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};
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@@ -74,8 +75,9 @@ framebuffer@1 {
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compatible = "allwinner,simple-framebuffer",
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"simple-framebuffer";
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allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi";
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clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
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<&ahb_gates 44>, <&ahb_gates 46>,
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clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
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<&ahb_gates 43>, <&ahb_gates 44>,
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<&ahb_gates 46>,
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<&dram_gates 25>, <&dram_gates 26>;
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status = "disabled";
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};
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@@ -84,9 +86,9 @@ framebuffer@2 {
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compatible = "allwinner,simple-framebuffer",
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"simple-framebuffer";
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allwinner,pipeline = "de_fe0-de_be0-lcd0";
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clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>,
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<&ahb_gates 46>, <&dram_gates 25>,
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<&dram_gates 26>;
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clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
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<&ahb_gates 44>, <&ahb_gates 46>,
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<&dram_gates 25>, <&dram_gates 26>;
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status = "disabled";
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};
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@@ -94,8 +96,9 @@ framebuffer@3 {
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compatible = "allwinner,simple-framebuffer",
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"simple-framebuffer";
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allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0";
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clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
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<&ahb_gates 44>, <&ahb_gates 46>,
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clocks = <&pll3>, <&pll5 1>, <&ahb_gates 34>,
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<&ahb_gates 36>, <&ahb_gates 44>,
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<&ahb_gates 46>,
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<&dram_gates 5>, <&dram_gates 25>, <&dram_gates 26>;
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status = "disabled";
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};
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@@ -65,8 +65,8 @@ framebuffer@0 {
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compatible = "allwinner,simple-framebuffer",
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"simple-framebuffer";
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allwinner,pipeline = "de_be0-lcd0-hdmi";
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clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
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<&ahb_gates 44>;
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clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
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<&ahb_gates 43>, <&ahb_gates 44>;
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status = "disabled";
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};
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@@ -74,7 +74,8 @@ framebuffer@1 {
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compatible = "allwinner,simple-framebuffer",
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"simple-framebuffer";
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allwinner,pipeline = "de_be0-lcd0";
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clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
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clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
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<&ahb_gates 44>;
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status = "disabled";
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};
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@@ -82,8 +83,8 @@ framebuffer@2 {
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compatible = "allwinner,simple-framebuffer",
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"simple-framebuffer";
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allwinner,pipeline = "de_be0-lcd0-tve0";
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clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
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<&ahb_gates 44>;
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clocks = <&pll3>, <&pll5 1>, <&ahb_gates 34>,
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<&ahb_gates 36>, <&ahb_gates 44>;
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status = "disabled";
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};
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};
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@@ -52,7 +52,7 @@
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/ {
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model = "NextThing C.H.I.P.";
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compatible = "nextthing,chip", "allwinner,sun5i-r8";
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compatible = "nextthing,chip", "allwinner,sun5i-r8", "allwinner,sun5i-a13";
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aliases {
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i2c0 = &i2c0;
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@@ -67,8 +67,9 @@ framebuffer@0 {
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compatible = "allwinner,simple-framebuffer",
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"simple-framebuffer";
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allwinner,pipeline = "de_be0-lcd0-hdmi";
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clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
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<&ahb_gates 44>, <&dram_gates 26>;
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clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
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<&ahb_gates 43>, <&ahb_gates 44>,
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<&dram_gates 26>;
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status = "disabled";
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};
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@@ -76,8 +77,8 @@ framebuffer@1 {
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compatible = "allwinner,simple-framebuffer",
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"simple-framebuffer";
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allwinner,pipeline = "de_be0-lcd0";
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clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>,
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<&dram_gates 26>;
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clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
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<&ahb_gates 44>, <&dram_gates 26>;
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status = "disabled";
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};
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@@ -85,7 +86,7 @@ framebuffer@2 {
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compatible = "allwinner,simple-framebuffer",
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"simple-framebuffer";
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allwinner,pipeline = "de_be0-lcd0-tve0";
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clocks = <&pll5 1>,
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clocks = <&pll3>, <&pll5 1>,
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<&ahb_gates 34>, <&ahb_gates 36>, <&ahb_gates 44>,
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<&dram_gates 5>, <&dram_gates 26>;
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status = "disabled";
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@@ -231,6 +232,7 @@ pll3: clk@01c20010 {
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pll3x2: pll3x2_clk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&pll3>;
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clock-div = <1>;
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clock-mult = <2>;
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clock-output-names = "pll3-2x";
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@@ -272,6 +274,7 @@ pll7: clk@01c20030 {
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pll7x2: pll7x2_clk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&pll7>;
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clock-div = <1>;
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clock-mult = <2>;
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clock-output-names = "pll7-2x";
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