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drm/i915/dsi: Fix overflow issue in pclk parsing

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Parsed divider p will overflow and is considered being valid in case
pll_ctl == 0.

Fix this by checking divider p before decreasing it. Also small improvement
is made by using fls() instead of custom loop.

v2: use fls() and check parsed divider

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://lore.kernel.org/r/20250807042635.2491537-1-jouni.hogander@intel.com
This commit is contained in:
Jouni Högander
2025-08-07 07:26:35 +03:00
parent f9b5bf76ea
commit 5fe8d1dba7
1 changed files with 3 additions and 5 deletions
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8
drivers/gpu/drm/i915/display/vlv_dsi_pll.c
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@@ -142,11 +142,9 @@ static int vlv_dsi_pclk(struct intel_encoder *encoder,
pll_div &= DSI_PLL_M1_DIV_MASK;
pll_div = pll_div >> DSI_PLL_M1_DIV_SHIFT;
while (pll_ctl) {
pll_ctl = pll_ctl >> 1;
p++;
}
p--;
p = fls(pll_ctl);
if (p)
p--;
if (!p) {
drm_err(display->drm, "wrong P1 divisor\n");