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Merge tag 'ti-k3-dt-for-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux into arm/dt

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Devicetree changes for TI K3 platforms for v5.15 merge window:

* New features:
  - AM64 adds pwm and ecap capability

* tag 'ti-k3-dt-for-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux:
  arm64: dts: ti: k3-am642-sk: Add pwm nodes
  arm64: dts: ti: k3-am642-evm: Add pwm nodes
  arm64: dts: ti: k3-am64-main: Add ecap pwm nodes
  arm64: dts: ti: k3-am64-main: Add epwm nodes

Link: https://lore.kernel.org/r/20210809130631.pfvntcichsyeekbo@festive
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2021-08-12 22:52:49 +02:00
parent 261a910d6c c1fa5ac6c2
commit 5f49f22db4
3 changed files with 234 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

114
arch/arm64/boot/dts/ti/k3-am64-main.dtsi
View File

@@ -217,6 +217,12 @@ phy_gmii_sel: phy@4044 {
reg = <0x4044 0x8>;
#phy-cells = <1>;
};
epwm_tbclk: clock@4140 {
compatible = "ti,am64-epwm-tbclk", "syscon";
reg = <0x4130 0x4>;
#clock-cells = <1>;
};
};
main_uart0: serial@2800000 {
@@ -859,4 +865,112 @@ pcie0_ep: pcie-ep@f102000 {
clock-names = "fck";
max-functions = /bits/ 8 <1>;
};
epwm0: pwm@23000000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
#pwm-cells = <3>;
reg = <0x0 0x23000000 0x0 0x100>;
power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
clock-names = "tbclk", "fck";
};
epwm1: pwm@23010000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
#pwm-cells = <3>;
reg = <0x0 0x23010000 0x0 0x100>;
power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
clock-names = "tbclk", "fck";
};
epwm2: pwm@23020000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
#pwm-cells = <3>;
reg = <0x0 0x23020000 0x0 0x100>;
power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
clock-names = "tbclk", "fck";
};
epwm3: pwm@23030000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
#pwm-cells = <3>;
reg = <0x0 0x23030000 0x0 0x100>;
power-domains = <&k3_pds 89 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 3>, <&k3_clks 89 0>;
clock-names = "tbclk", "fck";
};
epwm4: pwm@23040000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
#pwm-cells = <3>;
reg = <0x0 0x23040000 0x0 0x100>;
power-domains = <&k3_pds 90 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 4>, <&k3_clks 90 0>;
clock-names = "tbclk", "fck";
};
epwm5: pwm@23050000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
#pwm-cells = <3>;
reg = <0x0 0x23050000 0x0 0x100>;
power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 5>, <&k3_clks 91 0>;
clock-names = "tbclk", "fck";
};
epwm6: pwm@23060000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
#pwm-cells = <3>;
reg = <0x0 0x23060000 0x0 0x100>;
power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 6>, <&k3_clks 92 0>;
clock-names = "tbclk", "fck";
};
epwm7: pwm@23070000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
#pwm-cells = <3>;
reg = <0x0 0x23070000 0x0 0x100>;
power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 7>, <&k3_clks 93 0>;
clock-names = "tbclk", "fck";
};
epwm8: pwm@23080000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
#pwm-cells = <3>;
reg = <0x0 0x23080000 0x0 0x100>;
power-domains = <&k3_pds 94 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 8>, <&k3_clks 94 0>;
clock-names = "tbclk", "fck";
};
ecap0: pwm@23100000 {
compatible = "ti,am64-ecap", "ti,am3352-ecap";
#pwm-cells = <3>;
reg = <0x0 0x23100000 0x0 0x60>;
power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 51 0>;
clock-names = "fck";
};
ecap1: pwm@23110000 {
compatible = "ti,am64-ecap", "ti,am3352-ecap";
#pwm-cells = <3>;
reg = <0x0 0x23110000 0x0 0x60>;
power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 52 0>;
clock-names = "fck";
};
ecap2: pwm@23120000 {
compatible = "ti,am64-ecap", "ti,am3352-ecap";
#pwm-cells = <3>;
reg = <0x0 0x23120000 0x0 0x60>;
power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 53 0>;
clock-names = "fck";
};
};

56
arch/arm64/boot/dts/ti/k3-am642-evm.dts
View File

@@ -288,6 +288,12 @@ AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */
AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
>;
};
main_ecap0_pins_default: main-ecap0-pins-default {
pinctrl-single,pins = <
AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
>;
};
};
&main_uart0 {
@@ -574,3 +580,53 @@ &pcie0_ep {
num-lanes = <1>;
status = "disabled";
};
&ecap0 {
/* PWM is available on Pin 1 of header J12 */
pinctrl-names = "default";
pinctrl-0 = <&main_ecap0_pins_default>;
};
&ecap1 {
status = "disabled";
};
&ecap2 {
status = "disabled";
};
&epwm0 {
status = "disabled";
};
&epwm1 {
status = "disabled";
};
&epwm2 {
status = "disabled";
};
&epwm3 {
status = "disabled";
};
&epwm4 {
status = "disabled";
};
&epwm5 {
status = "disabled";
};
&epwm6 {
status = "disabled";
};
&epwm7 {
status = "disabled";
};
&epwm8 {
status = "disabled";
};

64
arch/arm64/boot/dts/ti/k3-am642-sk.dts
View File

@@ -210,6 +210,12 @@ AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */
AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
>;
};
main_ecap0_pins_default: main-ecap0-pins-default {
pinctrl-single,pins = <
AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
>;
};
};
&mcu_uart0 {
@@ -453,3 +459,61 @@ &pcie0_rc {
&pcie0_ep {
status = "disabled";
};
&ecap0 {
/* PWM is available on Pin 1 of header J3 */
pinctrl-names = "default";
pinctrl-0 = <&main_ecap0_pins_default>;
};
&ecap1 {
status = "disabled";
};
&ecap2 {
status = "disabled";
};
&epwm0 {
status = "disabled";
};
&epwm1 {
status = "disabled";
};
&epwm2 {
status = "disabled";
};
&epwm3 {
status = "disabled";
};
&epwm4 {
/*
* EPWM4_A, EPWM4_B is available on Pin 32 and 33 on J4 (RPi hat)
* But RPi Hat will be used for other use cases, so marking epwm4 as disabled.
*/
status = "disabled";
};
&epwm5 {
/*
* EPWM5_A, EPWM5_B is available on Pin 29 and 31 on J4 (RPi hat)
* But RPi Hat will be used for other use cases, so marking epwm5 as disabled.
*/
status = "disabled";
};
&epwm6 {
status = "disabled";
};
&epwm7 {
status = "disabled";
};
&epwm8 {
status = "disabled";
};