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Merge tag 'asahi-soc-dt-5.17-v2' of https://github.com/AsahiLinux/linux into arm/dt

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Apple SoC DT updates for 5.17, round 2:

- Various cleanups (removing useless props, sorting nodes, renaming
  things)
- Add PMGR min-state binding & props (see PMGR pull for driver change)
- Initial compatibles for t600x machines (M1 Pro/Max). This covers the
  bindings that just need compatible bumps & minor tweaks, no driver
  changes.
- Add watchdog node (driver not merged yet, hopefully will be; binding
  went in the previous pull)
- Add missing power-domains property to the mailbox binding

* tag 'asahi-soc-dt-5.17-v2' of https://github.com/AsahiLinux/linux:
  dt-bindings: mailbox: apple,mailbox: Add power-domains property
  arm64: dts: apple: t8103: Sort nodes by address
  arm64: dts: apple: t8103: Rename clk24 to clkref
  arm64: dts: apple: t8103: Add watchdog node
  dt-bindings: pinctrl: apple,pinctrl: Add apple,t6000-pinctrl compatible
  dt-bindings: pci: apple,pcie: Add t6000 support
  dt-bindings: i2c: apple,i2c: Add apple,t6000-i2c compatible
  dt-bindings: arm: apple: Add t6000/t6001 MacBook Pro 14/16" compatibles
  arm64: dts: apple: t8103: Add apple,min-state to DCP PMGR nodes
  dt-bindings: power: apple,pmgr-pwrstate: Add apple,min-state prop
  arm64: dts: apple: t8103: Remove PCIe max-link-speed properties

Link: https://lore.kernel.org/r/a24faafd-f2ae-c3a7-5327-b27da7d9e34b@marcan.st
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2021-12-15 15:56:39 +01:00
parent 03e9474bfc 301f651614
commit 5f424ff299
8 changed files with 106 additions and 49 deletions
Download Patch File Download Diff File Expand all files Collapse all files

21
Documentation/devicetree/bindings/arm/apple.yaml
View File

@@ -19,6 +19,13 @@ description: |
- MacBook Air (M1, 2020)
- iMac (24-inch, M1, 2021)
And devices based on the "M1 Pro" and "M1 Max" SoCs:
- MacBook Pro (14-inch, M1 Pro, 2021)
- MacBook Pro (14-inch, M1 Max, 2021)
- MacBook Pro (16-inch, M1 Pro, 2021)
- MacBook Pro (16-inch, M1 Max, 2021)
The compatible property should follow this format:
compatible = "apple,<targettype>", "apple,<socid>", "apple,arm-platform";
@@ -60,6 +67,20 @@ properties:
- apple,j457 # iMac (24-inch, 2x USB-C, M1, 2021)
- const: apple,t8103
- const: apple,arm-platform
- description: Apple M1 Pro SoC based platforms
items:
- enum:
- apple,j314s # MacBook Pro (14-inch, M1 Pro, 2021)
- apple,j316s # MacBook Pro (16-inch, M1 Pro, 2021)
- const: apple,t6000
- const: apple,arm-platform
- description: Apple M1 Max SoC based platforms
items:
- enum:
- apple,j314c # MacBook Pro (14-inch, M1 Max, 2021)
- apple,j316c # MacBook Pro (16-inch, M1 Max, 2021)
- const: apple,t6001
- const: apple,arm-platform
additionalProperties: true

4
Documentation/devicetree/bindings/i2c/apple,i2c.yaml
View File

@@ -21,7 +21,9 @@ allOf:
properties:
compatible:
items:
- const: apple,t8103-i2c
- enum:
- apple,t8103-i2c
- apple,t6000-i2c
- const: apple,i2c
reg:

3
Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml
View File

@@ -56,6 +56,9 @@ properties:
"#mbox-cells":
const: 0
power-domains:
maxItems: 1
required:
- compatible
- reg

28
Documentation/devicetree/bindings/pci/apple,pcie.yaml
View File

@@ -28,19 +28,17 @@ description: |
distributed over the root ports as the OS sees fit by programming
the PCIe controller's port registers.
allOf:
- $ref: /schemas/pci/pci-bus.yaml#
- $ref: /schemas/interrupt-controller/msi-controller.yaml#
properties:
compatible:
items:
- const: apple,t8103-pcie
- enum:
- apple,t8103-pcie
- apple,t6000-pcie
- const: apple,pcie
reg:
minItems: 3
maxItems: 5
maxItems: 6
reg-names:
minItems: 3
@@ -50,6 +48,7 @@ properties:
- const: port0
- const: port1
- const: port2
- const: port3
ranges:
minItems: 2
@@ -59,7 +58,7 @@ properties:
description:
Interrupt specifiers, one for each root port.
minItems: 1
maxItems: 3
maxItems: 4
msi-parent: true
@@ -81,6 +80,21 @@ required:
unevaluatedProperties: false
allOf:
- $ref: /schemas/pci/pci-bus.yaml#
- $ref: /schemas/interrupt-controller/msi-controller.yaml#
- if:
properties:
compatible:
contains:
const: apple,t8103-pcie
then:
properties:
reg:
maxItems: 5
interrupts:
maxItems: 3
examples:
- |
#include <dt-bindings/interrupt-controller/apple-aic.h>

4
Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml
View File

@@ -17,7 +17,9 @@ description: |
properties:
compatible:
items:
- const: apple,t8103-pinctrl
- enum:
- apple,t8103-pinctrl
- apple,t6000-pinctrl
- const: apple,pinctrl
reg:

8
Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml
View File

@@ -61,6 +61,14 @@ properties:
Forces this power domain to always be powered up.
type: boolean
apple,min-state:
description:
Specifies the minimum power state for auto-PM.
0 = power gated, 4 = clock gated, 15 = on.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 15
required:
- compatible
- reg

2
arch/arm64/boot/dts/apple/t8103-pmgr.dtsi
View File

@@ -665,6 +665,7 @@ ps_dispext_cpu0: power-controller@378 {
#reset-cells = <0>;
label = "dispext_cpu0";
power-domains = <&ps_dispext_fe>;
apple,min-state = <4>;
};
ps_jpg: power-controller@3c0 {
@@ -1005,6 +1006,7 @@ ps_disp0_cpu0: power-controller@10018 {
label = "disp0_cpu0";
power-domains = <&ps_disp0_fe>;
apple,always-on; /* TODO: figure out if we can enable PM here */
apple,min-state = <4>;
};
};

85
arch/arm64/boot/dts/apple/t8103.dtsi
View File

@@ -96,11 +96,11 @@ timer {
<AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;
};
clk24: clock-24m {
clkref: clock-ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "clk24";
clock-output-names = "clkref";
};
soc {
@@ -114,7 +114,7 @@ soc {
i2c0: i2c@235010000 {
compatible = "apple,t8103-i2c", "apple,i2c";
reg = <0x2 0x35010000 0x0 0x4000>;
clocks = <&clk24>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c0_pins>;
@@ -127,7 +127,7 @@ i2c0: i2c@235010000 {
i2c1: i2c@235014000 {
compatible = "apple,t8103-i2c", "apple,i2c";
reg = <0x2 0x35014000 0x0 0x4000>;
clocks = <&clk24>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 628 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c1_pins>;
@@ -140,7 +140,7 @@ i2c1: i2c@235014000 {
i2c2: i2c@235018000 {
compatible = "apple,t8103-i2c", "apple,i2c";
reg = <0x2 0x35018000 0x0 0x4000>;
clocks = <&clk24>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 629 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c2_pins>;
@@ -154,7 +154,7 @@ i2c2: i2c@235018000 {
i2c3: i2c@23501c000 {
compatible = "apple,t8103-i2c", "apple,i2c";
reg = <0x2 0x3501c000 0x0 0x4000>;
clocks = <&clk24>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 630 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c3_pins>;
@@ -167,7 +167,7 @@ i2c3: i2c@23501c000 {
i2c4: i2c@235020000 {
compatible = "apple,t8103-i2c", "apple,i2c";
reg = <0x2 0x35020000 0x0 0x4000>;
clocks = <&clk24>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 631 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c4_pins>;
@@ -188,7 +188,7 @@ serial0: serial@235200000 {
* TODO: figure out the clocking properly, there may
* be a third selectable clock.
*/
clocks = <&clk24>, <&clk24>;
clocks = <&clkref>, <&clkref>;
clock-names = "uart", "clk_uart_baud0";
power-domains = <&ps_uart0>;
status = "disabled";
@@ -200,7 +200,7 @@ serial2: serial@235208000 {
reg-io-width = <4>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 607 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk24>, <&clk24>;
clocks = <&clkref>, <&clkref>;
clock-names = "uart", "clk_uart_baud0";
power-domains = <&ps_uart2>;
status = "disabled";
@@ -274,34 +274,6 @@ pcie_pins: pcie-pins {
};
};
pmgr_mini: power-management@23d280000 {
compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0x3d280000 0 0x4000>;
};
pinctrl_aop: pinctrl@24a820000 {
compatible = "apple,t8103-pinctrl", "apple,pinctrl";
reg = <0x2 0x4a820000 0x0 0x4000>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_aop 0 0 42>;
apple,npins = <42>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 270 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 271 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 272 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 273 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 274 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_nub: pinctrl@23d1f0000 {
compatible = "apple,t8103-pinctrl", "apple,pinctrl";
reg = <0x2 0x3d1f0000 0x0 0x4000>;
@@ -324,6 +296,21 @@ pinctrl_nub: pinctrl@23d1f0000 {
<AIC_IRQ 336 IRQ_TYPE_LEVEL_HIGH>;
};
pmgr_mini: power-management@23d280000 {
compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0x3d280000 0 0x4000>;
};
wdt: watchdog@23d2b0000 {
compatible = "apple,t8103-wdt", "apple,wdt";
reg = <0x2 0x3d2b0000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 338 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_smc: pinctrl@23e820000 {
compatible = "apple,t8103-pinctrl", "apple,pinctrl";
reg = <0x2 0x3e820000 0x0 0x4000>;
@@ -345,6 +332,27 @@ pinctrl_smc: pinctrl@23e820000 {
<AIC_IRQ 397 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_aop: pinctrl@24a820000 {
compatible = "apple,t8103-pinctrl", "apple,pinctrl";
reg = <0x2 0x4a820000 0x0 0x4000>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_aop 0 0 42>;
apple,npins = <42>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 270 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 271 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 272 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 273 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 274 IRQ_TYPE_LEVEL_HIGH>;
};
pcie0_dart_0: dart@681008000 {
compatible = "apple,t8103-dart";
reg = <0x6 0x81008000 0x0 0x4000>;
@@ -412,7 +420,6 @@ port00: pci@0,0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 152 0>;
max-link-speed = <2>;
#address-cells = <3>;
#size-cells = <2>;
@@ -432,7 +439,6 @@ port01: pci@1,0 {
device_type = "pci";
reg = <0x800 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 153 0>;
max-link-speed = <2>;
#address-cells = <3>;
#size-cells = <2>;
@@ -452,7 +458,6 @@ port02: pci@2,0 {
device_type = "pci";
reg = <0x1000 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 33 0>;
max-link-speed = <1>;
#address-cells = <3>;
#size-cells = <2>;