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PCI: endpoint: Add reserved region type for MSI-X Table and PBA

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Add PCI_EPC_BAR_RSVD_MSIX_TBL_RAM and PCI_EPC_BAR_RSVD_MSIX_PBA_RAM to
enum pci_epc_bar_rsvd_region_type so that Endpoint controllers can
describe hardware-owned MSI-X Table and PBA (Pending Bit Array) regions
behind a BAR_RESERVED BAR.

Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Niklas Cassel <cassel@kernel.org>
Link: https://patch.msgid.link/20260324080857.916263-2-mmaddireddy@nvidia.com
This commit is contained in:
Manikanta Maddireddy
2026-03-24 13:38:54 +05:30
committed by Manivannan Sadhasivam
parent 9c55d0eb4e
commit 5f352433ea
1 changed files with 4 additions and 0 deletions
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4
include/linux/pci-epc.h
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@@ -211,6 +211,8 @@ enum pci_epc_bar_type {
/**
* enum pci_epc_bar_rsvd_region_type - type of a fixed subregion behind a BAR
* @PCI_EPC_BAR_RSVD_DMA_CTRL_MMIO: Integrated DMA controller MMIO window
* @PCI_EPC_BAR_RSVD_MSIX_TBL_RAM: MSI-X table structure
* @PCI_EPC_BAR_RSVD_MSIX_PBA_RAM: MSI-X PBA structure
*
* BARs marked BAR_RESERVED are owned by the SoC/EPC hardware and must not be
* reprogrammed by EPF drivers. Some of them still expose fixed subregions that
@@ -218,6 +220,8 @@ enum pci_epc_bar_type {
*/
enum pci_epc_bar_rsvd_region_type {
PCI_EPC_BAR_RSVD_DMA_CTRL_MMIO = 0,
PCI_EPC_BAR_RSVD_MSIX_TBL_RAM,
PCI_EPC_BAR_RSVD_MSIX_PBA_RAM,
};
/**