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irqchip/armada-370-xp: Don't read number of supported interrupts multiple times

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Use mpic_domain::hwirq_max at runtime instead of reading the same value
over and over from the MPIC_INT_CONTROL register.

Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/all/20240711115748.30268-8-kabel@kernel.org
This commit is contained in:
Marek Behún
2024-07-11 13:57:45 +02:00
committed by Thomas Gleixner
parent f63f54a2b8
commit 5ecafc9a64
1 changed files with 3 additions and 10 deletions
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13
drivers/irqchip/irq-armada-370-xp.c
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@@ -494,13 +494,7 @@ static int mpic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
static void mpic_smp_cpu_init(void)
{
u32 control;
int nr_irqs;
control = readl(main_int_base + MPIC_INT_CONTROL);
nr_irqs = (control >> 2) & 0x3ff;
for (int i = 0; i < nr_irqs; i++)
for (int i = 0; i < mpic_domain->hwirq_max; i++)
writel(i, per_cpu_int_base + MPIC_INT_SET_MASK);
if (!mpic_is_ipi_available())
@@ -706,10 +700,9 @@ static int mpic_suspend(void)
static void mpic_resume(void)
{
bool src0, src1;
int nirqs;
/* Re-enable interrupts */
nirqs = (readl(main_int_base + MPIC_INT_CONTROL) >> 2) & 0x3ff;
for (irq_hw_number_t irq = 0; irq < nirqs; irq++) {
for (irq_hw_number_t irq = 0; irq < mpic_domain->hwirq_max; irq++) {
struct irq_data *data;
unsigned int virq;