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drm/amdgpu/gfx9: Raven has two MECs

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This was missed when Andres' queue patches were rebased.

Fixes: 42794b27 (drm/amdgpu: take ownership of per-pipe configuration v3)
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher
2017-06-07 11:07:48 -04:00
parent 41f6a99abd
commit 5e7c8b0676
1 changed files with 1 additions and 0 deletions
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1
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
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@@ -872,6 +872,7 @@ static int gfx_v9_0_mec_init(struct amdgpu_device *adev)
switch (adev->asic_type) {
case CHIP_VEGA10:
case CHIP_RAVEN:
adev->gfx.mec.num_mec = 2;
break;
default: