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arm64: dts: mediatek: Introduce MT8188 Geralt platform based Ciri

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Introduce MT8188-based Chromebook Ciri, also known commercially as
Lenovo Chromebook Duet (11", 9).

Ciri is a detachable device based on the Geralt design, where Geralt is
the codename for the MT8188 platform. Ciri offers 8 SKUs to accommodate
different combinations of second-source components, including:
- audio codecs (RT5682S and ES8326)
- speaker amps (TAS2563 and MAX98390)
- MIPI-DSI panels (BOE nv110wum-l60 and IVO t109nw41)

Signed-off-by: Fei Shao <fshao@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20241124085739.290556-3-fshao@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
This commit is contained in:
Fei Shao
2024-11-24 16:52:38 +08:00
committed by AngeloGioacchino Del Regno
parent 3a11be8938
commit 5e6af7f541
11 changed files with 1902 additions and 0 deletions
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8
arch/arm64/boot/dts/mediatek/Makefile
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@@ -69,6 +69,14 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-voltorb-sku589824.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-voltorb-sku589825.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku0.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku2.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku3.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku4.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku5.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku6.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku7.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-asurada-hayato-r1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-asurada-hayato-r5-sku2.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-asurada-spherion-r0.dtb

32
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dts Normal file
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@@ -0,0 +1,32 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2023 Google LLC
*/
/dts-v1/;
#include "mt8188-geralt-ciri.dtsi"
/ {
model = "Google Ciri sku0 board";
compatible = "google,ciri-sku0", "google,ciri", "mediatek,mt8188";
};
&dsi_panel {
compatible = "boe,nv110wum-l60", "himax,hx83102";
};
&sound {
compatible = "mediatek,mt8188-rt5682s";
model = "mt8188_m98390_5682";
audio-routing =
"ETDM1_OUT", "ETDM_SPK_PIN",
"ETDM2_OUT", "ETDM_HP_PIN",
"ETDM1_IN", "ETDM_SPK_PIN",
"ETDM2_IN", "ETDM_HP_PIN",
"ADDA Capture", "MTKAIF_PIN",
"Headphone Jack", "HPOL",
"Headphone Jack", "HPOR",
"IN1P", "Headset Mic",
"Left Spk", "Front Left BE_OUT",
"Right Spk", "Front Right BE_OUT";
};

59
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dts Normal file
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@@ -0,0 +1,59 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2023 Google LLC
*/
/dts-v1/;
#include "mt8188-geralt-ciri.dtsi"
/ {
model = "Google Ciri sku1 board";
compatible = "google,ciri-sku1", "google,ciri", "mediatek,mt8188";
};
&dsi_panel {
compatible = "ivo,t109nw41", "himax,hx83102";
};
&i2c0 {
/delete-node/ audio-codec@1a;
es8326: audio-codec@19 {
compatible = "everest,es8326";
reg = <0x19>;
interrupts-extended = <&pio 108 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&audio_codec_pins>;
#sound-dai-cells = <0>;
everest,jack-pol = [0e];
everest,interrupt-clk = [00];
};
};
&sound {
compatible = "mediatek,mt8188-es8326";
model = "mt8188_m98390_8326";
audio-routing =
"ETDM1_OUT", "ETDM_SPK_PIN",
"ETDM2_OUT", "ETDM_HP_PIN",
"ETDM1_IN", "ETDM_SPK_PIN",
"ETDM2_IN", "ETDM_HP_PIN",
"ADDA Capture", "MTKAIF_PIN",
"Headphone Jack", "HPOL",
"Headphone Jack", "HPOR",
"MIC1", "Headset Mic",
"Left Spk", "Front Left BE_OUT",
"Right Spk", "Front Right BE_OUT";
dai-link-2 {
codec {
sound-dai = <&es8326>;
};
};
dai-link-3 {
codec {
sound-dai = <&es8326>;
};
};
};

59
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dts Normal file
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@@ -0,0 +1,59 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2024 Google LLC
*/
/dts-v1/;
#include "mt8188-geralt-ciri.dtsi"
/ {
model = "Google Ciri sku2 board";
compatible = "google,ciri-sku2", "google,ciri", "mediatek,mt8188";
};
&dsi_panel {
compatible = "boe,nv110wum-l60", "himax,hx83102";
};
&i2c0 {
/delete-node/ audio-codec@1a;
es8326: audio-codec@19 {
compatible = "everest,es8326";
reg = <0x19>;
interrupts-extended = <&pio 108 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&audio_codec_pins>;
#sound-dai-cells = <0>;
everest,jack-pol = [0e];
everest,interrupt-clk = [00];
};
};
&sound {
compatible = "mediatek,mt8188-es8326";
model = "mt8188_m98390_8326";
audio-routing =
"ETDM1_OUT", "ETDM_SPK_PIN",
"ETDM2_OUT", "ETDM_HP_PIN",
"ETDM1_IN", "ETDM_SPK_PIN",
"ETDM2_IN", "ETDM_HP_PIN",
"ADDA Capture", "MTKAIF_PIN",
"Headphone Jack", "HPOL",
"Headphone Jack", "HPOR",
"MIC1", "Headset Mic",
"Left Spk", "Front Left BE_OUT",
"Right Spk", "Front Right BE_OUT";
dai-link-2 {
codec {
sound-dai = <&es8326>;
};
};
dai-link-3 {
codec {
sound-dai = <&es8326>;
};
};
};

32
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dts Normal file
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@@ -0,0 +1,32 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2024 Google LLC
*/
/dts-v1/;
#include "mt8188-geralt-ciri.dtsi"
/ {
model = "Google Ciri sku3 board";
compatible = "google,ciri-sku3", "google,ciri", "mediatek,mt8188";
};
&dsi_panel {
compatible = "ivo,t109nw41", "himax,hx83102";
};
&sound {
compatible = "mediatek,mt8188-rt5682s";
model = "mt8188_m98390_5682";
audio-routing =
"ETDM1_OUT", "ETDM_SPK_PIN",
"ETDM2_OUT", "ETDM_HP_PIN",
"ETDM1_IN", "ETDM_SPK_PIN",
"ETDM2_IN", "ETDM_HP_PIN",
"ADDA Capture", "MTKAIF_PIN",
"Headphone Jack", "HPOL",
"Headphone Jack", "HPOR",
"IN1P", "Headset Mic",
"Left Spk", "Front Left BE_OUT",
"Right Spk", "Front Right BE_OUT";
};

48
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dts Normal file
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@@ -0,0 +1,48 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2024 Google LLC
*/
/dts-v1/;
#include "mt8188-geralt-ciri.dtsi"
/ {
model = "Google Ciri sku4 board (rev4)";
compatible = "google,ciri-sku4", "google,ciri", "mediatek,mt8188";
};
&dsi_panel {
compatible = "boe,nv110wum-l60", "himax,hx83102";
};
&i2c0 {
/delete-node/ amplifier@38;
/delete-node/ amplifier@39;
tas2563: amplifier@4f {
compatible = "ti,tas2563", "ti,tas2781";
reg = <0x4f>, <0x4c>; /* left / right channel */
reset-gpios = <&pio 118 GPIO_ACTIVE_HIGH>;
#sound-dai-cells = <0>;
};
};
&sound {
compatible = "mediatek,mt8188-rt5682s";
model = "mt8188_tas2563_5682";
audio-routing =
"ETDM1_OUT", "ETDM_SPK_PIN",
"ETDM2_OUT", "ETDM_HP_PIN",
"ETDM1_IN", "ETDM_SPK_PIN",
"ETDM2_IN", "ETDM_HP_PIN",
"ADDA Capture", "MTKAIF_PIN",
"Headphone Jack", "HPOL",
"Headphone Jack", "HPOR",
"IN1P", "Headset Mic";
dai-link-1 {
codec {
sound-dai = <&tas2563>;
};
};
};

72
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dts Normal file
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@@ -0,0 +1,72 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2024 Google LLC
*/
/dts-v1/;
#include "mt8188-geralt-ciri.dtsi"
/ {
model = "Google Ciri sku5 board (rev4)";
compatible = "google,ciri-sku5", "google,ciri", "mediatek,mt8188";
};
&dsi_panel {
compatible = "ivo,t109nw41", "himax,hx83102";
};
&i2c0 {
/delete-node/ audio-codec@1a;
/delete-node/ amplifier@38;
/delete-node/ amplifier@39;
es8326: audio-codec@19 {
compatible = "everest,es8326";
reg = <0x19>;
interrupts-extended = <&pio 108 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&audio_codec_pins>;
#sound-dai-cells = <0>;
everest,jack-pol = [0e];
everest,interrupt-clk = [00];
};
tas2563: amplifier@4f {
compatible = "ti,tas2563", "ti,tas2781";
reg = <0x4f>, <0x4c>; /* left / right channel */
reset-gpios = <&pio 118 GPIO_ACTIVE_HIGH>;
#sound-dai-cells = <0>;
};
};
&sound {
compatible = "mediatek,mt8188-es8326";
model = "mt8188_tas2563_8326";
audio-routing =
"ETDM1_OUT", "ETDM_SPK_PIN",
"ETDM2_OUT", "ETDM_HP_PIN",
"ETDM1_IN", "ETDM_SPK_PIN",
"ETDM2_IN", "ETDM_HP_PIN",
"ADDA Capture", "MTKAIF_PIN",
"Headphone Jack", "HPOL",
"Headphone Jack", "HPOR",
"MIC1", "Headset Mic";
dai-link-1 {
codec {
sound-dai = <&tas2563>;
};
};
dai-link-2 {
codec {
sound-dai = <&es8326>;
};
};
dai-link-3 {
codec {
sound-dai = <&es8326>;
};
};
};

72
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dts Normal file
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@@ -0,0 +1,72 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2024 Google LLC
*/
/dts-v1/;
#include "mt8188-geralt-ciri.dtsi"
/ {
model = "Google Ciri sku6 board (rev4)";
compatible = "google,ciri-sku6", "google,ciri", "mediatek,mt8188";
};
&dsi_panel {
compatible = "boe,nv110wum-l60", "himax,hx83102";
};
&i2c0 {
/delete-node/ audio-codec@1a;
/delete-node/ amplifier@38;
/delete-node/ amplifier@39;
es8326: audio-codec@19 {
compatible = "everest,es8326";
reg = <0x19>;
interrupts-extended = <&pio 108 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&audio_codec_pins>;
#sound-dai-cells = <0>;
everest,jack-pol = [0e];
everest,interrupt-clk = [00];
};
tas2563: amplifier@4f {
compatible = "ti,tas2563", "ti,tas2781";
reg = <0x4f>, <0x4c>; /* left / right channel */
reset-gpios = <&pio 118 GPIO_ACTIVE_HIGH>;
#sound-dai-cells = <0>;
};
};
&sound {
compatible = "mediatek,mt8188-es8326";
model = "mt8188_tas2563_8326";
audio-routing =
"ETDM1_OUT", "ETDM_SPK_PIN",
"ETDM2_OUT", "ETDM_HP_PIN",
"ETDM1_IN", "ETDM_SPK_PIN",
"ETDM2_IN", "ETDM_HP_PIN",
"ADDA Capture", "MTKAIF_PIN",
"Headphone Jack", "HPOL",
"Headphone Jack", "HPOR",
"MIC1", "Headset Mic";
dai-link-1 {
codec {
sound-dai = <&tas2563>;
};
};
dai-link-2 {
codec {
sound-dai = <&es8326>;
};
};
dai-link-3 {
codec {
sound-dai = <&es8326>;
};
};
};

48
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dts Normal file
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@@ -0,0 +1,48 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2024 Google LLC
*/
/dts-v1/;
#include "mt8188-geralt-ciri.dtsi"
/ {
model = "Google Ciri sku7 board (rev4)";
compatible = "google,ciri-sku7", "google,ciri", "mediatek,mt8188";
};
&dsi_panel {
compatible = "ivo,t109nw41", "himax,hx83102";
};
&i2c0 {
/delete-node/ amplifier@38;
/delete-node/ amplifier@39;
tas2563: amplifier@4f {
compatible = "ti,tas2563", "ti,tas2781";
reg = <0x4f>, <0x4c>; /* left / right channel */
reset-gpios = <&pio 118 GPIO_ACTIVE_HIGH>;
#sound-dai-cells = <0>;
};
};
&sound {
compatible = "mediatek,mt8188-rt5682s";
model = "mt8188_tas2563_5682";
audio-routing =
"ETDM1_OUT", "ETDM_SPK_PIN",
"ETDM2_OUT", "ETDM_HP_PIN",
"ETDM1_IN", "ETDM_SPK_PIN",
"ETDM2_IN", "ETDM_HP_PIN",
"ADDA Capture", "MTKAIF_PIN",
"Headphone Jack", "HPOL",
"Headphone Jack", "HPOR",
"IN1P", "Headset Mic";
dai-link-1 {
codec {
sound-dai = <&tas2563>;
};
};
};

316
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri.dtsi Normal file
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@@ -0,0 +1,316 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2023 Google LLC
*/
/dts-v1/;
#include "mt8188-geralt.dtsi"
&aud_etdm_hp_on {
pins-mclk {
pinmux = <PINMUX_GPIO114__FUNC_O_I2SO2_MCK>;
};
};
&aud_etdm_hp_off {
pins-mclk {
pinmux = <PINMUX_GPIO114__FUNC_B_GPIO114>;
bias-pull-down;
input-enable;
};
};
&i2c0 {
rt5682s: audio-codec@1a {
compatible = "realtek,rt5682s";
reg = <0x1a>;
interrupts-extended = <&pio 108 IRQ_TYPE_EDGE_BOTH>;
pinctrl-names = "default";
pinctrl-0 = <&audio_codec_pins>;
#sound-dai-cells = <1>;
AVDD-supply = <&mt6359_vio18_ldo_reg>;
DBVDD-supply = <&mt6359_vio18_ldo_reg>;
LDO1-IN-supply = <&mt6359_vio18_ldo_reg>;
MICVDD-supply = <&pp3300_s3>;
realtek,jd-src = <1>;
};
max98390_38: amplifier@38 {
compatible = "maxim,max98390";
reg = <0x38>;
sound-name-prefix = "Front Right";
reset-gpios = <&pio 118 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&speaker_en>;
#sound-dai-cells = <0>;
};
max98390_39: amplifier@39 {
compatible = "maxim,max98390";
reg = <0x39>;
sound-name-prefix = "Front Left";
#sound-dai-cells = <0>;
};
};
&i2c_tunnel {
/*
* The virtual battery I2C addr is 0xf on Ciri, so we describe it
* manually instead of including 'arm/cros-ec-sbs.dtsi'.
**/
battery: sbs-battery@f {
compatible = "sbs,sbs-battery";
reg = <0xf>;
sbs,i2c-retry-count = <2>;
sbs,poll-retry-count = <1>;
};
};
&mipi_tx_config0 {
drive-strength-microamp = <5200>;
};
&mt6359_vm18_ldo_reg {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1900000>;
regulator-microvolt-offset = <100000>;
};
&sound {
dai-link-0 {
link-name = "ETDM1_IN_BE";
dai-format = "i2s";
mediatek,clk-provider = "cpu";
};
dai-link-1 {
link-name = "ETDM1_OUT_BE";
dai-format = "i2s";
mediatek,clk-provider = "cpu";
codec {
sound-dai = <&max98390_38>,
<&max98390_39>;
};
};
dai-link-2 {
link-name = "ETDM2_IN_BE";
mediatek,clk-provider = "cpu";
codec {
sound-dai = <&rt5682s 0>;
};
};
dai-link-3 {
link-name = "ETDM2_OUT_BE";
mediatek,clk-provider = "cpu";
codec {
sound-dai = <&rt5682s 0>;
};
};
dai-link-4 {
link-name = "DPTX_BE";
codec {
sound-dai = <&dp_tx>;
};
};
};
&pio {
gpio-line-names =
"GSC_AP_INT_ODL",
"AP_DISP_BKLTEN",
"",
"EN_PPVAR_MIPI_DISP",
"EN_PPVAR_MIPI_DISP_150MA",
"TCHSCR_RST_1V8_L",
"",
"",
"",
"",
"",
"I2S_SPKR_DATAOUT",
"EN_PP3300_WLAN_X",
"WIFI_KILL_1V8_L",
"BT_KILL_1V8_L",
"AP_FLASH_WP_L", /* ... is crossystem ABI. Rev1 schematics call it AP_WP_ODL. */
"",
"",
"WCAM_PWDN_L",
"WCAM_RST_L",
"UCAM_PWDM_L",
"UCAM_RST_L",
"WCAM_24M_CLK",
"UCAM_24M_CLK",
"MT6319_INT",
"DISP_RST_1V8_L",
"DSIO_DSI_TE",
"",
"TP",
"MIPI_BL_PWM_1V8",
"",
"UART_AP_TX_GSC_RX",
"UART_GSC_TX_AP_RX",
"UART_SSPM_TX_DBGCON_RX",
"UART_DBGCON_TX_SSPM_RX",
"UART_ADSP_TX_DBGCON_RX",
"UART_DBGCON_TX_ADSP_RX",
"JTAG_AP_TMS",
"JTAG_AP_TCK",
"JTAG_AP_TDI",
"JTAG_AP_TDO",
"JTAG_AP_TRST",
"AP_KPCOL0",
"TP",
"",
"TP",
"EC_AP_HPD_OD",
"PCIE_WAKE_1V8_ODL",
"PCIE_RST_1V8_L",
"PCIE_CLKREQ_1V8_ODL",
"",
"",
"",
"",
"",
"AP_I2C_AUD_SCL_1V8",
"AP_I2C_AUD_SDA_1V8",
"AP_I2C_TPM_SCL_1V8",
"AP_I2C_TPM_SDA_1V8",
"AP_I2C_TCHSCR_SCL_1V8",
"AP_I2C_TCHSCR_SDA_1V8",
"AP_I2C_PMIC_SAR_SCL_1V8",
"AP_I2C_PMIC_SAR_SDA_1V8",
"AP_I2C_EC_HID_KB_SCL_1V8",
"AP_I2C_EC_HID_KB_SDA_1V8",
"AP_I2C_UCAM_SCL_1V8",
"AP_I2C_UCAM_SDA_1V8",
"AP_I2C_WCAM_SCL_1V8",
"AP_I2C_WCAM_SDA_1V8",
"SPI_AP_CS_EC_L",
"SPI_AP_CLK_EC",
"SPI_AP_DO_EC_DI",
"SPI_AP_DI_EC_DO",
"TP",
"TP",
"SPI_AP_CS_TCHSCR_L",
"SPI_AP_CLK_TCHSCR",
"SPI_AP_DO_TCHSCR_DI",
"SPI_AP_DI_TCHSCR_DO",
"TP",
"TP",
"TP",
"TP",
"",
"",
"",
"TP",
"",
"",
"",
"",
"",
"PWRAP_SPI_CS_L",
"PWRAP_SPI_CK",
"PWRAP_SPI_MOSI",
"PWRAP_SPI_MISO",
"SRCLKENA0",
"SRCLKENA1",
"SCP_VREQ_VAO",
"AP_RTC_CLK32K",
"AP_PMIC_WDTRST_L",
"AUD_CLK_MOSI",
"AUD_SYNC_MOSI",
"AUD_DAT_MOSI0",
"AUD_DAT_MOSI1",
"AUD_DAT_MISO0",
"AUD_DAT_MISO1",
"",
"HP_INT_ODL",
"SPKR_INT_ODL",
"I2S_HP_DATAIN",
"EN_SPKR",
"I2S_SPKR_MCLK",
"I2S_SPKR_BCLK",
"I2S_HP_MCLK",
"I2S_HP_BCLK",
"I2S_HP_LRCK",
"I2S_HP_DATAOUT",
"RST_SPKR_L",
"I2S_SPKR_LRCK",
"I2S_SPKR_DATAIN",
"",
"",
"",
"",
"SPI_AP_CLK_ROM",
"SPI_AP_CS_ROM_L",
"SPI_AP_DO_ROM_DI",
"SPI_AP_DI_ROM_DO",
"TP",
"TP",
"",
"",
"",
"",
"",
"",
"",
"",
"EN_PP2800A_UCAM_X",
"EN_PP1200_UCAM_X",
"EN_PP2800A_WCAM_X",
"EN_PP1100_WCAM_X",
"TCHSCR_INT_1V8_L",
"",
"MT7921_PMU_EN_1V8",
"",
"AP_EC_WARM_RST_REQ",
"EC_AP_HID_INT_ODL",
"EC_AP_INT_ODL",
"AP_XHCI_INIT_DONE",
"EMMC_DAT7",
"EMMC_DAT6",
"EMMC_DAT5",
"EMMC_DAT4",
"EMMC_RST_L",
"EMMC_CMD",
"EMMC_CLK",
"EMMC_DAT3",
"EMMC_DAT2",
"EMMC_DAT1",
"EMMC_DAT0",
"EMMC_DSL",
"",
"",
"",
"",
"",
"",
"",
"",
"USB3_HUB_RST_L",
"EC_AP_RSVD0_ODL",
"",
"",
"SPMI_SCL",
"SPMI_SDA";
audio_codec_pins: audio-codec-pins {
pins-hp-int-odl {
pinmux = <PINMUX_GPIO108__FUNC_B_GPIO108>;
input-enable;
};
};
speaker_en: speaker-en-pins {
pins-en-spkr {
pinmux = <PINMUX_GPIO111__FUNC_B_GPIO111>;
};
};
};

1156
arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi Normal file
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