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Merge tag 'qcom-arm64-fixes-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
Qualcomm ARM64 DeviceTree fixes for v6.6 This fixes an error with an incorrect gpio-ranges preventing the PMIC GPIO instances from being registered on SA877P, and fixes a regression from a refactoring of the top-level clocks node that caused divclocks to no longer probe on a few of the MSM8996 devices. * tag 'qcom-arm64-fixes-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: msm8996-xiaomi: fix missing clock populate arm64: dts: qcom: apq8096-db820c: fix missing clock populate arm64: dts: qcom: sa8775p: correct PMIC GPIO label in gpio-ranges Link: https://lore.kernel.org/r/20231015180112.853805-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
@@ -62,25 +62,23 @@ chosen {
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stdout-path = "serial0:115200n8";
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};
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clocks {
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divclk4: divclk4 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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clock-output-names = "divclk4";
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div1_mclk: divclk1 {
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compatible = "gpio-gate-clock";
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pinctrl-0 = <&audio_mclk>;
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pinctrl-names = "default";
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clocks = <&rpmcc RPM_SMD_DIV_CLK1>;
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#clock-cells = <0>;
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enable-gpios = <&pm8994_gpios 15 0>;
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};
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pinctrl-names = "default";
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pinctrl-0 = <&divclk4_pin_a>;
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};
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divclk4: divclk4 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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clock-output-names = "divclk4";
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div1_mclk: divclk1 {
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compatible = "gpio-gate-clock";
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pinctrl-0 = <&audio_mclk>;
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pinctrl-names = "default";
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clocks = <&rpmcc RPM_SMD_DIV_CLK1>;
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#clock-cells = <0>;
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enable-gpios = <&pm8994_gpios 15 0>;
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};
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pinctrl-names = "default";
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pinctrl-0 = <&divclk4_pin_a>;
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};
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gpio-keys {
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@@ -11,26 +11,24 @@
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#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
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/ {
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clocks {
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divclk1_cdc: divclk1 {
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compatible = "gpio-gate-clock";
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clocks = <&rpmcc RPM_SMD_DIV_CLK1>;
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#clock-cells = <0>;
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enable-gpios = <&pm8994_gpios 15 GPIO_ACTIVE_HIGH>;
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divclk1_cdc: divclk1 {
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compatible = "gpio-gate-clock";
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clocks = <&rpmcc RPM_SMD_DIV_CLK1>;
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#clock-cells = <0>;
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enable-gpios = <&pm8994_gpios 15 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&divclk1_default>;
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};
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pinctrl-names = "default";
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pinctrl-0 = <&divclk1_default>;
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};
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divclk4: divclk4 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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clock-output-names = "divclk4";
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divclk4: divclk4 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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clock-output-names = "divclk4";
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pinctrl-names = "default";
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pinctrl-0 = <&divclk4_pin_a>;
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};
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pinctrl-names = "default";
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pinctrl-0 = <&divclk4_pin_a>;
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};
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gpio-keys {
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@@ -20,16 +20,14 @@ / {
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qcom,pmic-id = <0x20009 0x2000a 0x00 0x00>;
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qcom,board-id = <31 0>;
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clocks {
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divclk2_haptics: divclk2 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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clock-output-names = "divclk2";
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divclk2_haptics: divclk2 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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clock-output-names = "divclk2";
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pinctrl-names = "default";
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pinctrl-0 = <&divclk2_pin_a>;
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};
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pinctrl-names = "default";
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pinctrl-0 = <&divclk2_pin_a>;
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};
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};
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@@ -173,7 +173,7 @@ pmm8654au_1_gpios: gpio@8800 {
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compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
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reg = <0x8800>;
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gpio-controller;
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gpio-ranges = <&pmm8654au_2_gpios 0 0 12>;
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gpio-ranges = <&pmm8654au_1_gpios 0 0 12>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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