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arm64: Downgrade flush_icache_range to invalidate
Since __flush_dcache_area is called right before, invalidate_icache_range is sufficient in this case. Rewrite the comment to better explain the rationale behind the cache maintenance operations used here. No functional change intended. Possible performance impact due to invalidating only the icache rather than invalidating and cleaning both caches. Reported-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/linux-arch/20200511110014.lb9PEahJ4hVOYrbwIb_qUHXyNy9KQzNFdb_I3YlzY6A@z/ Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Fuad Tabba <tabba@google.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20210524083001.2586635-7-tabba@google.com Signed-off-by: Will Deacon <will@kernel.org>
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@@ -68,10 +68,14 @@ int machine_kexec_post_load(struct kimage *kimage)
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kimage->arch.kern_reloc = __pa(reloc_code);
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kexec_image_info(kimage);
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/* Flush the reloc_code in preparation for its execution. */
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/*
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* For execution with the MMU off, reloc_code needs to be cleaned to the
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* PoC and invalidated from the I-cache.
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*/
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__flush_dcache_area(reloc_code, arm64_relocate_new_kernel_size);
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flush_icache_range((uintptr_t)reloc_code, (uintptr_t)reloc_code +
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arm64_relocate_new_kernel_size);
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invalidate_icache_range((uintptr_t)reloc_code,
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(uintptr_t)reloc_code +
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arm64_relocate_new_kernel_size);
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return 0;
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}
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