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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-01 04:53:09 -04:00
drm/amdgpu: remove redundant RAS error address coversion code
Only one interface is responsible for the conversion. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
@@ -175,24 +175,41 @@ static void umc_v12_0_query_ras_error_count(struct amdgpu_device *adev,
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static void umc_v12_0_convert_error_address(struct amdgpu_device *adev,
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struct ras_err_data *err_data,
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struct ta_ras_query_address_input *addr_in)
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struct ta_ras_query_address_input *addr_in,
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struct ta_ras_query_address_output *addr_out,
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bool dump_addr)
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{
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uint32_t col, row, bank, channel_index;
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uint32_t col, row, bank, channel_index, umc_inst = 0;
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uint64_t soc_pa, retired_page, column, err_addr;
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struct ta_ras_query_address_output addr_out;
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struct ta_ras_query_address_output addr_out_tmp;
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struct ta_ras_query_address_output *paddr_out;
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err_addr = addr_in->ma.err_addr;
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addr_in->addr_type = TA_RAS_MCA_TO_PA;
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if (psp_ras_query_address(&adev->psp, addr_in, &addr_out)) {
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dev_warn(adev->dev, "Failed to query RAS physical address for 0x%llx",
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err_addr);
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if (!addr_out)
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paddr_out = &addr_out_tmp;
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else
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paddr_out = addr_out;
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return;
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err_addr = bank = channel_index = 0;
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if (addr_in) {
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err_addr = addr_in->ma.err_addr;
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addr_in->addr_type = TA_RAS_MCA_TO_PA;
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if (psp_ras_query_address(&adev->psp, addr_in, paddr_out)) {
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dev_warn(adev->dev, "Failed to query RAS physical address for 0x%llx",
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err_addr);
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return;
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}
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bank = paddr_out->pa.bank;
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channel_index = paddr_out->pa.channel_idx;
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/* no need to care about umc inst if addr_in is NULL */
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umc_inst = addr_in->ma.umc_inst;
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}
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soc_pa = addr_out.pa.pa;
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bank = addr_out.pa.bank;
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channel_index = addr_out.pa.channel_idx;
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soc_pa = paddr_out->pa.pa;
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if (!err_data && !dump_addr)
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return;
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col = (err_addr >> 1) & 0x1fULL;
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/* clear [C3 C2] in soc physical address */
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@@ -213,76 +230,47 @@ static void umc_v12_0_convert_error_address(struct amdgpu_device *adev,
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col |= (column << 2);
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row = (retired_page >> UMC_V12_0_PA_R0_BIT) & 0x3fffULL;
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dev_info(adev->dev,
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"Error Address(PA):0x%-10llx Row:0x%-4x Col:0x%-2x Bank:0x%x Channel:0x%x\n",
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retired_page, row, col, bank, channel_index);
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amdgpu_umc_fill_error_record(err_data, err_addr,
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retired_page, channel_index, addr_in->ma.umc_inst);
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}
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}
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if (dump_addr)
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dev_info(adev->dev,
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"Error Address(PA):0x%-10llx Row:0x%-4x Col:0x%-2x Bank:0x%x Channel:0x%x\n",
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retired_page, row, col, bank, channel_index);
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static void umc_v12_0_dump_addr_info(struct amdgpu_device *adev,
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struct ta_ras_query_address_output *addr_out,
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uint64_t err_addr)
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{
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uint32_t col, row, bank, channel_index;
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uint64_t soc_pa, retired_page, column;
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soc_pa = addr_out->pa.pa;
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bank = addr_out->pa.bank;
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channel_index = addr_out->pa.channel_idx;
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col = (err_addr >> 1) & 0x1fULL;
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/* clear [C3 C2] in soc physical address */
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soc_pa &= ~(0x3ULL << UMC_V12_0_PA_C2_BIT);
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/* clear [C4] in soc physical address */
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soc_pa &= ~(0x1ULL << UMC_V12_0_PA_C4_BIT);
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/* clear [R13] in soc physical address */
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soc_pa &= ~(0x1ULL << UMC_V12_0_PA_R13_BIT);
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/* loop for all possibilities of [R13 C4 C3 C2] */
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for (column = 0; column < UMC_V12_0_BAD_PAGE_NUM_PER_CHANNEL; column++) {
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retired_page = soc_pa | ((column & 0x3) << UMC_V12_0_PA_C2_BIT);
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retired_page |= (((column & 0x4) >> 2) << UMC_V12_0_PA_C4_BIT);
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retired_page |= (((column & 0x8) >> 3) << UMC_V12_0_PA_R13_BIT);
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/* include column bit 0 and 1 */
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col &= 0x3;
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col |= ((column & 0x7) << 2);
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row = (retired_page >> UMC_V12_0_PA_R0_BIT) & 0x3fffULL;
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dev_info(adev->dev,
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"Error Address(PA):0x%-10llx Row:0x%-4x Col:0x%-2x Bank:0x%x Channel:0x%x\n",
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retired_page, row, col, bank, channel_index);
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if (err_data)
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amdgpu_umc_fill_error_record(err_data, err_addr,
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retired_page, channel_index, umc_inst);
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}
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}
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static int umc_v12_0_lookup_bad_pages_in_a_row(struct amdgpu_device *adev,
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uint64_t pa_addr, uint64_t *pfns, int len)
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{
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uint64_t soc_pa, retired_page, column;
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uint32_t pos = 0;
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uint32_t i, ret = 0, pos = 0;
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struct ta_ras_query_address_output addr_out;
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struct ras_err_data err_data;
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soc_pa = pa_addr;
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/* clear [C3 C2] in soc physical address */
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soc_pa &= ~(0x3ULL << UMC_V12_0_PA_C2_BIT);
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/* clear [C4] in soc physical address */
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soc_pa &= ~(0x1ULL << UMC_V12_0_PA_C4_BIT);
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/* clear [R13] in soc physical address */
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soc_pa &= ~(0x1ULL << UMC_V12_0_PA_R13_BIT);
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/* loop for all possibilities of [C4 C3 C2] */
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for (column = 0; column < UMC_V12_0_BAD_PAGE_NUM_PER_CHANNEL; column++) {
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retired_page = soc_pa | ((column & 0x3) << UMC_V12_0_PA_C2_BIT);
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retired_page |= (((column & 0x4) >> 2) << UMC_V12_0_PA_C4_BIT);
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retired_page |= (((column & 0x8) >> 3) << UMC_V12_0_PA_R13_BIT);
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if (pos >= len)
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return 0;
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pfns[pos++] = retired_page >> AMDGPU_GPU_PAGE_SHIFT;
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err_data.err_addr =
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kcalloc(adev->umc.max_ras_err_cnt_per_query,
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sizeof(struct eeprom_table_record), GFP_KERNEL);
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if (!err_data.err_addr) {
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dev_warn(adev->dev, "Failed to alloc memory in bad page lookup!\n");
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return 0;
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}
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return pos;
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addr_out.pa.pa = pa_addr;
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umc_v12_0_convert_error_address(adev, &err_data, NULL, &addr_out, false);
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for (i = 0; i < adev->umc.max_ras_err_cnt_per_query; i++) {
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if (pos >= len)
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goto out;
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pfns[pos] = err_data.err_addr[pos].retired_page;
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pos++;
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}
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ret = pos;
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out:
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kfree(err_data.err_addr);
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return ret;
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}
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static int umc_v12_0_convert_mca_to_addr(struct amdgpu_device *adev,
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@@ -300,14 +288,8 @@ static int umc_v12_0_convert_mca_to_addr(struct amdgpu_device *adev,
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addr_in.ma.node_inst = node;
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addr_in.ma.socket_id = socket;
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addr_in.addr_type = TA_RAS_MCA_TO_PA;
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if (psp_ras_query_address(&adev->psp, &addr_in, &addr_out)) {
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dev_warn(adev->dev, "Failed to query RAS physical address for 0x%llx",
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err_addr);
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return -EINVAL;
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}
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if (dump_addr)
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umc_v12_0_dump_addr_info(adev, &addr_out, err_addr);
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umc_v12_0_convert_error_address(adev, NULL, &addr_in, &addr_out, dump_addr);
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*addr = addr_out.pa.pa;
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@@ -363,7 +345,7 @@ static int umc_v12_0_query_error_address(struct amdgpu_device *adev,
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addr_in.ma.umc_inst = umc_inst;
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addr_in.ma.node_inst = node_inst;
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umc_v12_0_convert_error_address(adev, err_data, &addr_in);
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umc_v12_0_convert_error_address(adev, err_data, &addr_in, NULL, true);
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}
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/* clear umc status */
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