soc: qcom: geni-se: Introduce helper API for resource initialization

The GENI Serial Engine drivers (I2C, SPI, and SERIAL) currently duplicate
code for initializing shared resources such as clocks and interconnect
paths.

Introduce a new helper API, geni_se_resources_init(), to centralize this
initialization logic, improving modularity and simplifying the probe
function.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20260227061544.1785978-4-praveen.talari@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Praveen Talari
2026-02-27 11:45:34 +05:30
committed by Bjorn Andersson
parent f746fedb89
commit 5b8a39dcf9
2 changed files with 53 additions and 0 deletions

View File

@@ -19,6 +19,7 @@
#include <linux/of_platform.h>
#include <linux/pinctrl/consumer.h>
#include <linux/platform_device.h>
#include <linux/pm_opp.h>
#include <linux/soc/qcom/geni-se.h>
/**
@@ -1012,6 +1013,52 @@ int geni_icc_disable(struct geni_se *se)
}
EXPORT_SYMBOL_GPL(geni_icc_disable);
/**
* geni_se_resources_init() - Initialize resources for a GENI SE device.
* @se: Pointer to the geni_se structure representing the GENI SE device.
*
* This function initializes various resources required by the GENI Serial Engine
* (SE) device, including clock resources (core and SE clocks), interconnect
* paths for communication.
* It retrieves optional and mandatory clock resources, adds an OF-based
* operating performance point (OPP) table, and sets up interconnect paths
* with default bandwidths. The function also sets a flag (`has_opp`) to
* indicate whether OPP support is available for the device.
*
* Return: 0 on success, or a negative errno on failure.
*/
int geni_se_resources_init(struct geni_se *se)
{
int ret;
se->core_clk = devm_clk_get_optional(se->dev, "core");
if (IS_ERR(se->core_clk))
return dev_err_probe(se->dev, PTR_ERR(se->core_clk),
"Failed to get optional core clk\n");
se->clk = devm_clk_get(se->dev, "se");
if (IS_ERR(se->clk) && !has_acpi_companion(se->dev))
return dev_err_probe(se->dev, PTR_ERR(se->clk),
"Failed to get SE clk\n");
ret = devm_pm_opp_set_clkname(se->dev, "se");
if (ret)
return ret;
ret = devm_pm_opp_of_add_table(se->dev);
if (ret && ret != -ENODEV)
return dev_err_probe(se->dev, ret, "Failed to add OPP table\n");
se->has_opp = (ret == 0);
ret = geni_icc_get(se, "qup-memory");
if (ret)
return ret;
return geni_icc_set_bw_ab(se, GENI_DEFAULT_BW, GENI_DEFAULT_BW, GENI_DEFAULT_BW);
}
EXPORT_SYMBOL_GPL(geni_se_resources_init);
/**
* geni_find_protocol_fw() - Locate and validate SE firmware for a protocol.
* @dev: Pointer to the device structure.

View File

@@ -60,18 +60,22 @@ struct geni_icc_path {
* @dev: Pointer to the Serial Engine device
* @wrapper: Pointer to the parent QUP Wrapper core
* @clk: Handle to the core serial engine clock
* @core_clk: Auxiliary clock, which may be required by a protocol
* @num_clk_levels: Number of valid clock levels in clk_perf_tbl
* @clk_perf_tbl: Table of clock frequency input to serial engine clock
* @icc_paths: Array of ICC paths for SE
* @has_opp: Indicates if OPP is supported
*/
struct geni_se {
void __iomem *base;
struct device *dev;
struct geni_wrapper *wrapper;
struct clk *clk;
struct clk *core_clk;
unsigned int num_clk_levels;
unsigned long *clk_perf_tbl;
struct geni_icc_path icc_paths[3];
bool has_opp;
};
/* Common SE registers */
@@ -535,6 +539,8 @@ int geni_icc_enable(struct geni_se *se);
int geni_icc_disable(struct geni_se *se);
int geni_se_resources_init(struct geni_se *se);
int geni_load_se_firmware(struct geni_se *se, enum geni_se_protocol_type protocol);
#endif
#endif