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arm64: dts: imx8m: Document the fuse address calculation

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The mapping from OCOTP reg DT property to Fusemap Descriptions Table in
the datasheet is often unclear. Add a comment to make it easier to find
out how it works. No functional change.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Marek Vasut
2022-12-02 17:23:51 +01:00
committed by Shawn Guo
parent ee0d68f219
commit 5b81a87ddd
4 changed files with 65 additions and 13 deletions
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19
arch/arm64/boot/dts/freescale/imx8mm.dtsi
View File

@@ -563,15 +563,28 @@ ocotp: efuse@30350000 {
#address-cells = <1>;
#size-cells = <1>;
imx8mm_uid: unique-id@4 {
/*
* The register address below maps to the MX8M
* Fusemap Description Table entries this way.
* Assuming
* reg = <ADDR SIZE>;
* then
* Fuse Address = (ADDR * 4) + 0x400
* Note that if SIZE is greater than 4, then
* each subsequent fuse is located at offset
* +0x10 in Fusemap Description Table (e.g.
* reg = <0x4 0x8> describes fuses 0x410 and
* 0x420).
*/
imx8mm_uid: unique-id@4 { /* 0x410-0x420 */
reg = <0x4 0x8>;
};
cpu_speed_grade: speed-grade@10 {
cpu_speed_grade: speed-grade@10 { /* 0x440 */
reg = <0x10 4>;
};
fec_mac_address: mac-address@90 {
fec_mac_address: mac-address@90 { /* 0x640 */
reg = <0x90 6>;
};
};

19
arch/arm64/boot/dts/freescale/imx8mn.dtsi
View File

@@ -564,15 +564,28 @@ ocotp: efuse@30350000 {
#address-cells = <1>;
#size-cells = <1>;
imx8mn_uid: unique-id@4 {
/*
* The register address below maps to the MX8M
* Fusemap Description Table entries this way.
* Assuming
* reg = <ADDR SIZE>;
* then
* Fuse Address = (ADDR * 4) + 0x400
* Note that if SIZE is greater than 4, then
* each subsequent fuse is located at offset
* +0x10 in Fusemap Description Table (e.g.
* reg = <0x4 0x8> describes fuses 0x410 and
* 0x420).
*/
imx8mn_uid: unique-id@4 { /* 0x410-0x420 */
reg = <0x4 0x8>;
};
cpu_speed_grade: speed-grade@10 {
cpu_speed_grade: speed-grade@10 { /* 0x440 */
reg = <0x10 4>;
};
fec_mac_address: mac-address@90 {
fec_mac_address: mac-address@90 { /* 0x640 */
reg = <0x90 6>;
};
};

21
arch/arm64/boot/dts/freescale/imx8mp.dtsi
View File

@@ -425,19 +425,32 @@ ocotp: efuse@30350000 {
#address-cells = <1>;
#size-cells = <1>;
imx8mp_uid: unique-id@8 {
/*
* The register address below maps to the MX8M
* Fusemap Description Table entries this way.
* Assuming
* reg = <ADDR SIZE>;
* then
* Fuse Address = (ADDR * 4) + 0x400
* Note that if SIZE is greater than 4, then
* each subsequent fuse is located at offset
* +0x10 in Fusemap Description Table (e.g.
* reg = <0x8 0x8> describes fuses 0x420 and
* 0x430).
*/
imx8mp_uid: unique-id@8 { /* 0x420-0x430 */
reg = <0x8 0x8>;
};
cpu_speed_grade: speed-grade@10 {
cpu_speed_grade: speed-grade@10 { /* 0x440 */
reg = <0x10 4>;
};
eth_mac1: mac-address@90 {
eth_mac1: mac-address@90 { /* 0x640 */
reg = <0x90 6>;
};
eth_mac2: mac-address@96 {
eth_mac2: mac-address@96 { /* 0x658 */
reg = <0x96 6>;
};
};

19
arch/arm64/boot/dts/freescale/imx8mq.dtsi
View File

@@ -593,15 +593,28 @@ ocotp: efuse@30350000 {
#address-cells = <1>;
#size-cells = <1>;
imx8mq_uid: soc-uid@4 {
/*
* The register address below maps to the MX8M
* Fusemap Description Table entries this way.
* Assuming
* reg = <ADDR SIZE>;
* then
* Fuse Address = (ADDR * 4) + 0x400
* Note that if SIZE is greater than 4, then
* each subsequent fuse is located at offset
* +0x10 in Fusemap Description Table (e.g.
* reg = <0x4 0x8> describes fuses 0x410 and
* 0x420).
*/
imx8mq_uid: soc-uid@4 { /* 0x410-0x420 */
reg = <0x4 0x8>;
};
cpu_speed_grade: speed-grade@10 {
cpu_speed_grade: speed-grade@10 { /* 0x440 */
reg = <0x10 4>;
};
fec_mac_address: mac-address@90 {
fec_mac_address: mac-address@90 { /* 0x640 */
reg = <0x90 6>;
};
};