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drm/amdgpu: add mes gang contex alloc/free helper
Implement the MES gang contex alloc and free heplers. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Michael Chen <michael.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
07c93d7eeb
commit
5ab89b491f
@@ -1080,6 +1080,47 @@ void amdgpu_mes_free_proc_ctx_index(struct amdgpu_mes *mes,
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amdgpu_mes_unlock(mes);
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}
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/**
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* amdgpu_mes_alloc_gang_ctx_index - allocate a gang context slot
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*/
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int amdgpu_mes_alloc_gang_ctx_index(struct amdgpu_mes *mes,
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struct amdgpu_usermode_queue *queue)
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{
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unsigned long bit;
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if (!mes->use_rs64mem || !mes->gang_ctx_bitmap)
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return -EOPNOTSUPP;
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amdgpu_mes_lock(mes);
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bit = find_first_zero_bit(mes->gang_ctx_bitmap,
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mes->gang_ctx_array_size);
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if (bit >= mes->gang_ctx_array_size) {
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amdgpu_mes_unlock(mes);
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return -ENOSPC;
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}
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set_bit(bit, mes->gang_ctx_bitmap);
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queue->gang_ctx_array_index = bit;
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amdgpu_mes_unlock(mes);
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return 0;
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}
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/**
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* amdgpu_mes_free_gang_ctx_index - free a gang context slot
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*/
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void amdgpu_mes_free_gang_ctx_index(struct amdgpu_mes *mes,
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struct amdgpu_usermode_queue *queue)
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{
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if (!mes->use_rs64mem || !mes->gang_ctx_bitmap)
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return;
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if (queue->gang_ctx_array_index >= mes->gang_ctx_array_size)
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return;
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amdgpu_mes_lock(mes);
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clear_bit(queue->gang_ctx_array_index, mes->gang_ctx_bitmap);
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amdgpu_mes_unlock(mes);
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}
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#if defined(CONFIG_DEBUG_FS)
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static int amdgpu_debugfs_mes_event_log_show(struct seq_file *m, void *unused)
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@@ -181,6 +181,7 @@ struct amdgpu_mes {
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uint32_t proc_ctx_array_size;
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unsigned long *proc_ctx_bitmap;
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uint32_t gang_ctx_array_size;
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uint32_t gang_ctx_array_index;
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unsigned long *gang_ctx_bitmap;
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};
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@@ -280,6 +281,7 @@ struct mes_add_queue_input {
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uint32_t sh_mem_config_data;
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uint32_t vm_cntx_cntl;
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uint32_t process_context_array_index;
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uint32_t gang_context_array_index;
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};
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struct mes_remove_queue_input {
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@@ -288,6 +290,7 @@ struct mes_remove_queue_input {
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uint64_t gang_context_addr;
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uint32_t queue_type;
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bool remove_queue_after_reset;
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uint32_t gang_context_array_index;
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};
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struct mes_map_legacy_queue_input {
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@@ -636,4 +639,8 @@ int amdgpu_mes_alloc_proc_ctx_index(struct amdgpu_mes *mes,
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struct amdgpu_usermode_queue *queue);
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void amdgpu_mes_free_proc_ctx_index(struct amdgpu_mes *mes,
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struct amdgpu_usermode_queue *queue);
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int amdgpu_mes_alloc_gang_ctx_index(struct amdgpu_mes *mes,
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struct amdgpu_usermode_queue *queue);
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void amdgpu_mes_free_gang_ctx_index(struct amdgpu_mes *mes,
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struct amdgpu_usermode_queue *queue);
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#endif /* __AMDGPU_MES_H__ */
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@@ -102,6 +102,7 @@ struct amdgpu_usermode_queue {
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} userq_vas;
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uint32_t proc_ctx_array_index;
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uint32_t gang_ctx_array_index;
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};
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struct amdgpu_userq_funcs {
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@@ -150,6 +150,8 @@ static int mes_userq_map(struct amdgpu_usermode_queue *queue)
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if (mes->use_rs64mem) {
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amdgpu_mes_alloc_proc_ctx_index(mes, queue);
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queue_input.process_context_array_index = queue->proc_ctx_array_index;
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amdgpu_mes_alloc_gang_ctx_index(mes, queue);
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queue_input.gang_context_array_index = queue->gang_ctx_array_index;
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}
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amdgpu_mes_lock(&adev->mes);
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r = adev->mes.funcs->add_hw_queue(&adev->mes, &queue_input);
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@@ -173,6 +175,7 @@ static int mes_userq_unmap(struct amdgpu_usermode_queue *queue)
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int r;
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memset(&queue_input, 0x0, sizeof(struct mes_remove_queue_input));
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queue_input.gang_context_array_index = queue->gang_ctx_array_index;
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queue_input.doorbell_offset = queue->doorbell_index;
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queue_input.gang_context_addr = ctx->gpu_addr;
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queue_input.queue_type = queue->queue_type;
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@@ -180,8 +183,10 @@ static int mes_userq_unmap(struct amdgpu_usermode_queue *queue)
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amdgpu_mes_lock(&adev->mes);
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r = adev->mes.funcs->remove_hw_queue(&adev->mes, &queue_input);
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amdgpu_mes_unlock(&adev->mes);
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if (mes->use_rs64mem)
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if (mes->use_rs64mem) {
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amdgpu_mes_free_proc_ctx_index(mes, queue);
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amdgpu_mes_free_gang_ctx_index(mes, queue);
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}
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if (r)
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DRM_ERROR("Failed to unmap queue in HW, err (%d)\n", r);
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return r;
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@@ -338,6 +338,7 @@ static int mes_v11_0_add_hw_queue(struct amdgpu_mes *mes,
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mes_add_queue_pkt.process_context_array_index = input->process_context_array_index;
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mes_add_queue_pkt.gang_quantum = input->gang_quantum;
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mes_add_queue_pkt.gang_context_addr = input->gang_context_addr;
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mes_add_queue_pkt.gang_context_array_index = input->gang_context_array_index;
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mes_add_queue_pkt.inprocess_gang_priority =
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convert_to_mes_priority_level(input->inprocess_gang_priority);
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mes_add_queue_pkt.gang_global_priority_level =
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@@ -388,6 +389,7 @@ static int mes_v11_0_remove_hw_queue(struct amdgpu_mes *mes,
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mes_remove_queue_pkt.doorbell_offset = input->doorbell_offset;
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mes_remove_queue_pkt.gang_context_addr = input->gang_context_addr;
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mes_remove_queue_pkt.gang_context_array_index = input->gang_context_array_index;
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mes_remove_queue_pkt.queue_type =
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convert_to_mes_queue_type(input->queue_type);
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@@ -360,6 +360,7 @@ union MESAPI__REMOVE_QUEUE {
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enum MES_QUEUE_TYPE queue_type;
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uint64_t timestamp;
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uint32_t gang_context_array_index;
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};
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uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
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