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Staging: Merge branch 'tidspbridge-for-2.6.39' of git://dev.omapzoom.org/pub/scm/tidspbridge/kernel-dspbridge into staging-next

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* 'tidspbridge-for-2.6.39' of git://dev.omapzoom.org/pub/scm/tidspbridge/kernel-dspbridge: (37 commits)
  staging: tidspbridge: set12 remove hungarian from structs
  staging: tidspbridge: set11 remove hungarian from structs
  staging: tidspbridge: set10 remove hungarian from structs
  staging: tidspbridge: set9 remove hungarian from structs
  staging: tidspbridge: set8 remove hungarian from structs
  staging: tidspbridge: set7 remove hungarian from structs
  staging: tidspbridge: set6 remove hungarian from structs
  staging: tidspbridge: set5 remove hungarian from structs
  staging: tidspbridge: set4 remove hungarian from structs
  staging: tidspbridge: set3 remove hungarian from structs
  staging: tidspbridge: set2 remove hungarian from structs
  staging: tidspbridge: set1 remove hungarian from structs
  staging: tidspbridge: remove code referred by OPT_ZERO_COPY_LOADER
  staging: tidspbridge: Remove trivial header files
  staging: tidspbridge: Remove unused typedefs
  staging: tidspbridge: Remove unused structs
  staging: tidspbridge: Remove unused functions
  staging: tidspbridge: Remove unused defined constants
  staging: tidspbridge: Fix atoi to support hexadecimal numbers correctly
  staging: tidspbridge: rmgr/node.c code cleanup
  ...
This commit is contained in:
Greg Kroah-Hartman
2011-02-09 15:13:28 -08:00
parent 26e805544a fbbb4959ee
commit 59db5b2b9e
86 changed files with 2995 additions and 5258 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/staging/tidspbridge/Makefile
View File

@@ -1,6 +1,6 @@
obj-$(CONFIG_TIDSPBRIDGE) += bridgedriver.o
libgen = gen/gb.o gen/gs.o gen/gh.o gen/uuidutil.o
libgen = gen/gh.o gen/uuidutil.o
libcore = core/chnl_sm.o core/msg_sm.o core/io_sm.o core/tiomap3430.o \
core/tiomap3430_pwr.o core/tiomap_io.o \
core/ue_deh.o core/wdt.o core/dsp-clock.o core/sync.o

1
drivers/staging/tidspbridge/TODO
View File

@@ -6,7 +6,6 @@
* Eliminate general services and libraries - use or extend existing kernel
libraries instead (e.g. gcf/lcm in nldr.c, global helpers in gen/)
* Eliminate direct manipulation of OMAP_SYSC_BASE
* Eliminate list.h : seem like a redundant wrapper to existing kernel lists
* Eliminate DSP_SUCCEEDED macros and their imposed redundant indentations
(adopt the kernel way of checking for return values)
* Audit interfaces exposed to user space

2
drivers/staging/tidspbridge/core/_deh.h
View File

@@ -25,7 +25,7 @@
/* DEH Manager: only one created per board: */
struct deh_mgr {
struct bridge_dev_context *hbridge_context; /* Bridge context. */
struct bridge_dev_context *bridge_context; /* Bridge context. */
struct ntfy_object *ntfy_obj; /* NTFY object */
/* MMU Fault DPC */

16
drivers/staging/tidspbridge/core/_msg_sm.h
View File

@@ -20,7 +20,7 @@
#ifndef _MSG_SM_
#define _MSG_SM_
#include <dspbridge/list.h>
#include <linux/list.h>
#include <dspbridge/msgdefs.h>
/*
@@ -85,13 +85,13 @@ struct msg_mgr {
/* Function interface to Bridge driver */
struct bridge_drv_interface *intf_fxns;
struct io_mgr *hio_mgr; /* IO manager */
struct lst_list *queue_list; /* List of MSG_QUEUEs */
struct io_mgr *iomgr; /* IO manager */
struct list_head queue_list; /* List of MSG_QUEUEs */
spinlock_t msg_mgr_lock; /* For critical sections */
/* Signalled when MsgFrame is available */
struct sync_object *sync_event;
struct lst_list *msg_free_list; /* Free MsgFrames ready to be filled */
struct lst_list *msg_used_list; /* MsgFrames ready to go to DSP */
struct list_head msg_free_list; /* Free MsgFrames ready to be filled */
struct list_head msg_used_list; /* MsgFrames ready to go to DSP */
u32 msgs_pending; /* # of queued messages to go to DSP */
u32 max_msgs; /* Max # of msgs that fit in buffer */
msg_onexit on_exit; /* called when RMS_EXIT is received */
@@ -108,12 +108,12 @@ struct msg_mgr {
*/
struct msg_queue {
struct list_head list_elem;
struct msg_mgr *hmsg_mgr;
struct msg_mgr *msg_mgr;
u32 max_msgs; /* Node message depth */
u32 msgq_id; /* Node environment pointer */
struct lst_list *msg_free_list; /* Free MsgFrames ready to be filled */
struct list_head msg_free_list; /* Free MsgFrames ready to be filled */
/* Filled MsgFramess waiting to be read */
struct lst_list *msg_used_list;
struct list_head msg_used_list;
void *arg; /* Handle passed to mgr on_exit callback */
struct sync_object *sync_event; /* Signalled when message is ready */
struct sync_object *sync_done; /* For synchronizing cleanup */

30
drivers/staging/tidspbridge/core/_tiomap.h
View File

@@ -319,24 +319,24 @@ static const struct bpwr_clk_t bpwr_clks[] = {
/* This Bridge driver's device context: */
struct bridge_dev_context {
struct dev_object *hdev_obj; /* Handle to Bridge device object. */
u32 dw_dsp_base_addr; /* Arm's API to DSP virt base addr */
struct dev_object *dev_obj; /* Handle to Bridge device object. */
u32 dsp_base_addr; /* Arm's API to DSP virt base addr */
/*
* DSP External memory prog address as seen virtually by the OS on
* the host side.
*/
u32 dw_dsp_ext_base_addr; /* See the comment above */
u32 dw_api_reg_base; /* API mem map'd registers */
void __iomem *dw_dsp_mmu_base; /* DSP MMU Mapped registers */
u32 dw_api_clk_base; /* CLK Registers */
u32 dw_dsp_clk_m2_base; /* DSP Clock Module m2 */
u32 dw_public_rhea; /* Pub Rhea */
u32 dw_int_addr; /* MB INTR reg */
u32 dw_tc_endianism; /* TC Endianism register */
u32 dw_test_base; /* DSP MMU Mapped registers */
u32 dw_self_loop; /* Pointer to the selfloop */
u32 dw_dsp_start_add; /* API Boot vector */
u32 dw_internal_size; /* Internal memory size */
u32 dsp_ext_base_addr; /* See the comment above */
u32 api_reg_base; /* API mem map'd registers */
void __iomem *dsp_mmu_base; /* DSP MMU Mapped registers */
u32 api_clk_base; /* CLK Registers */
u32 dsp_clk_m2_base; /* DSP Clock Module m2 */
u32 public_rhea; /* Pub Rhea */
u32 int_addr; /* MB INTR reg */
u32 tc_endianism; /* TC Endianism register */
u32 test_base; /* DSP MMU Mapped registers */
u32 self_loop; /* Pointer to the selfloop */
u32 dsp_start_add; /* API Boot vector */
u32 internal_size; /* Internal memory size */
struct omap_mbox *mbox; /* Mail box handle */
@@ -348,7 +348,7 @@ struct bridge_dev_context {
*/
/* DMMU TLB entries */
struct bridge_ioctl_extproc atlb_entry[BRDIOCTL_NUMOFMMUTLB];
u32 dw_brd_state; /* Last known board state. */
u32 brd_state; /* Last known board state. */
/* TC Settings */
bool tc_word_swap_on; /* Traffic Controller Word Swap */

668
drivers/staging/tidspbridge/core/chnl_sm.c
View File

@@ -37,9 +37,9 @@
* which may cause timeouts and/or failure offunction sync_wait_on_event.
* This invariant condition is:
*
* LST_Empty(pchnl->pio_completions) ==> pchnl->sync_event is reset
* list_empty(&pchnl->io_completions) ==> pchnl->sync_event is reset
* and
* !LST_Empty(pchnl->pio_completions) ==> pchnl->sync_event is set.
* !list_empty(&pchnl->io_completions) ==> pchnl->sync_event is set.
*/
#include <linux/types.h>
@@ -73,11 +73,9 @@
#define MAILBOX_IRQ INT_MAIL_MPU_IRQ
/* ----------------------------------- Function Prototypes */
static struct lst_list *create_chirp_list(u32 chirps);
static int create_chirp_list(struct list_head *list, u32 chirps);
static void free_chirp_list(struct lst_list *chirp_list);
static struct chnl_irp *make_new_chirp(void);
static void free_chirp_list(struct list_head *list);
static int search_free_channel(struct chnl_mgr *chnl_mgr_obj,
u32 *chnl);
@@ -107,35 +105,31 @@ int bridge_chnl_add_io_req(struct chnl_object *chnl_obj, void *host_buf,
is_eos = (byte_size == 0);
/* Validate args */
if (!host_buf || !pchnl) {
status = -EFAULT;
} else if (is_eos && CHNL_IS_INPUT(pchnl->chnl_mode)) {
status = -EPERM;
} else {
/*
* Check the channel state: only queue chirp if channel state
* allows it.
*/
dw_state = pchnl->dw_state;
if (dw_state != CHNL_STATEREADY) {
if (dw_state & CHNL_STATECANCEL)
status = -ECANCELED;
else if ((dw_state & CHNL_STATEEOS) &&
CHNL_IS_OUTPUT(pchnl->chnl_mode))
status = -EPIPE;
else
/* No other possible states left */
DBC_ASSERT(0);
}
if (!host_buf || !pchnl)
return -EFAULT;
if (is_eos && CHNL_IS_INPUT(pchnl->chnl_mode))
return -EPERM;
/*
* Check the channel state: only queue chirp if channel state
* allows it.
*/
dw_state = pchnl->state;
if (dw_state != CHNL_STATEREADY) {
if (dw_state & CHNL_STATECANCEL)
return -ECANCELED;
if ((dw_state & CHNL_STATEEOS) &&
CHNL_IS_OUTPUT(pchnl->chnl_mode))
return -EPIPE;
/* No other possible states left */
DBC_ASSERT(0);
}
dev_obj = dev_get_first();
dev_get_bridge_context(dev_obj, &dev_ctxt);
if (!dev_ctxt)
status = -EFAULT;
if (status)
goto func_end;
return -EFAULT;
if (pchnl->chnl_type == CHNL_PCPY && pchnl->chnl_id > 1 && host_buf) {
if (!(host_buf < (void *)USERMODE_ADDR)) {
@@ -144,18 +138,16 @@ int bridge_chnl_add_io_req(struct chnl_object *chnl_obj, void *host_buf,
}
/* if addr in user mode, then copy to kernel space */
host_sys_buf = kmalloc(buf_size, GFP_KERNEL);
if (host_sys_buf == NULL) {
status = -ENOMEM;
goto func_end;
}
if (host_sys_buf == NULL)
return -ENOMEM;
if (CHNL_IS_OUTPUT(pchnl->chnl_mode)) {
status = copy_from_user(host_sys_buf, host_buf,
buf_size);
buf_size);
if (status) {
kfree(host_sys_buf);
host_sys_buf = NULL;
status = -EFAULT;
goto func_end;
return -EFAULT;
}
}
}
@@ -169,63 +161,62 @@ int bridge_chnl_add_io_req(struct chnl_object *chnl_obj, void *host_buf,
omap_mbox_disable_irq(dev_ctxt->mbox, IRQ_RX);
if (pchnl->chnl_type == CHNL_PCPY) {
/* This is a processor-copy channel. */
if (!status && CHNL_IS_OUTPUT(pchnl->chnl_mode)) {
if (CHNL_IS_OUTPUT(pchnl->chnl_mode)) {
/* Check buffer size on output channels for fit. */
if (byte_size >
io_buf_size(pchnl->chnl_mgr_obj->hio_mgr))
if (byte_size > io_buf_size(
pchnl->chnl_mgr_obj->iomgr)) {
status = -EINVAL;
goto out;
}
}
}
if (!status) {
/* Get a free chirp: */
chnl_packet_obj =
(struct chnl_irp *)lst_get_head(pchnl->free_packets_list);
if (chnl_packet_obj == NULL)
status = -EIO;
/* Get a free chirp: */
if (list_empty(&pchnl->free_packets_list)) {
status = -EIO;
goto out;
}
if (!status) {
/* Enqueue the chirp on the chnl's IORequest queue: */
chnl_packet_obj->host_user_buf = chnl_packet_obj->host_sys_buf =
host_buf;
if (pchnl->chnl_type == CHNL_PCPY && pchnl->chnl_id > 1)
chnl_packet_obj->host_sys_buf = host_sys_buf;
chnl_packet_obj = list_first_entry(&pchnl->free_packets_list,
struct chnl_irp, link);
list_del(&chnl_packet_obj->link);
/*
* Note: for dma chans dw_dsp_addr contains dsp address
* of SM buffer.
*/
DBC_ASSERT(chnl_mgr_obj->word_size != 0);
/* DSP address */
chnl_packet_obj->dsp_tx_addr =
dw_dsp_addr / chnl_mgr_obj->word_size;
chnl_packet_obj->byte_size = byte_size;
chnl_packet_obj->buf_size = buf_size;
/* Only valid for output channel */
chnl_packet_obj->dw_arg = dw_arg;
chnl_packet_obj->status = (is_eos ? CHNL_IOCSTATEOS :
CHNL_IOCSTATCOMPLETE);
lst_put_tail(pchnl->pio_requests,
(struct list_head *)chnl_packet_obj);
pchnl->cio_reqs++;
DBC_ASSERT(pchnl->cio_reqs <= pchnl->chnl_packets);
/*
* If end of stream, update the channel state to prevent
* more IOR's.
*/
if (is_eos)
pchnl->dw_state |= CHNL_STATEEOS;
/* Enqueue the chirp on the chnl's IORequest queue: */
chnl_packet_obj->host_user_buf = chnl_packet_obj->host_sys_buf =
host_buf;
if (pchnl->chnl_type == CHNL_PCPY && pchnl->chnl_id > 1)
chnl_packet_obj->host_sys_buf = host_sys_buf;
/* Legacy DSM Processor-Copy */
DBC_ASSERT(pchnl->chnl_type == CHNL_PCPY);
/* Request IO from the DSP */
io_request_chnl(chnl_mgr_obj->hio_mgr, pchnl,
(CHNL_IS_INPUT(pchnl->chnl_mode) ? IO_INPUT :
IO_OUTPUT), &mb_val);
sched_dpc = true;
/*
* Note: for dma chans dw_dsp_addr contains dsp address
* of SM buffer.
*/
DBC_ASSERT(chnl_mgr_obj->word_size != 0);
/* DSP address */
chnl_packet_obj->dsp_tx_addr = dw_dsp_addr / chnl_mgr_obj->word_size;
chnl_packet_obj->byte_size = byte_size;
chnl_packet_obj->buf_size = buf_size;
/* Only valid for output channel */
chnl_packet_obj->arg = dw_arg;
chnl_packet_obj->status = (is_eos ? CHNL_IOCSTATEOS :
CHNL_IOCSTATCOMPLETE);
list_add_tail(&chnl_packet_obj->link, &pchnl->io_requests);
pchnl->cio_reqs++;
DBC_ASSERT(pchnl->cio_reqs <= pchnl->chnl_packets);
/*
* If end of stream, update the channel state to prevent
* more IOR's.
*/
if (is_eos)
pchnl->state |= CHNL_STATEEOS;
}
/* Legacy DSM Processor-Copy */
DBC_ASSERT(pchnl->chnl_type == CHNL_PCPY);
/* Request IO from the DSP */
io_request_chnl(chnl_mgr_obj->iomgr, pchnl,
(CHNL_IS_INPUT(pchnl->chnl_mode) ? IO_INPUT :
IO_OUTPUT), &mb_val);
sched_dpc = true;
out:
omap_mbox_enable_irq(dev_ctxt->mbox, IRQ_RX);
spin_unlock_bh(&chnl_mgr_obj->chnl_mgr_lock);
if (mb_val != 0)
@@ -233,9 +224,8 @@ int bridge_chnl_add_io_req(struct chnl_object *chnl_obj, void *host_buf,
/* Schedule a DPC, to do the actual data transfer */
if (sched_dpc)
iosm_schedule(chnl_mgr_obj->hio_mgr);
iosm_schedule(chnl_mgr_obj->iomgr);
func_end:
return status;
}
@@ -250,59 +240,55 @@ int bridge_chnl_add_io_req(struct chnl_object *chnl_obj, void *host_buf,
*/
int bridge_chnl_cancel_io(struct chnl_object *chnl_obj)
{
int status = 0;
struct chnl_object *pchnl = (struct chnl_object *)chnl_obj;
u32 chnl_id = -1;
s8 chnl_mode;
struct chnl_irp *chnl_packet_obj;
struct chnl_irp *chirp, *tmp;
struct chnl_mgr *chnl_mgr_obj = NULL;
/* Check args: */
if (pchnl && pchnl->chnl_mgr_obj) {
chnl_id = pchnl->chnl_id;
chnl_mode = pchnl->chnl_mode;
chnl_mgr_obj = pchnl->chnl_mgr_obj;
} else {
status = -EFAULT;
}
if (status)
goto func_end;
if (!pchnl || !pchnl->chnl_mgr_obj)
return -EFAULT;
chnl_id = pchnl->chnl_id;
chnl_mode = pchnl->chnl_mode;
chnl_mgr_obj = pchnl->chnl_mgr_obj;
/* Mark this channel as cancelled, to prevent further IORequests or
* IORequests or dispatching. */
spin_lock_bh(&chnl_mgr_obj->chnl_mgr_lock);
pchnl->dw_state |= CHNL_STATECANCEL;
if (LST_IS_EMPTY(pchnl->pio_requests))
goto func_cont;
pchnl->state |= CHNL_STATECANCEL;
if (list_empty(&pchnl->io_requests)) {
spin_unlock_bh(&chnl_mgr_obj->chnl_mgr_lock);
return 0;
}
if (pchnl->chnl_type == CHNL_PCPY) {
/* Indicate we have no more buffers available for transfer: */
if (CHNL_IS_INPUT(pchnl->chnl_mode)) {
io_cancel_chnl(chnl_mgr_obj->hio_mgr, chnl_id);
io_cancel_chnl(chnl_mgr_obj->iomgr, chnl_id);
} else {
/* Record that we no longer have output buffers
* available: */
chnl_mgr_obj->dw_output_mask &= ~(1 << chnl_id);
chnl_mgr_obj->output_mask &= ~(1 << chnl_id);
}
}
/* Move all IOR's to IOC queue: */
while (!LST_IS_EMPTY(pchnl->pio_requests)) {
chnl_packet_obj =
(struct chnl_irp *)lst_get_head(pchnl->pio_requests);
if (chnl_packet_obj) {
chnl_packet_obj->byte_size = 0;
chnl_packet_obj->status |= CHNL_IOCSTATCANCEL;
lst_put_tail(pchnl->pio_completions,
(struct list_head *)chnl_packet_obj);
pchnl->cio_cs++;
pchnl->cio_reqs--;
DBC_ASSERT(pchnl->cio_reqs >= 0);
}
list_for_each_entry_safe(chirp, tmp, &pchnl->io_requests, link) {
list_del(&chirp->link);
chirp->byte_size = 0;
chirp->status |= CHNL_IOCSTATCANCEL;
list_add_tail(&chirp->link, &pchnl->io_completions);
pchnl->cio_cs++;
pchnl->cio_reqs--;
DBC_ASSERT(pchnl->cio_reqs >= 0);
}
func_cont:
spin_unlock_bh(&chnl_mgr_obj->chnl_mgr_lock);
func_end:
return status;
return 0;
}
/*
@@ -319,59 +305,43 @@ int bridge_chnl_close(struct chnl_object *chnl_obj)
struct chnl_object *pchnl = (struct chnl_object *)chnl_obj;
/* Check args: */
if (!pchnl) {
status = -EFAULT;
goto func_cont;
if (!pchnl)
return -EFAULT;
/* Cancel IO: this ensures no further IO requests or notifications */
status = bridge_chnl_cancel_io(chnl_obj);
if (status)
return status;
/* Assert I/O on this channel is now cancelled: Protects from io_dpc */
DBC_ASSERT((pchnl->state & CHNL_STATECANCEL));
/* Invalidate channel object: Protects from CHNL_GetIOCompletion() */
/* Free the slot in the channel manager: */
pchnl->chnl_mgr_obj->channels[pchnl->chnl_id] = NULL;
spin_lock_bh(&pchnl->chnl_mgr_obj->chnl_mgr_lock);
pchnl->chnl_mgr_obj->open_channels -= 1;
spin_unlock_bh(&pchnl->chnl_mgr_obj->chnl_mgr_lock);
if (pchnl->ntfy_obj) {
ntfy_delete(pchnl->ntfy_obj);
kfree(pchnl->ntfy_obj);
pchnl->ntfy_obj = NULL;
}
{
/* Cancel IO: this ensures no further IO requests or
* notifications. */
status = bridge_chnl_cancel_io(chnl_obj);
/* Reset channel event: (NOTE: user_event freed in user context) */
if (pchnl->sync_event) {
sync_reset_event(pchnl->sync_event);
kfree(pchnl->sync_event);
pchnl->sync_event = NULL;
}
func_cont:
if (!status) {
/* Assert I/O on this channel is now cancelled: Protects
* from io_dpc. */
DBC_ASSERT((pchnl->dw_state & CHNL_STATECANCEL));
/* Invalidate channel object: Protects from
* CHNL_GetIOCompletion(). */
/* Free the slot in the channel manager: */
pchnl->chnl_mgr_obj->ap_channel[pchnl->chnl_id] = NULL;
spin_lock_bh(&pchnl->chnl_mgr_obj->chnl_mgr_lock);
pchnl->chnl_mgr_obj->open_channels -= 1;
spin_unlock_bh(&pchnl->chnl_mgr_obj->chnl_mgr_lock);
if (pchnl->ntfy_obj) {
ntfy_delete(pchnl->ntfy_obj);
kfree(pchnl->ntfy_obj);
pchnl->ntfy_obj = NULL;
}
/* Reset channel event: (NOTE: user_event freed in user
* context.). */
if (pchnl->sync_event) {
sync_reset_event(pchnl->sync_event);
kfree(pchnl->sync_event);
pchnl->sync_event = NULL;
}
/* Free I/O request and I/O completion queues: */
if (pchnl->pio_completions) {
free_chirp_list(pchnl->pio_completions);
pchnl->pio_completions = NULL;
pchnl->cio_cs = 0;
}
if (pchnl->pio_requests) {
free_chirp_list(pchnl->pio_requests);
pchnl->pio_requests = NULL;
pchnl->cio_reqs = 0;
}
if (pchnl->free_packets_list) {
free_chirp_list(pchnl->free_packets_list);
pchnl->free_packets_list = NULL;
}
/* Release channel object. */
kfree(pchnl);
pchnl = NULL;
}
DBC_ENSURE(status || !pchnl);
/* Free I/O request and I/O completion queues: */
free_chirp_list(&pchnl->io_completions);
pchnl->cio_cs = 0;
free_chirp_list(&pchnl->io_requests);
pchnl->cio_reqs = 0;
free_chirp_list(&pchnl->free_packets_list);
/* Release channel object. */
kfree(pchnl);
return status;
}
@@ -407,18 +377,18 @@ int bridge_chnl_create(struct chnl_mgr **channel_mgr,
DBC_ASSERT(mgr_attrts->max_channels == CHNL_MAXCHANNELS);
max_channels = CHNL_MAXCHANNELS + CHNL_MAXCHANNELS * CHNL_PCPY;
/* Create array of channels */
chnl_mgr_obj->ap_channel = kzalloc(sizeof(struct chnl_object *)
chnl_mgr_obj->channels = kzalloc(sizeof(struct chnl_object *)
* max_channels, GFP_KERNEL);
if (chnl_mgr_obj->ap_channel) {
if (chnl_mgr_obj->channels) {
/* Initialize chnl_mgr object */
chnl_mgr_obj->dw_type = CHNL_TYPESM;
chnl_mgr_obj->type = CHNL_TYPESM;
chnl_mgr_obj->word_size = mgr_attrts->word_size;
/* Total # chnls supported */
chnl_mgr_obj->max_channels = max_channels;
chnl_mgr_obj->open_channels = 0;
chnl_mgr_obj->dw_output_mask = 0;
chnl_mgr_obj->dw_last_output = 0;
chnl_mgr_obj->hdev_obj = hdev_obj;
chnl_mgr_obj->output_mask = 0;
chnl_mgr_obj->last_output = 0;
chnl_mgr_obj->dev_obj = hdev_obj;
spin_lock_init(&chnl_mgr_obj->chnl_mgr_lock);
} else {
status = -ENOMEM;
@@ -453,7 +423,7 @@ int bridge_chnl_destroy(struct chnl_mgr *hchnl_mgr)
for (chnl_id = 0; chnl_id < chnl_mgr_obj->max_channels;
chnl_id++) {
status =
bridge_chnl_close(chnl_mgr_obj->ap_channel
bridge_chnl_close(chnl_mgr_obj->channels
[chnl_id]);
if (status)
dev_dbg(bridge, "%s: Error status 0x%x\n",
@@ -461,10 +431,10 @@ int bridge_chnl_destroy(struct chnl_mgr *hchnl_mgr)
}
/* Free channel manager object: */
kfree(chnl_mgr_obj->ap_channel);
kfree(chnl_mgr_obj->channels);
/* Set hchnl_mgr to NULL in device object. */
dev_set_chnl_mgr(chnl_mgr_obj->hdev_obj, NULL);
dev_set_chnl_mgr(chnl_mgr_obj->dev_obj, NULL);
/* Free this Chnl Mgr object: */
kfree(hchnl_mgr);
} else {
@@ -505,7 +475,7 @@ int bridge_chnl_flush_io(struct chnl_object *chnl_obj, u32 timeout)
&& (pchnl->chnl_type == CHNL_PCPY)) {
/* Wait for IO completions, up to the specified
* timeout: */
while (!LST_IS_EMPTY(pchnl->pio_requests) && !status) {
while (!list_empty(&pchnl->io_requests) && !status) {
status = bridge_chnl_get_ioc(chnl_obj,
timeout, &chnl_ioc_obj);
if (status)
@@ -518,10 +488,10 @@ int bridge_chnl_flush_io(struct chnl_object *chnl_obj, u32 timeout)
} else {
status = bridge_chnl_cancel_io(chnl_obj);
/* Now, leave the channel in the ready state: */
pchnl->dw_state &= ~CHNL_STATECANCEL;
pchnl->state &= ~CHNL_STATECANCEL;
}
}
DBC_ENSURE(status || LST_IS_EMPTY(pchnl->pio_requests));
DBC_ENSURE(status || list_empty(&pchnl->io_requests));
return status;
}
@@ -538,16 +508,16 @@ int bridge_chnl_get_info(struct chnl_object *chnl_obj,
if (channel_info != NULL) {
if (pchnl) {
/* Return the requested information: */
channel_info->hchnl_mgr = pchnl->chnl_mgr_obj;
channel_info->chnl_mgr = pchnl->chnl_mgr_obj;
channel_info->event_obj = pchnl->user_event;
channel_info->cnhl_id = pchnl->chnl_id;
channel_info->dw_mode = pchnl->chnl_mode;
channel_info->mode = pchnl->chnl_mode;
channel_info->bytes_tx = pchnl->bytes_moved;
channel_info->process = pchnl->process;
channel_info->sync_event = pchnl->sync_event;
channel_info->cio_cs = pchnl->cio_cs;
channel_info->cio_reqs = pchnl->cio_reqs;
channel_info->dw_state = pchnl->dw_state;
channel_info->state = pchnl->state;
} else {
status = -EFAULT;
}
@@ -581,7 +551,7 @@ int bridge_chnl_get_ioc(struct chnl_object *chnl_obj, u32 timeout,
if (!chan_ioc || !pchnl) {
status = -EFAULT;
} else if (timeout == CHNL_IOCNOWAIT) {
if (LST_IS_EMPTY(pchnl->pio_completions))
if (list_empty(&pchnl->io_completions))
status = -EREMOTEIO;
}
@@ -596,7 +566,7 @@ int bridge_chnl_get_ioc(struct chnl_object *chnl_obj, u32 timeout,
ioc.status = CHNL_IOCSTATCOMPLETE;
if (timeout !=
CHNL_IOCNOWAIT && LST_IS_EMPTY(pchnl->pio_completions)) {
CHNL_IOCNOWAIT && list_empty(&pchnl->io_completions)) {
if (timeout == CHNL_IOCINFINITE)
timeout = SYNC_INFINITE;
@@ -611,7 +581,7 @@ int bridge_chnl_get_ioc(struct chnl_object *chnl_obj, u32 timeout,
* fails due to unkown causes. */
/* Even though Wait failed, there may be something in
* the Q: */
if (LST_IS_EMPTY(pchnl->pio_completions)) {
if (list_empty(&pchnl->io_completions)) {
ioc.status |= CHNL_IOCSTATCANCEL;
dequeue_ioc = false;
}
@@ -622,38 +592,34 @@ int bridge_chnl_get_ioc(struct chnl_object *chnl_obj, u32 timeout,
omap_mbox_disable_irq(dev_ctxt->mbox, IRQ_RX);
if (dequeue_ioc) {
/* Dequeue IOC and set chan_ioc; */
DBC_ASSERT(!LST_IS_EMPTY(pchnl->pio_completions));
chnl_packet_obj =
(struct chnl_irp *)lst_get_head(pchnl->pio_completions);
DBC_ASSERT(!list_empty(&pchnl->io_completions));
chnl_packet_obj = list_first_entry(&pchnl->io_completions,
struct chnl_irp, link);
list_del(&chnl_packet_obj->link);
/* Update chan_ioc from channel state and chirp: */
if (chnl_packet_obj) {
pchnl->cio_cs--;
/* If this is a zero-copy channel, then set IOC's pbuf
* to the DSP's address. This DSP address will get
* translated to user's virtual addr later. */
{
host_sys_buf = chnl_packet_obj->host_sys_buf;
ioc.pbuf = chnl_packet_obj->host_user_buf;
}
ioc.byte_size = chnl_packet_obj->byte_size;
ioc.buf_size = chnl_packet_obj->buf_size;
ioc.dw_arg = chnl_packet_obj->dw_arg;
ioc.status |= chnl_packet_obj->status;
/* Place the used chirp on the free list: */
lst_put_tail(pchnl->free_packets_list,
(struct list_head *)chnl_packet_obj);
} else {
ioc.pbuf = NULL;
ioc.byte_size = 0;
}
pchnl->cio_cs--;
/*
* If this is a zero-copy channel, then set IOC's pbuf
* to the DSP's address. This DSP address will get
* translated to user's virtual addr later.
*/
host_sys_buf = chnl_packet_obj->host_sys_buf;
ioc.buf = chnl_packet_obj->host_user_buf;
ioc.byte_size = chnl_packet_obj->byte_size;
ioc.buf_size = chnl_packet_obj->buf_size;
ioc.arg = chnl_packet_obj->arg;
ioc.status |= chnl_packet_obj->status;
/* Place the used chirp on the free list: */
list_add_tail(&chnl_packet_obj->link,
&pchnl->free_packets_list);
} else {
ioc.pbuf = NULL;
ioc.buf = NULL;
ioc.byte_size = 0;
ioc.dw_arg = 0;
ioc.arg = 0;
ioc.buf_size = 0;
}
/* Ensure invariant: If any IOC's are queued for this channel... */
if (!LST_IS_EMPTY(pchnl->pio_completions)) {
if (!list_empty(&pchnl->io_completions)) {
/* Since DSPStream_Reclaim() does not take a timeout
* parameter, we pass the stream's timeout value to
* bridge_chnl_get_ioc. We cannot determine whether or not
@@ -674,11 +640,11 @@ int bridge_chnl_get_ioc(struct chnl_object *chnl_obj, u32 timeout,
spin_unlock_bh(&pchnl->chnl_mgr_obj->chnl_mgr_lock);
if (dequeue_ioc
&& (pchnl->chnl_type == CHNL_PCPY && pchnl->chnl_id > 1)) {
if (!(ioc.pbuf < (void *)USERMODE_ADDR))
if (!(ioc.buf < (void *)USERMODE_ADDR))
goto func_cont;
/* If the addr is in user mode, then copy it */
if (!host_sys_buf || !ioc.pbuf) {
if (!host_sys_buf || !ioc.buf) {
status = -EFAULT;
goto func_cont;
}
@@ -686,7 +652,7 @@ int bridge_chnl_get_ioc(struct chnl_object *chnl_obj, u32 timeout,
goto func_cont1;
/*host_user_buf */
status = copy_to_user(ioc.pbuf, host_sys_buf, ioc.byte_size);
status = copy_to_user(ioc.buf, host_sys_buf, ioc.byte_size);
if (status) {
if (current->flags & PF_EXITING)
status = 0;
@@ -710,32 +676,22 @@ int bridge_chnl_get_ioc(struct chnl_object *chnl_obj, u32 timeout,
int bridge_chnl_get_mgr_info(struct chnl_mgr *hchnl_mgr, u32 ch_id,
struct chnl_mgrinfo *mgr_info)
{
int status = 0;
struct chnl_mgr *chnl_mgr_obj = (struct chnl_mgr *)hchnl_mgr;
if (mgr_info != NULL) {
if (ch_id <= CHNL_MAXCHANNELS) {
if (hchnl_mgr) {
/* Return the requested information: */
mgr_info->chnl_obj =
chnl_mgr_obj->ap_channel[ch_id];
mgr_info->open_channels =
chnl_mgr_obj->open_channels;
mgr_info->dw_type = chnl_mgr_obj->dw_type;
/* total # of chnls */
mgr_info->max_channels =
chnl_mgr_obj->max_channels;
} else {
status = -EFAULT;
}
} else {
status = -ECHRNG;
}
} else {
status = -EFAULT;
}
if (!mgr_info || !hchnl_mgr)
return -EFAULT;
return status;
if (ch_id > CHNL_MAXCHANNELS)
return -ECHRNG;
/* Return the requested information: */
mgr_info->chnl_obj = chnl_mgr_obj->channels[ch_id];
mgr_info->open_channels = chnl_mgr_obj->open_channels;
mgr_info->type = chnl_mgr_obj->type;
/* total # of chnls */
mgr_info->max_channels = chnl_mgr_obj->max_channels;
return 0;
}
/*
@@ -762,7 +718,7 @@ int bridge_chnl_idle(struct chnl_object *chnl_obj, u32 timeout,
/* Reset the byte count and put channel back in ready state. */
chnl_obj->bytes_moved = 0;
chnl_obj->dw_state &= ~CHNL_STATECANCEL;
chnl_obj->state &= ~CHNL_STATECANCEL;
}
return status;
@@ -785,116 +741,103 @@ int bridge_chnl_open(struct chnl_object **chnl,
DBC_REQUIRE(pattrs != NULL);
DBC_REQUIRE(hchnl_mgr != NULL);
*chnl = NULL;
/* Validate Args: */
if (pattrs->uio_reqs == 0) {
status = -EINVAL;
if (!pattrs->uio_reqs)
return -EINVAL;
if (!hchnl_mgr)
return -EFAULT;
if (ch_id != CHNL_PICKFREE) {
if (ch_id >= chnl_mgr_obj->max_channels)
return -ECHRNG;
if (chnl_mgr_obj->channels[ch_id] != NULL)
return -EALREADY;
} else {
if (!hchnl_mgr) {
status = -EFAULT;
} else {
if (ch_id != CHNL_PICKFREE) {
if (ch_id >= chnl_mgr_obj->max_channels)
status = -ECHRNG;
else if (chnl_mgr_obj->ap_channel[ch_id] !=
NULL)
status = -EALREADY;
} else {
/* Check for free channel */
status =
search_free_channel(chnl_mgr_obj, &ch_id);
}
}
/* Check for free channel */
status = search_free_channel(chnl_mgr_obj, &ch_id);
if (status)
return status;
}
if (status)
goto func_end;
DBC_ASSERT(ch_id < chnl_mgr_obj->max_channels);
/* Create channel object: */
pchnl = kzalloc(sizeof(struct chnl_object), GFP_KERNEL);
if (!pchnl) {
status = -ENOMEM;
goto func_end;
}
if (!pchnl)
return -ENOMEM;
/* Protect queues from io_dpc: */
pchnl->dw_state = CHNL_STATECANCEL;
pchnl->state = CHNL_STATECANCEL;
/* Allocate initial IOR and IOC queues: */
pchnl->free_packets_list = create_chirp_list(pattrs->uio_reqs);
pchnl->pio_requests = create_chirp_list(0);
pchnl->pio_completions = create_chirp_list(0);
status = create_chirp_list(&pchnl->free_packets_list,
pattrs->uio_reqs);
if (status)
goto out_err;
INIT_LIST_HEAD(&pchnl->io_requests);
INIT_LIST_HEAD(&pchnl->io_completions);
pchnl->chnl_packets = pattrs->uio_reqs;
pchnl->cio_cs = 0;
pchnl->cio_reqs = 0;
sync_event = kzalloc(sizeof(struct sync_object), GFP_KERNEL);
if (sync_event)
sync_init_event(sync_event);
else
if (!sync_event) {
status = -ENOMEM;
if (!status) {
pchnl->ntfy_obj = kmalloc(sizeof(struct ntfy_object),
GFP_KERNEL);
if (pchnl->ntfy_obj)
ntfy_init(pchnl->ntfy_obj);
else
status = -ENOMEM;
goto out_err;
}
sync_init_event(sync_event);
if (!status) {
if (pchnl->pio_completions && pchnl->pio_requests &&
pchnl->free_packets_list) {
/* Initialize CHNL object fields: */
pchnl->chnl_mgr_obj = chnl_mgr_obj;
pchnl->chnl_id = ch_id;
pchnl->chnl_mode = chnl_mode;
pchnl->user_event = sync_event;
pchnl->sync_event = sync_event;
/* Get the process handle */
pchnl->process = current->tgid;
pchnl->pcb_arg = 0;
pchnl->bytes_moved = 0;
/* Default to proc-copy */
pchnl->chnl_type = CHNL_PCPY;
} else {
status = -ENOMEM;
}
pchnl->ntfy_obj = kmalloc(sizeof(struct ntfy_object), GFP_KERNEL);
if (!pchnl->ntfy_obj) {
status = -ENOMEM;
goto out_err;
}
ntfy_init(pchnl->ntfy_obj);
if (status) {
/* Free memory */
if (pchnl->pio_completions) {
free_chirp_list(pchnl->pio_completions);
pchnl->pio_completions = NULL;
pchnl->cio_cs = 0;
}
if (pchnl->pio_requests) {
free_chirp_list(pchnl->pio_requests);
pchnl->pio_requests = NULL;
}
if (pchnl->free_packets_list) {
free_chirp_list(pchnl->free_packets_list);
pchnl->free_packets_list = NULL;
}
/* Initialize CHNL object fields: */
pchnl->chnl_mgr_obj = chnl_mgr_obj;
pchnl->chnl_id = ch_id;
pchnl->chnl_mode = chnl_mode;
pchnl->user_event = sync_event;
pchnl->sync_event = sync_event;
/* Get the process handle */
pchnl->process = current->tgid;
pchnl->cb_arg = 0;
pchnl->bytes_moved = 0;
/* Default to proc-copy */
pchnl->chnl_type = CHNL_PCPY;
/* Insert channel object in channel manager: */
chnl_mgr_obj->channels[pchnl->chnl_id] = pchnl;
spin_lock_bh(&chnl_mgr_obj->chnl_mgr_lock);
chnl_mgr_obj->open_channels++;
spin_unlock_bh(&chnl_mgr_obj->chnl_mgr_lock);
/* Return result... */
pchnl->state = CHNL_STATEREADY;
*chnl = pchnl;
return status;
out_err:
/* Free memory */
free_chirp_list(&pchnl->io_completions);
free_chirp_list(&pchnl->io_requests);
free_chirp_list(&pchnl->free_packets_list);
if (sync_event)
kfree(sync_event);
sync_event = NULL;
if (pchnl->ntfy_obj) {
ntfy_delete(pchnl->ntfy_obj);
kfree(pchnl->ntfy_obj);
pchnl->ntfy_obj = NULL;
}
kfree(pchnl);
} else {
/* Insert channel object in channel manager: */
chnl_mgr_obj->ap_channel[pchnl->chnl_id] = pchnl;
spin_lock_bh(&chnl_mgr_obj->chnl_mgr_lock);
chnl_mgr_obj->open_channels++;
spin_unlock_bh(&chnl_mgr_obj->chnl_mgr_lock);
/* Return result... */
pchnl->dw_state = CHNL_STATEREADY;
*chnl = pchnl;
if (pchnl->ntfy_obj) {
ntfy_delete(pchnl->ntfy_obj);
kfree(pchnl->ntfy_obj);
pchnl->ntfy_obj = NULL;
}
func_end:
DBC_ENSURE((!status && pchnl) || (*chnl == NULL));
kfree(pchnl);
return status;
}
@@ -924,37 +867,35 @@ int bridge_chnl_register_notify(struct chnl_object *chnl_obj,
* Purpose:
* Initialize a queue of channel I/O Request/Completion packets.
* Parameters:
* list: Pointer to a list_head
* chirps: Number of Chirps to allocate.
* Returns:
* Pointer to queue of IRPs, or NULL.
* 0 if successful, error code otherwise.
* Requires:
* Ensures:
*/
static struct lst_list *create_chirp_list(u32 chirps)
static int create_chirp_list(struct list_head *list, u32 chirps)
{
struct lst_list *chirp_list;
struct chnl_irp *chnl_packet_obj;
struct chnl_irp *chirp;
u32 i;
chirp_list = kzalloc(sizeof(struct lst_list), GFP_KERNEL);
INIT_LIST_HEAD(list);
if (chirp_list) {
INIT_LIST_HEAD(&chirp_list->head);
/* Make N chirps and place on queue. */
for (i = 0; (i < chirps)
&& ((chnl_packet_obj = make_new_chirp()) != NULL); i++) {
lst_put_tail(chirp_list,
(struct list_head *)chnl_packet_obj);
}
/* If we couldn't allocate all chirps, free those allocated: */
if (i != chirps) {
free_chirp_list(chirp_list);
chirp_list = NULL;
}
/* Make N chirps and place on queue. */
for (i = 0; i < chirps; i++) {
chirp = kzalloc(sizeof(struct chnl_irp), GFP_KERNEL);
if (!chirp)
break;
list_add_tail(&chirp->link, list);
}
return chirp_list;
/* If we couldn't allocate all chirps, free those allocated: */
if (i != chirps) {
free_chirp_list(list);
return -ENOMEM;
}
return 0;
}
/*
@@ -962,31 +903,16 @@ static struct lst_list *create_chirp_list(u32 chirps)
* Purpose:
* Free the queue of Chirps.
*/
static void free_chirp_list(struct lst_list *chirp_list)
static void free_chirp_list(struct list_head *chirp_list)
{
struct chnl_irp *chirp, *tmp;
DBC_REQUIRE(chirp_list != NULL);
while (!LST_IS_EMPTY(chirp_list))
kfree(lst_get_head(chirp_list));
kfree(chirp_list);
}
/*
* ======== make_new_chirp ========
* Allocate the memory for a new channel IRP.
*/
static struct chnl_irp *make_new_chirp(void)
{
struct chnl_irp *chnl_packet_obj;
chnl_packet_obj = kzalloc(sizeof(struct chnl_irp), GFP_KERNEL);
if (chnl_packet_obj != NULL) {
/* lst_init_elem only resets the list's member values. */
lst_init_elem(&chnl_packet_obj->link);
list_for_each_entry_safe(chirp, tmp, chirp_list, link) {
list_del(&chirp->link);
kfree(chirp);
}
return chnl_packet_obj;
}
/*
@@ -1002,7 +928,7 @@ static int search_free_channel(struct chnl_mgr *chnl_mgr_obj,
DBC_REQUIRE(chnl_mgr_obj);
for (i = 0; i < chnl_mgr_obj->max_channels; i++) {
if (chnl_mgr_obj->ap_channel[i] == NULL) {
if (chnl_mgr_obj->channels[i] == NULL) {
status = 0;
*chnl = i;
break;

52
drivers/staging/tidspbridge/core/dsp-clock.c
View File

@@ -146,54 +146,6 @@ void dsp_clk_init(void)
ssi.sst_fck, ssi.ssr_fck, ssi.ick);
}
#ifdef CONFIG_OMAP_MCBSP
static void mcbsp_clk_prepare(bool flag, u8 id)
{
struct cfg_hostres *resources;
struct dev_object *hdev_object = NULL;
struct bridge_dev_context *bridge_context = NULL;
u32 val;
hdev_object = (struct dev_object *)drv_get_first_dev_object();
if (!hdev_object)
return;
dev_get_bridge_context(hdev_object, &bridge_context);
if (!bridge_context)
return;
resources = bridge_context->resources;
if (!resources)
return;
if (flag) {
if (id == DSP_CLK_MCBSP1) {
/* set MCBSP1_CLKS, on McBSP1 ON */
val = __raw_readl(resources->dw_sys_ctrl_base + 0x274);
val |= 1 << 2;
__raw_writel(val, resources->dw_sys_ctrl_base + 0x274);
} else if (id == DSP_CLK_MCBSP2) {
/* set MCBSP2_CLKS, on McBSP2 ON */
val = __raw_readl(resources->dw_sys_ctrl_base + 0x274);
val |= 1 << 6;
__raw_writel(val, resources->dw_sys_ctrl_base + 0x274);
}
} else {
if (id == DSP_CLK_MCBSP1) {
/* clear MCBSP1_CLKS, on McBSP1 OFF */
val = __raw_readl(resources->dw_sys_ctrl_base + 0x274);
val &= ~(1 << 2);
__raw_writel(val, resources->dw_sys_ctrl_base + 0x274);
} else if (id == DSP_CLK_MCBSP2) {
/* clear MCBSP2_CLKS, on McBSP2 OFF */
val = __raw_readl(resources->dw_sys_ctrl_base + 0x274);
val &= ~(1 << 6);
__raw_writel(val, resources->dw_sys_ctrl_base + 0x274);
}
}
}
#endif
/**
* dsp_gpt_wait_overflow - set gpt overflow and wait for fixed timeout
* @clk_id: GP Timer clock id.
@@ -257,9 +209,9 @@ int dsp_clk_enable(enum dsp_clk_id clk_id)
break;
#ifdef CONFIG_OMAP_MCBSP
case MCBSP_CLK:
mcbsp_clk_prepare(true, clk_id);
omap_mcbsp_set_io_type(MCBSP_ID(clk_id), OMAP_MCBSP_POLL_IO);
omap_mcbsp_request(MCBSP_ID(clk_id));
omap2_mcbsp_set_clks_src(MCBSP_ID(clk_id), MCBSP_CLKS_PAD_SRC);
break;
#endif
case WDT_CLK:
@@ -334,7 +286,7 @@ int dsp_clk_disable(enum dsp_clk_id clk_id)
break;
#ifdef CONFIG_OMAP_MCBSP
case MCBSP_CLK:
mcbsp_clk_prepare(false, clk_id);
omap2_mcbsp_set_clks_src(MCBSP_ID(clk_id), MCBSP_CLKS_PRCM_SRC);
omap_mcbsp_free(MCBSP_ID(clk_id));
break;
#endif

678
drivers/staging/tidspbridge/core/io_sm.c
View File

File diff suppressed because it is too large Load Diff

615
drivers/staging/tidspbridge/core/msg_sm.c
View File

@@ -24,7 +24,6 @@
#include <dspbridge/dbc.h>
/* ----------------------------------- OS Adaptation Layer */
#include <dspbridge/list.h>
#include <dspbridge/sync.h>
/* ----------------------------------- Platform Manager */
@@ -38,10 +37,10 @@
#include <dspbridge/dspmsg.h>
/* ----------------------------------- Function Prototypes */
static int add_new_msg(struct lst_list *msg_list);
static int add_new_msg(struct list_head *msg_list);
static void delete_msg_mgr(struct msg_mgr *hmsg_mgr);
static void delete_msg_queue(struct msg_queue *msg_queue_obj, u32 num_to_dsp);
static void free_msg_list(struct lst_list *msg_list);
static void free_msg_list(struct list_head *msg_list);
/*
* ======== bridge_msg_create ========
@@ -56,61 +55,46 @@ int bridge_msg_create(struct msg_mgr **msg_man,
struct io_mgr *hio_mgr;
int status = 0;
if (!msg_man || !msg_callback || !hdev_obj) {
status = -EFAULT;
goto func_end;
}
if (!msg_man || !msg_callback || !hdev_obj)
return -EFAULT;
dev_get_io_mgr(hdev_obj, &hio_mgr);
if (!hio_mgr) {
status = -EFAULT;
goto func_end;
}
if (!hio_mgr)
return -EFAULT;
*msg_man = NULL;
/* Allocate msg_ctrl manager object */
msg_mgr_obj = kzalloc(sizeof(struct msg_mgr), GFP_KERNEL);
if (!msg_mgr_obj)
return -ENOMEM;
if (msg_mgr_obj) {
msg_mgr_obj->on_exit = msg_callback;
msg_mgr_obj->hio_mgr = hio_mgr;
/* List of MSG_QUEUEs */
msg_mgr_obj->queue_list = kzalloc(sizeof(struct lst_list),
GFP_KERNEL);
/* Queues of message frames for messages to the DSP. Message
* frames will only be added to the free queue when a
* msg_queue object is created. */
msg_mgr_obj->msg_free_list = kzalloc(sizeof(struct lst_list),
GFP_KERNEL);
msg_mgr_obj->msg_used_list = kzalloc(sizeof(struct lst_list),
GFP_KERNEL);
if (msg_mgr_obj->queue_list == NULL ||
msg_mgr_obj->msg_free_list == NULL ||
msg_mgr_obj->msg_used_list == NULL) {
status = -ENOMEM;
} else {
INIT_LIST_HEAD(&msg_mgr_obj->queue_list->head);
INIT_LIST_HEAD(&msg_mgr_obj->msg_free_list->head);
INIT_LIST_HEAD(&msg_mgr_obj->msg_used_list->head);
spin_lock_init(&msg_mgr_obj->msg_mgr_lock);
}
msg_mgr_obj->on_exit = msg_callback;
msg_mgr_obj->iomgr = hio_mgr;
/* List of MSG_QUEUEs */
INIT_LIST_HEAD(&msg_mgr_obj->queue_list);
/*
* Queues of message frames for messages to the DSP. Message
* frames will only be added to the free queue when a
* msg_queue object is created.
*/
INIT_LIST_HEAD(&msg_mgr_obj->msg_free_list);
INIT_LIST_HEAD(&msg_mgr_obj->msg_used_list);
spin_lock_init(&msg_mgr_obj->msg_mgr_lock);
/* Create an event to be used by bridge_msg_put() in waiting
* for an available free frame from the message manager. */
msg_mgr_obj->sync_event =
kzalloc(sizeof(struct sync_object), GFP_KERNEL);
if (!msg_mgr_obj->sync_event)
status = -ENOMEM;
else
sync_init_event(msg_mgr_obj->sync_event);
if (!status)
*msg_man = msg_mgr_obj;
else
delete_msg_mgr(msg_mgr_obj);
} else {
status = -ENOMEM;
/*
* Create an event to be used by bridge_msg_put() in waiting
* for an available free frame from the message manager.
*/
msg_mgr_obj->sync_event =
kzalloc(sizeof(struct sync_object), GFP_KERNEL);
if (!msg_mgr_obj->sync_event) {
kfree(msg_mgr_obj);
return -ENOMEM;
}
func_end:
sync_init_event(msg_mgr_obj->sync_event);
*msg_man = msg_mgr_obj;
return status;
}
@@ -119,8 +103,7 @@ int bridge_msg_create(struct msg_mgr **msg_man,
* Create a msg_queue for sending/receiving messages to/from a node
* on the DSP.
*/
int bridge_msg_create_queue(struct msg_mgr *hmsg_mgr,
struct msg_queue **msgq,
int bridge_msg_create_queue(struct msg_mgr *hmsg_mgr, struct msg_queue **msgq,
u32 msgq_id, u32 max_msgs, void *arg)
{
u32 i;
@@ -128,107 +111,87 @@ int bridge_msg_create_queue(struct msg_mgr *hmsg_mgr,
struct msg_queue *msg_q;
int status = 0;
if (!hmsg_mgr || msgq == NULL || !hmsg_mgr->msg_free_list) {
status = -EFAULT;
goto func_end;
}
if (!hmsg_mgr || msgq == NULL)
return -EFAULT;
*msgq = NULL;
/* Allocate msg_queue object */
msg_q = kzalloc(sizeof(struct msg_queue), GFP_KERNEL);
if (!msg_q) {
status = -ENOMEM;
goto func_end;
}
lst_init_elem((struct list_head *)msg_q);
if (!msg_q)
return -ENOMEM;
msg_q->max_msgs = max_msgs;
msg_q->hmsg_mgr = hmsg_mgr;
msg_q->msg_mgr = hmsg_mgr;
msg_q->arg = arg; /* Node handle */
msg_q->msgq_id = msgq_id; /* Node env (not valid yet) */
/* Queues of Message frames for messages from the DSP */
msg_q->msg_free_list = kzalloc(sizeof(struct lst_list), GFP_KERNEL);
msg_q->msg_used_list = kzalloc(sizeof(struct lst_list), GFP_KERNEL);
if (msg_q->msg_free_list == NULL || msg_q->msg_used_list == NULL)
status = -ENOMEM;
else {
INIT_LIST_HEAD(&msg_q->msg_free_list->head);
INIT_LIST_HEAD(&msg_q->msg_used_list->head);
}
INIT_LIST_HEAD(&msg_q->msg_free_list);
INIT_LIST_HEAD(&msg_q->msg_used_list);
/* Create event that will be signalled when a message from
* the DSP is available. */
if (!status) {
msg_q->sync_event = kzalloc(sizeof(struct sync_object),
GFP_KERNEL);
if (msg_q->sync_event)
sync_init_event(msg_q->sync_event);
else
status = -ENOMEM;
msg_q->sync_event = kzalloc(sizeof(struct sync_object), GFP_KERNEL);
if (!msg_q->sync_event) {
status = -ENOMEM;
goto out_err;
}
sync_init_event(msg_q->sync_event);
/* Create a notification list for message ready notification. */
if (!status) {
msg_q->ntfy_obj = kmalloc(sizeof(struct ntfy_object),
GFP_KERNEL);
if (msg_q->ntfy_obj)
ntfy_init(msg_q->ntfy_obj);
else
status = -ENOMEM;
msg_q->ntfy_obj = kmalloc(sizeof(struct ntfy_object), GFP_KERNEL);
if (!msg_q->ntfy_obj) {
status = -ENOMEM;
goto out_err;
}
ntfy_init(msg_q->ntfy_obj);
/* Create events that will be used to synchronize cleanup
* when the object is deleted. sync_done will be set to
* unblock threads in MSG_Put() or MSG_Get(). sync_done_ack
* will be set by the unblocked thread to signal that it
* is unblocked and will no longer reference the object. */
if (!status) {
msg_q->sync_done = kzalloc(sizeof(struct sync_object),
GFP_KERNEL);
if (msg_q->sync_done)
sync_init_event(msg_q->sync_done);
else
status = -ENOMEM;
msg_q->sync_done = kzalloc(sizeof(struct sync_object), GFP_KERNEL);
if (!msg_q->sync_done) {
status = -ENOMEM;
goto out_err;
}
sync_init_event(msg_q->sync_done);
if (!status) {
msg_q->sync_done_ack = kzalloc(sizeof(struct sync_object),
GFP_KERNEL);
if (msg_q->sync_done_ack)
sync_init_event(msg_q->sync_done_ack);
else
status = -ENOMEM;
msg_q->sync_done_ack = kzalloc(sizeof(struct sync_object), GFP_KERNEL);
if (!msg_q->sync_done_ack) {
status = -ENOMEM;
goto out_err;
}
sync_init_event(msg_q->sync_done_ack);
if (!status) {
/* Enter critical section */
spin_lock_bh(&hmsg_mgr->msg_mgr_lock);
/* Initialize message frames and put in appropriate queues */
for (i = 0; i < max_msgs && !status; i++) {
status = add_new_msg(hmsg_mgr->msg_free_list);
if (!status) {
num_allocated++;
status = add_new_msg(msg_q->msg_free_list);
}
/* Enter critical section */
spin_lock_bh(&hmsg_mgr->msg_mgr_lock);
/* Initialize message frames and put in appropriate queues */
for (i = 0; i < max_msgs && !status; i++) {
status = add_new_msg(&hmsg_mgr->msg_free_list);
if (!status) {
num_allocated++;
status = add_new_msg(&msg_q->msg_free_list);
}
if (status) {
/* Stay inside CS to prevent others from taking any
* of the newly allocated message frames. */
delete_msg_queue(msg_q, num_allocated);
} else {
lst_put_tail(hmsg_mgr->queue_list,
(struct list_head *)msg_q);
*msgq = msg_q;
/* Signal that free frames are now available */
if (!LST_IS_EMPTY(hmsg_mgr->msg_free_list))
sync_set_event(hmsg_mgr->sync_event);
}
/* Exit critical section */
}
if (status) {
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
} else {
delete_msg_queue(msg_q, 0);
goto out_err;
}
func_end:
list_add_tail(&msg_q->list_elem, &hmsg_mgr->queue_list);
*msgq = msg_q;
/* Signal that free frames are now available */
if (!list_empty(&hmsg_mgr->msg_free_list))
sync_set_event(hmsg_mgr->sync_event);
/* Exit critical section */
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
return 0;
out_err:
delete_msg_queue(msg_q, num_allocated);
return status;
}
@@ -251,10 +214,10 @@ void bridge_msg_delete_queue(struct msg_queue *msg_queue_obj)
struct msg_mgr *hmsg_mgr;
u32 io_msg_pend;
if (!msg_queue_obj || !msg_queue_obj->hmsg_mgr)
goto func_end;
if (!msg_queue_obj || !msg_queue_obj->msg_mgr)
return;
hmsg_mgr = msg_queue_obj->hmsg_mgr;
hmsg_mgr = msg_queue_obj->msg_mgr;
msg_queue_obj->done = true;
/* Unblock all threads blocked in MSG_Get() or MSG_Put(). */
io_msg_pend = msg_queue_obj->io_msg_pend;
@@ -267,18 +230,12 @@ void bridge_msg_delete_queue(struct msg_queue *msg_queue_obj)
}
/* Remove message queue from hmsg_mgr->queue_list */
spin_lock_bh(&hmsg_mgr->msg_mgr_lock);
lst_remove_elem(hmsg_mgr->queue_list,
(struct list_head *)msg_queue_obj);
list_del(&msg_queue_obj->list_elem);
/* Free the message queue object */
delete_msg_queue(msg_queue_obj, msg_queue_obj->max_msgs);
if (!hmsg_mgr->msg_free_list)
goto func_cont;
if (LST_IS_EMPTY(hmsg_mgr->msg_free_list))
if (list_empty(&hmsg_mgr->msg_free_list))
sync_reset_event(hmsg_mgr->sync_event);
func_cont:
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
func_end:
return;
}
/*
@@ -290,91 +247,74 @@ int bridge_msg_get(struct msg_queue *msg_queue_obj,
{
struct msg_frame *msg_frame_obj;
struct msg_mgr *hmsg_mgr;
bool got_msg = false;
struct sync_object *syncs[2];
u32 index;
int status = 0;
if (!msg_queue_obj || pmsg == NULL) {
status = -ENOMEM;
goto func_end;
}
if (!msg_queue_obj || pmsg == NULL)
return -ENOMEM;
hmsg_mgr = msg_queue_obj->hmsg_mgr;
if (!msg_queue_obj->msg_used_list) {
status = -EFAULT;
goto func_end;
}
hmsg_mgr = msg_queue_obj->msg_mgr;
/* Enter critical section */
spin_lock_bh(&hmsg_mgr->msg_mgr_lock);
/* If a message is already there, get it */
if (!LST_IS_EMPTY(msg_queue_obj->msg_used_list)) {
msg_frame_obj = (struct msg_frame *)
lst_get_head(msg_queue_obj->msg_used_list);
if (msg_frame_obj != NULL) {
*pmsg = msg_frame_obj->msg_data.msg;
lst_put_tail(msg_queue_obj->msg_free_list,
(struct list_head *)msg_frame_obj);
if (LST_IS_EMPTY(msg_queue_obj->msg_used_list))
sync_reset_event(msg_queue_obj->sync_event);
got_msg = true;
}
} else {
if (msg_queue_obj->done)
status = -EPERM;
else
msg_queue_obj->io_msg_pend++;
if (!list_empty(&msg_queue_obj->msg_used_list)) {
msg_frame_obj = list_first_entry(&msg_queue_obj->msg_used_list,
struct msg_frame, list_elem);
list_del(&msg_frame_obj->list_elem);
*pmsg = msg_frame_obj->msg_data.msg;
list_add_tail(&msg_frame_obj->list_elem,
&msg_queue_obj->msg_free_list);
if (list_empty(&msg_queue_obj->msg_used_list))
sync_reset_event(msg_queue_obj->sync_event);
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
return 0;
}
/* Exit critical section */
if (msg_queue_obj->done) {
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
return -EPERM;
}
msg_queue_obj->io_msg_pend++;
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
if (!status && !got_msg) {
/* Wait til message is available, timeout, or done. We don't
* have to schedule the DPC, since the DSP will send messages
* when they are available. */
syncs[0] = msg_queue_obj->sync_event;
syncs[1] = msg_queue_obj->sync_done;
status = sync_wait_on_multiple_events(syncs, 2, utimeout,
&index);
/* Enter critical section */
spin_lock_bh(&hmsg_mgr->msg_mgr_lock);
if (msg_queue_obj->done) {
msg_queue_obj->io_msg_pend--;
/* Exit critical section */
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
/* Signal that we're not going to access msg_queue_obj
* anymore, so it can be deleted. */
(void)sync_set_event(msg_queue_obj->sync_done_ack);
status = -EPERM;
} else {
if (!status) {
DBC_ASSERT(!LST_IS_EMPTY
(msg_queue_obj->msg_used_list));
/* Get msg from used list */
msg_frame_obj = (struct msg_frame *)
lst_get_head(msg_queue_obj->msg_used_list);
/* Copy message into pmsg and put frame on the
* free list */
if (msg_frame_obj != NULL) {
*pmsg = msg_frame_obj->msg_data.msg;
lst_put_tail
(msg_queue_obj->msg_free_list,
(struct list_head *)
msg_frame_obj);
}
}
msg_queue_obj->io_msg_pend--;
/* Reset the event if there are still queued messages */
if (!LST_IS_EMPTY(msg_queue_obj->msg_used_list))
sync_set_event(msg_queue_obj->sync_event);
/* Exit critical section */
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
}
/*
* Wait til message is available, timeout, or done. We don't
* have to schedule the DPC, since the DSP will send messages
* when they are available.
*/
syncs[0] = msg_queue_obj->sync_event;
syncs[1] = msg_queue_obj->sync_done;
status = sync_wait_on_multiple_events(syncs, 2, utimeout, &index);
spin_lock_bh(&hmsg_mgr->msg_mgr_lock);
if (msg_queue_obj->done) {
msg_queue_obj->io_msg_pend--;
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
/*
* Signal that we're not going to access msg_queue_obj
* anymore, so it can be deleted.
*/
sync_set_event(msg_queue_obj->sync_done_ack);
return -EPERM;
}
func_end:
if (!status && !list_empty(&msg_queue_obj->msg_used_list)) {
/* Get msg from used list */
msg_frame_obj = list_first_entry(&msg_queue_obj->msg_used_list,
struct msg_frame, list_elem);
list_del(&msg_frame_obj->list_elem);
/* Copy message into pmsg and put frame on the free list */
*pmsg = msg_frame_obj->msg_data.msg;
list_add_tail(&msg_frame_obj->list_elem,
&msg_queue_obj->msg_free_list);
}
msg_queue_obj->io_msg_pend--;
/* Reset the event if there are still queued messages */
if (!list_empty(&msg_queue_obj->msg_used_list))
sync_set_event(msg_queue_obj->sync_event);
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
return status;
}
@@ -387,107 +327,100 @@ int bridge_msg_put(struct msg_queue *msg_queue_obj,
{
struct msg_frame *msg_frame_obj;
struct msg_mgr *hmsg_mgr;
bool put_msg = false;
struct sync_object *syncs[2];
u32 index;
int status = 0;
int status;
if (!msg_queue_obj || !pmsg || !msg_queue_obj->hmsg_mgr) {
status = -ENOMEM;
goto func_end;
}
hmsg_mgr = msg_queue_obj->hmsg_mgr;
if (!hmsg_mgr->msg_free_list) {
status = -EFAULT;
goto func_end;
}
if (!msg_queue_obj || !pmsg || !msg_queue_obj->msg_mgr)
return -EFAULT;
hmsg_mgr = msg_queue_obj->msg_mgr;
spin_lock_bh(&hmsg_mgr->msg_mgr_lock);
/* If a message frame is available, use it */
if (!LST_IS_EMPTY(hmsg_mgr->msg_free_list)) {
msg_frame_obj =
(struct msg_frame *)lst_get_head(hmsg_mgr->msg_free_list);
if (msg_frame_obj != NULL) {
msg_frame_obj->msg_data.msg = *pmsg;
msg_frame_obj->msg_data.msgq_id =
msg_queue_obj->msgq_id;
lst_put_tail(hmsg_mgr->msg_used_list,
(struct list_head *)msg_frame_obj);
hmsg_mgr->msgs_pending++;
put_msg = true;
}
if (LST_IS_EMPTY(hmsg_mgr->msg_free_list))
if (!list_empty(&hmsg_mgr->msg_free_list)) {
msg_frame_obj = list_first_entry(&hmsg_mgr->msg_free_list,
struct msg_frame, list_elem);
list_del(&msg_frame_obj->list_elem);
msg_frame_obj->msg_data.msg = *pmsg;
msg_frame_obj->msg_data.msgq_id =
msg_queue_obj->msgq_id;
list_add_tail(&msg_frame_obj->list_elem,
&hmsg_mgr->msg_used_list);
hmsg_mgr->msgs_pending++;
if (list_empty(&hmsg_mgr->msg_free_list))
sync_reset_event(hmsg_mgr->sync_event);
/* Release critical section before scheduling DPC */
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
/* Schedule a DPC, to do the actual data transfer: */
iosm_schedule(hmsg_mgr->hio_mgr);
} else {
if (msg_queue_obj->done)
status = -EPERM;
else
msg_queue_obj->io_msg_pend++;
iosm_schedule(hmsg_mgr->iomgr);
return 0;
}
if (msg_queue_obj->done) {
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
return -EPERM;
}
if (!status && !put_msg) {
/* Wait til a free message frame is available, timeout,
* or done */
syncs[0] = hmsg_mgr->sync_event;
syncs[1] = msg_queue_obj->sync_done;
status = sync_wait_on_multiple_events(syncs, 2, utimeout,
&index);
if (status)
goto func_end;
/* Enter critical section */
spin_lock_bh(&hmsg_mgr->msg_mgr_lock);
if (msg_queue_obj->done) {
msg_queue_obj->io_msg_pend--;
/* Exit critical section */
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
/* Signal that we're not going to access msg_queue_obj
* anymore, so it can be deleted. */
(void)sync_set_event(msg_queue_obj->sync_done_ack);
status = -EPERM;
} else {
if (LST_IS_EMPTY(hmsg_mgr->msg_free_list)) {
status = -EFAULT;
goto func_cont;
}
/* Get msg from free list */
msg_frame_obj = (struct msg_frame *)
lst_get_head(hmsg_mgr->msg_free_list);
/*
* Copy message into pmsg and put frame on the
* used list.
*/
if (msg_frame_obj) {
msg_frame_obj->msg_data.msg = *pmsg;
msg_frame_obj->msg_data.msgq_id =
msg_queue_obj->msgq_id;
lst_put_tail(hmsg_mgr->msg_used_list,
(struct list_head *)msg_frame_obj);
hmsg_mgr->msgs_pending++;
/*
* Schedule a DPC, to do the actual
* data transfer.
*/
iosm_schedule(hmsg_mgr->hio_mgr);
}
msg_queue_obj->io_msg_pend++;
msg_queue_obj->io_msg_pend--;
/* Reset event if there are still frames available */
if (!LST_IS_EMPTY(hmsg_mgr->msg_free_list))
sync_set_event(hmsg_mgr->sync_event);
func_cont:
/* Exit critical section */
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
}
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
/* Wait til a free message frame is available, timeout, or done */
syncs[0] = hmsg_mgr->sync_event;
syncs[1] = msg_queue_obj->sync_done;
status = sync_wait_on_multiple_events(syncs, 2, utimeout, &index);
if (status)
return status;
/* Enter critical section */
spin_lock_bh(&hmsg_mgr->msg_mgr_lock);
if (msg_queue_obj->done) {
msg_queue_obj->io_msg_pend--;
/* Exit critical section */
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
/*
* Signal that we're not going to access msg_queue_obj
* anymore, so it can be deleted.
*/
sync_set_event(msg_queue_obj->sync_done_ack);
return -EPERM;
}
func_end:
return status;
if (list_empty(&hmsg_mgr->msg_free_list)) {
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
return -EFAULT;
}
/* Get msg from free list */
msg_frame_obj = list_first_entry(&hmsg_mgr->msg_free_list,
struct msg_frame, list_elem);
/*
* Copy message into pmsg and put frame on the
* used list.
*/
list_del(&msg_frame_obj->list_elem);
msg_frame_obj->msg_data.msg = *pmsg;
msg_frame_obj->msg_data.msgq_id = msg_queue_obj->msgq_id;
list_add_tail(&msg_frame_obj->list_elem, &hmsg_mgr->msg_used_list);
hmsg_mgr->msgs_pending++;
/*
* Schedule a DPC, to do the actual
* data transfer.
*/
iosm_schedule(hmsg_mgr->iomgr);
msg_queue_obj->io_msg_pend--;
/* Reset event if there are still frames available */
if (!list_empty(&hmsg_mgr->msg_free_list))
sync_set_event(hmsg_mgr->sync_event);
/* Exit critical section */
spin_unlock_bh(&hmsg_mgr->msg_mgr_lock);
return 0;
}
/*
@@ -551,20 +484,17 @@ void bridge_msg_set_queue_id(struct msg_queue *msg_queue_obj, u32 msgq_id)
* ======== add_new_msg ========
* Must be called in message manager critical section.
*/
static int add_new_msg(struct lst_list *msg_list)
static int add_new_msg(struct list_head *msg_list)
{
struct msg_frame *pmsg;
int status = 0;
pmsg = kzalloc(sizeof(struct msg_frame), GFP_ATOMIC);
if (pmsg != NULL) {
lst_init_elem((struct list_head *)pmsg);
lst_put_tail(msg_list, (struct list_head *)pmsg);
} else {
status = -ENOMEM;
}
if (!pmsg)
return -ENOMEM;
return status;
list_add_tail(&pmsg->list_elem, msg_list);
return 0;
}
/*
@@ -573,30 +503,13 @@ static int add_new_msg(struct lst_list *msg_list)
static void delete_msg_mgr(struct msg_mgr *hmsg_mgr)
{
if (!hmsg_mgr)
goto func_end;
if (hmsg_mgr->queue_list) {
if (LST_IS_EMPTY(hmsg_mgr->queue_list)) {
kfree(hmsg_mgr->queue_list);
hmsg_mgr->queue_list = NULL;
}
}
if (hmsg_mgr->msg_free_list) {
free_msg_list(hmsg_mgr->msg_free_list);
hmsg_mgr->msg_free_list = NULL;
}
if (hmsg_mgr->msg_used_list) {
free_msg_list(hmsg_mgr->msg_used_list);
hmsg_mgr->msg_used_list = NULL;
}
return;
/* FIXME: free elements from queue_list? */
free_msg_list(&hmsg_mgr->msg_free_list);
free_msg_list(&hmsg_mgr->msg_used_list);
kfree(hmsg_mgr->sync_event);
kfree(hmsg_mgr);
func_end:
return;
}
/*
@@ -605,37 +518,26 @@ static void delete_msg_mgr(struct msg_mgr *hmsg_mgr)
static void delete_msg_queue(struct msg_queue *msg_queue_obj, u32 num_to_dsp)
{
struct msg_mgr *hmsg_mgr;
struct msg_frame *pmsg;
struct msg_frame *pmsg, *tmp;
u32 i;
if (!msg_queue_obj ||
!msg_queue_obj->hmsg_mgr || !msg_queue_obj->hmsg_mgr->msg_free_list)
goto func_end;
if (!msg_queue_obj || !msg_queue_obj->msg_mgr)
return;
hmsg_mgr = msg_queue_obj->hmsg_mgr;
hmsg_mgr = msg_queue_obj->msg_mgr;
/* Pull off num_to_dsp message frames from Msg manager and free */
for (i = 0; i < num_to_dsp; i++) {
if (!LST_IS_EMPTY(hmsg_mgr->msg_free_list)) {
pmsg = (struct msg_frame *)
lst_get_head(hmsg_mgr->msg_free_list);
kfree(pmsg);
} else {
/* Cannot free all of the message frames */
i = 0;
list_for_each_entry_safe(pmsg, tmp, &hmsg_mgr->msg_free_list,
list_elem) {
list_del(&pmsg->list_elem);
kfree(pmsg);
if (i++ >= num_to_dsp)
break;
}
}
if (msg_queue_obj->msg_free_list) {
free_msg_list(msg_queue_obj->msg_free_list);
msg_queue_obj->msg_free_list = NULL;
}
if (msg_queue_obj->msg_used_list) {
free_msg_list(msg_queue_obj->msg_used_list);
msg_queue_obj->msg_used_list = NULL;
}
free_msg_list(&msg_queue_obj->msg_free_list);
free_msg_list(&msg_queue_obj->msg_used_list);
if (msg_queue_obj->ntfy_obj) {
ntfy_delete(msg_queue_obj->ntfy_obj);
@@ -647,27 +549,20 @@ static void delete_msg_queue(struct msg_queue *msg_queue_obj, u32 num_to_dsp)
kfree(msg_queue_obj->sync_done_ack);
kfree(msg_queue_obj);
func_end:
return;
}
/*
* ======== free_msg_list ========
*/
static void free_msg_list(struct lst_list *msg_list)
static void free_msg_list(struct list_head *msg_list)
{
struct msg_frame *pmsg;
struct msg_frame *pmsg, *tmp;
if (!msg_list)
goto func_end;
return;
while ((pmsg = (struct msg_frame *)lst_get_head(msg_list)) != NULL)
list_for_each_entry_safe(pmsg, tmp, msg_list, list_elem) {
list_del(&pmsg->list_elem);
kfree(pmsg);
DBC_ASSERT(LST_IS_EMPTY(msg_list));
kfree(msg_list);
func_end:
return;
}
}

193
drivers/staging/tidspbridge/core/tiomap3430.c
View File

@@ -229,11 +229,11 @@ static struct notifier_block dsp_mbox_notifier = {
static inline void flush_all(struct bridge_dev_context *dev_context)
{
if (dev_context->dw_brd_state == BRD_DSP_HIBERNATION ||
dev_context->dw_brd_state == BRD_HIBERNATION)
if (dev_context->brd_state == BRD_DSP_HIBERNATION ||
dev_context->brd_state == BRD_HIBERNATION)
wake_dsp(dev_context, NULL);
hw_mmu_tlb_flush_all(dev_context->dw_dsp_mmu_base);
hw_mmu_tlb_flush_all(dev_context->dsp_mmu_base);
}
static void bad_page_dump(u32 pa, struct page *pg)
@@ -259,8 +259,6 @@ void bridge_drv_entry(struct bridge_drv_interface **drv_intf,
DBC_REQUIRE(driver_file_name != NULL);
io_sm_init(); /* Initialization of io_sm module */
if (strcmp(driver_file_name, "UMA") == 0)
*drv_intf = &drv_interface_fxns;
else
@@ -308,7 +306,7 @@ static int bridge_brd_monitor(struct bridge_dev_context *dev_ctxt)
dsp_clk_enable(DSP_CLK_IVA2);
/* set the device state to IDLE */
dev_context->dw_brd_state = BRD_IDLE;
dev_context->brd_state = BRD_IDLE;
return 0;
}
@@ -325,16 +323,16 @@ static int bridge_brd_read(struct bridge_dev_context *dev_ctxt,
int status = 0;
struct bridge_dev_context *dev_context = dev_ctxt;
u32 offset;
u32 dsp_base_addr = dev_ctxt->dw_dsp_base_addr;
u32 dsp_base_addr = dev_ctxt->dsp_base_addr;
if (dsp_addr < dev_context->dw_dsp_start_add) {
if (dsp_addr < dev_context->dsp_start_add) {
status = -EPERM;
return status;
}
/* change here to account for the 3 bands of the DSP internal memory */
if ((dsp_addr - dev_context->dw_dsp_start_add) <
dev_context->dw_internal_size) {
offset = dsp_addr - dev_context->dw_dsp_start_add;
if ((dsp_addr - dev_context->dsp_start_add) <
dev_context->internal_size) {
offset = dsp_addr - dev_context->dsp_start_add;
} else {
status = read_ext_dsp_data(dev_context, host_buff, dsp_addr,
ul_num_bytes, mem_type);
@@ -356,7 +354,7 @@ static int bridge_brd_set_state(struct bridge_dev_context *dev_ctxt,
int status = 0;
struct bridge_dev_context *dev_context = dev_ctxt;
dev_context->dw_brd_state = brd_state;
dev_context->brd_state = brd_state;
return status;
}
@@ -398,17 +396,17 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt,
* last dsp base image was loaded. The first entry is always
* SHMMEM base. */
/* Get SHM_BEG - convert to byte address */
(void)dev_get_symbol(dev_context->hdev_obj, SHMBASENAME,
(void)dev_get_symbol(dev_context->dev_obj, SHMBASENAME,
&ul_shm_base_virt);
ul_shm_base_virt *= DSPWORDSIZE;
DBC_ASSERT(ul_shm_base_virt != 0);
/* DSP Virtual address */
ul_tlb_base_virt = dev_context->atlb_entry[0].ul_dsp_va;
ul_tlb_base_virt = dev_context->atlb_entry[0].dsp_va;
DBC_ASSERT(ul_tlb_base_virt <= ul_shm_base_virt);
ul_shm_offset_virt =
ul_shm_base_virt - (ul_tlb_base_virt * DSPWORDSIZE);
/* Kernel logical address */
ul_shm_base = dev_context->atlb_entry[0].ul_gpp_va + ul_shm_offset_virt;
ul_shm_base = dev_context->atlb_entry[0].gpp_va + ul_shm_offset_virt;
DBC_ASSERT(ul_shm_base != 0);
/* 2nd wd is used as sync field */
@@ -454,9 +452,9 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt,
udelay(100);
/* Disbale the DSP MMU */
hw_mmu_disable(resources->dw_dmmu_base);
hw_mmu_disable(resources->dmmu_base);
/* Disable TWL */
hw_mmu_twl_disable(resources->dw_dmmu_base);
hw_mmu_twl_disable(resources->dmmu_base);
/* Only make TLB entry if both addresses are non-zero */
for (entry_ndx = 0; entry_ndx < BRDIOCTL_NUMOFMMUTLB;
@@ -468,20 +466,20 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt,
.mixed_size = e->mixed_mode,
};
if (!e->ul_gpp_pa || !e->ul_dsp_va)
if (!e->gpp_pa || !e->dsp_va)
continue;
dev_dbg(bridge,
"MMU %d, pa: 0x%x, va: 0x%x, size: 0x%x",
itmp_entry_ndx,
e->ul_gpp_pa,
e->ul_dsp_va,
e->ul_size);
e->gpp_pa,
e->dsp_va,
e->size);
hw_mmu_tlb_add(dev_context->dw_dsp_mmu_base,
e->ul_gpp_pa,
e->ul_dsp_va,
e->ul_size,
hw_mmu_tlb_add(dev_context->dsp_mmu_base,
e->gpp_pa,
e->dsp_va,
e->size,
itmp_entry_ndx,
&map_attrs, 1, 1);
@@ -492,24 +490,24 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt,
/* Lock the above TLB entries and get the BIOS and load monitor timer
* information */
if (!status) {
hw_mmu_num_locked_set(resources->dw_dmmu_base, itmp_entry_ndx);
hw_mmu_victim_num_set(resources->dw_dmmu_base, itmp_entry_ndx);
hw_mmu_ttb_set(resources->dw_dmmu_base,
hw_mmu_num_locked_set(resources->dmmu_base, itmp_entry_ndx);
hw_mmu_victim_num_set(resources->dmmu_base, itmp_entry_ndx);
hw_mmu_ttb_set(resources->dmmu_base,
dev_context->pt_attrs->l1_base_pa);
hw_mmu_twl_enable(resources->dw_dmmu_base);
hw_mmu_twl_enable(resources->dmmu_base);
/* Enable the SmartIdle and AutoIdle bit for MMU_SYSCONFIG */
temp = __raw_readl((resources->dw_dmmu_base) + 0x10);
temp = __raw_readl((resources->dmmu_base) + 0x10);
temp = (temp & 0xFFFFFFEF) | 0x11;
__raw_writel(temp, (resources->dw_dmmu_base) + 0x10);
__raw_writel(temp, (resources->dmmu_base) + 0x10);
/* Let the DSP MMU run */
hw_mmu_enable(resources->dw_dmmu_base);
hw_mmu_enable(resources->dmmu_base);
/* Enable the BIOS clock */
(void)dev_get_symbol(dev_context->hdev_obj,
(void)dev_get_symbol(dev_context->dev_obj,
BRIDGEINIT_BIOSGPTIMER, &ul_bios_gp_timer);
(void)dev_get_symbol(dev_context->hdev_obj,
(void)dev_get_symbol(dev_context->dev_obj,
BRIDGEINIT_LOADMON_GPTIMER,
&ul_load_monitor_timer);
}
@@ -538,7 +536,7 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt,
if (!status) {
/* Set the DSP clock rate */
(void)dev_get_symbol(dev_context->hdev_obj,
(void)dev_get_symbol(dev_context->dev_obj,
"_BRIDGEINIT_DSP_FREQ", &ul_dsp_clk_addr);
/*Set Autoidle Mode for IVA2 PLL */
(*pdata->dsp_cm_write)(1 << OMAP3430_AUTO_IVA2_DPLL_SHIFT,
@@ -568,18 +566,18 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt,
}
if (!status) {
/*PM_IVA2GRPSEL_PER = 0xC0;*/
temp = readl(resources->dw_per_pm_base + 0xA8);
temp = readl(resources->per_pm_base + 0xA8);
temp = (temp & 0xFFFFFF30) | 0xC0;
writel(temp, resources->dw_per_pm_base + 0xA8);
writel(temp, resources->per_pm_base + 0xA8);
/*PM_MPUGRPSEL_PER &= 0xFFFFFF3F; */
temp = readl(resources->dw_per_pm_base + 0xA4);
temp = readl(resources->per_pm_base + 0xA4);
temp = (temp & 0xFFFFFF3F);
writel(temp, resources->dw_per_pm_base + 0xA4);
writel(temp, resources->per_pm_base + 0xA4);
/*CM_SLEEPDEP_PER |= 0x04; */
temp = readl(resources->dw_per_base + 0x44);
temp = readl(resources->per_base + 0x44);
temp = (temp & 0xFFFFFFFB) | 0x04;
writel(temp, resources->dw_per_base + 0x44);
writel(temp, resources->per_base + 0x44);
/*CM_CLKSTCTRL_IVA2 = 0x00000003 -To Allow automatic transitions */
(*pdata->dsp_cm_write)(OMAP34XX_CLKSTCTRL_ENABLE_AUTO,
@@ -588,7 +586,7 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt,
/* Let DSP go */
dev_dbg(bridge, "%s Unreset\n", __func__);
/* Enable DSP MMU Interrupts */
hw_mmu_event_enable(resources->dw_dmmu_base,
hw_mmu_event_enable(resources->dmmu_base,
HW_MMU_ALL_INTERRUPTS);
/* release the RST1, DSP starts executing now .. */
(*pdata->dsp_prm_rmw_bits)(OMAP3430_RST1_IVA2_MASK, 0,
@@ -609,7 +607,7 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt,
dsp_wdt_sm_set((void *)ul_shm_base);
dsp_wdt_enable(true);
status = dev_get_io_mgr(dev_context->hdev_obj, &hio_mgr);
status = dev_get_io_mgr(dev_context->dev_obj, &hio_mgr);
if (hio_mgr) {
io_sh_msetting(hio_mgr, SHM_OPPINFO, NULL);
/* Write the synchronization bit to indicate the
@@ -618,10 +616,10 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt,
__raw_writel(0XCAFECAFE, dw_sync_addr);
/* update board state */
dev_context->dw_brd_state = BRD_RUNNING;
dev_context->brd_state = BRD_RUNNING;
/* (void)chnlsm_enable_interrupt(dev_context); */
} else {
dev_context->dw_brd_state = BRD_UNKNOWN;
dev_context->brd_state = BRD_UNKNOWN;
}
}
return status;
@@ -644,7 +642,7 @@ static int bridge_brd_stop(struct bridge_dev_context *dev_ctxt)
struct omap_dsp_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
if (dev_context->dw_brd_state == BRD_STOPPED)
if (dev_context->brd_state == BRD_STOPPED)
return status;
/* as per TRM, it is advised to first drive the IVA2 to 'Standby' mode,
@@ -669,10 +667,10 @@ static int bridge_brd_stop(struct bridge_dev_context *dev_ctxt)
udelay(10);
/* Release the Ext Base virtual Address as the next DSP Program
* may have a different load address */
if (dev_context->dw_dsp_ext_base_addr)
dev_context->dw_dsp_ext_base_addr = 0;
if (dev_context->dsp_ext_base_addr)
dev_context->dsp_ext_base_addr = 0;
dev_context->dw_brd_state = BRD_STOPPED; /* update board state */
dev_context->brd_state = BRD_STOPPED; /* update board state */
dsp_wdt_enable(false);
@@ -708,7 +706,7 @@ static int bridge_brd_status(struct bridge_dev_context *dev_ctxt,
int *board_state)
{
struct bridge_dev_context *dev_context = dev_ctxt;
*board_state = dev_context->dw_brd_state;
*board_state = dev_context->brd_state;
return 0;
}
@@ -723,12 +721,12 @@ static int bridge_brd_write(struct bridge_dev_context *dev_ctxt,
int status = 0;
struct bridge_dev_context *dev_context = dev_ctxt;
if (dsp_addr < dev_context->dw_dsp_start_add) {
if (dsp_addr < dev_context->dsp_start_add) {
status = -EPERM;
return status;
}
if ((dsp_addr - dev_context->dw_dsp_start_add) <
dev_context->dw_internal_size) {
if ((dsp_addr - dev_context->dsp_start_add) <
dev_context->internal_size) {
status = write_dsp_data(dev_ctxt, host_buff, dsp_addr,
ul_num_bytes, mem_type);
} else {
@@ -766,24 +764,24 @@ static int bridge_dev_create(struct bridge_dev_context
goto func_end;
}
dev_context->dw_dsp_start_add = (u32) OMAP_GEM_BASE;
dev_context->dw_self_loop = (u32) NULL;
dev_context->dsp_start_add = (u32) OMAP_GEM_BASE;
dev_context->self_loop = (u32) NULL;
dev_context->dsp_per_clks = 0;
dev_context->dw_internal_size = OMAP_DSP_SIZE;
dev_context->internal_size = OMAP_DSP_SIZE;
/* Clear dev context MMU table entries.
* These get set on bridge_io_on_loaded() call after program loaded. */
for (entry_ndx = 0; entry_ndx < BRDIOCTL_NUMOFMMUTLB; entry_ndx++) {
dev_context->atlb_entry[entry_ndx].ul_gpp_pa =
dev_context->atlb_entry[entry_ndx].ul_dsp_va = 0;
dev_context->atlb_entry[entry_ndx].gpp_pa =
dev_context->atlb_entry[entry_ndx].dsp_va = 0;
}
dev_context->dw_dsp_base_addr = (u32) MEM_LINEAR_ADDRESS((void *)
dev_context->dsp_base_addr = (u32) MEM_LINEAR_ADDRESS((void *)
(config_param->
dw_mem_base
mem_base
[3]),
config_param->
dw_mem_length
mem_length
[3]);
if (!dev_context->dw_dsp_base_addr)
if (!dev_context->dsp_base_addr)
status = -EPERM;
pt_attrs = kzalloc(sizeof(struct pg_table_attrs), GFP_KERNEL);
@@ -871,12 +869,12 @@ static int bridge_dev_create(struct bridge_dev_context
udelay(5);
/* MMU address is obtained from the host
* resources struct */
dev_context->dw_dsp_mmu_base = resources->dw_dmmu_base;
dev_context->dsp_mmu_base = resources->dmmu_base;
}
if (!status) {
dev_context->hdev_obj = hdev_obj;
dev_context->dev_obj = hdev_obj;
/* Store current board state. */
dev_context->dw_brd_state = BRD_UNKNOWN;
dev_context->brd_state = BRD_UNKNOWN;
dev_context->resources = resources;
dsp_clk_enable(DSP_CLK_IVA2);
bridge_brd_stop(dev_context);
@@ -1003,12 +1001,12 @@ static int bridge_dev_destroy(struct bridge_dev_context *dev_ctxt)
host_res = dev_context->resources;
shm_size = drv_datap->shm_size;
if (shm_size >= 0x10000) {
if ((host_res->dw_mem_base[1]) &&
(host_res->dw_mem_phys[1])) {
if ((host_res->mem_base[1]) &&
(host_res->mem_phys[1])) {
mem_free_phys_mem((void *)
host_res->dw_mem_base
host_res->mem_base
[1],
host_res->dw_mem_phys
host_res->mem_phys
[1], shm_size);
}
} else {
@@ -1017,34 +1015,31 @@ static int bridge_dev_destroy(struct bridge_dev_context *dev_ctxt)
"mem_free_phys_mem\n", __func__,
status);
}
host_res->dw_mem_base[1] = 0;
host_res->dw_mem_phys[1] = 0;
host_res->mem_base[1] = 0;
host_res->mem_phys[1] = 0;
if (host_res->dw_mem_base[0])
iounmap((void *)host_res->dw_mem_base[0]);
if (host_res->dw_mem_base[2])
iounmap((void *)host_res->dw_mem_base[2]);
if (host_res->dw_mem_base[3])
iounmap((void *)host_res->dw_mem_base[3]);
if (host_res->dw_mem_base[4])
iounmap((void *)host_res->dw_mem_base[4]);
if (host_res->dw_dmmu_base)
iounmap(host_res->dw_dmmu_base);
if (host_res->dw_per_base)
iounmap(host_res->dw_per_base);
if (host_res->dw_per_pm_base)
iounmap((void *)host_res->dw_per_pm_base);
if (host_res->dw_core_pm_base)
iounmap((void *)host_res->dw_core_pm_base);
if (host_res->dw_sys_ctrl_base)
iounmap(host_res->dw_sys_ctrl_base);
if (host_res->mem_base[0])
iounmap((void *)host_res->mem_base[0]);
if (host_res->mem_base[2])
iounmap((void *)host_res->mem_base[2]);
if (host_res->mem_base[3])
iounmap((void *)host_res->mem_base[3]);
if (host_res->mem_base[4])
iounmap((void *)host_res->mem_base[4]);
if (host_res->dmmu_base)
iounmap(host_res->dmmu_base);
if (host_res->per_base)
iounmap(host_res->per_base);
if (host_res->per_pm_base)
iounmap((void *)host_res->per_pm_base);
if (host_res->core_pm_base)
iounmap((void *)host_res->core_pm_base);
host_res->dw_mem_base[0] = (u32) NULL;
host_res->dw_mem_base[2] = (u32) NULL;
host_res->dw_mem_base[3] = (u32) NULL;
host_res->dw_mem_base[4] = (u32) NULL;
host_res->dw_dmmu_base = NULL;
host_res->dw_sys_ctrl_base = NULL;
host_res->mem_base[0] = (u32) NULL;
host_res->mem_base[2] = (u32) NULL;
host_res->mem_base[3] = (u32) NULL;
host_res->mem_base[4] = (u32) NULL;
host_res->dmmu_base = NULL;
kfree(host_res);
}
@@ -1075,8 +1070,8 @@ static int bridge_brd_mem_copy(struct bridge_dev_context *dev_ctxt,
status = read_ext_dsp_data(dev_ctxt, host_buf, src_addr,
copy_bytes, mem_type);
if (!status) {
if (dest_addr < (dev_context->dw_dsp_start_add +
dev_context->dw_internal_size)) {
if (dest_addr < (dev_context->dsp_start_add +
dev_context->internal_size)) {
/* Write to Internal memory */
status = write_dsp_data(dev_ctxt, host_buf,
dest_addr, copy_bytes,
@@ -1109,8 +1104,8 @@ static int bridge_brd_mem_write(struct bridge_dev_context *dev_ctxt,
while (ul_remain_bytes > 0 && !status) {
ul_bytes =
ul_remain_bytes > BUFFERSIZE ? BUFFERSIZE : ul_remain_bytes;
if (dsp_addr < (dev_context->dw_dsp_start_add +
dev_context->dw_internal_size)) {
if (dsp_addr < (dev_context->dsp_start_add +
dev_context->internal_size)) {
status =
write_dsp_data(dev_ctxt, host_buff, dsp_addr,
ul_bytes, mem_type);

112
drivers/staging/tidspbridge/core/tiomap3430_pwr.c
View File

@@ -29,13 +29,13 @@
/* ----------------------------------- Platform Manager */
#include <dspbridge/brddefs.h>
#include <dspbridge/dev.h>
#include <dspbridge/iodefs.h>
#include <dspbridge/io.h>
/* ------------------------------------ Hardware Abstraction Layer */
#include <hw_defs.h>
#include <hw_mmu.h>
#include <dspbridge/pwr_sh.h>
#include <dspbridge/pwr.h>
/* ----------------------------------- Bridge Driver */
#include <dspbridge/dspdeh.h>
@@ -118,10 +118,10 @@ int handle_hibernation_from_dsp(struct bridge_dev_context *dev_context)
if (!status) {
/* Update the Bridger Driver state */
dev_context->dw_brd_state = BRD_DSP_HIBERNATION;
dev_context->brd_state = BRD_DSP_HIBERNATION;
#ifdef CONFIG_TIDSPBRIDGE_DVFS
status =
dev_get_io_mgr(dev_context->hdev_obj, &hio_mgr);
dev_get_io_mgr(dev_context->dev_obj, &hio_mgr);
if (!hio_mgr) {
status = DSP_EHANDLE;
return status;
@@ -163,7 +163,7 @@ int sleep_dsp(struct bridge_dev_context *dev_context, u32 dw_cmd,
if ((dw_cmd != PWR_DEEPSLEEP) && (dw_cmd != PWR_EMERGENCYDEEPSLEEP))
return -EINVAL;
switch (dev_context->dw_brd_state) {
switch (dev_context->brd_state) {
case BRD_RUNNING:
omap_mbox_save_ctx(dev_context->mbox);
if (dsp_test_sleepstate == PWRDM_POWER_OFF) {
@@ -216,16 +216,16 @@ int sleep_dsp(struct bridge_dev_context *dev_context, u32 dw_cmd,
pr_err("%s: Timed out waiting for DSP off mode, state %x\n",
__func__, pwr_state);
#ifdef CONFIG_TIDSPBRIDGE_NTFY_PWRERR
dev_get_deh_mgr(dev_context->hdev_obj, &hdeh_mgr);
dev_get_deh_mgr(dev_context->dev_obj, &hdeh_mgr);
bridge_deh_notify(hdeh_mgr, DSP_PWRERROR, 0);
#endif /* CONFIG_TIDSPBRIDGE_NTFY_PWRERR */
return -ETIMEDOUT;
} else {
/* Update the Bridger Driver state */
if (dsp_test_sleepstate == PWRDM_POWER_OFF)
dev_context->dw_brd_state = BRD_HIBERNATION;
dev_context->brd_state = BRD_HIBERNATION;
else
dev_context->dw_brd_state = BRD_RETENTION;
dev_context->brd_state = BRD_RETENTION;
/* Disable wdt on hibernation. */
dsp_wdt_enable(false);
@@ -258,8 +258,8 @@ int wake_dsp(struct bridge_dev_context *dev_context, void *pargs)
#ifdef CONFIG_PM
/* Check the board state, if it is not 'SLEEP' then return */
if (dev_context->dw_brd_state == BRD_RUNNING ||
dev_context->dw_brd_state == BRD_STOPPED) {
if (dev_context->brd_state == BRD_RUNNING ||
dev_context->brd_state == BRD_STOPPED) {
/* The Device is in 'RET' or 'OFF' state and Bridge state is not
* 'SLEEP', this means state inconsistency, so return */
return 0;
@@ -269,7 +269,7 @@ int wake_dsp(struct bridge_dev_context *dev_context, void *pargs)
sm_interrupt_dsp(dev_context, MBX_PM_DSPWAKEUP);
/* Set the device state to RUNNIG */
dev_context->dw_brd_state = BRD_RUNNING;
dev_context->brd_state = BRD_RUNNING;
#endif /* CONFIG_PM */
return status;
}
@@ -351,12 +351,12 @@ int pre_scale_dsp(struct bridge_dev_context *dev_context, void *pargs)
dev_dbg(bridge, "OPP: %s voltage_domain = %x, level = 0x%x\n",
__func__, voltage_domain, level);
if ((dev_context->dw_brd_state == BRD_HIBERNATION) ||
(dev_context->dw_brd_state == BRD_RETENTION) ||
(dev_context->dw_brd_state == BRD_DSP_HIBERNATION)) {
if ((dev_context->brd_state == BRD_HIBERNATION) ||
(dev_context->brd_state == BRD_RETENTION) ||
(dev_context->brd_state == BRD_DSP_HIBERNATION)) {
dev_dbg(bridge, "OPP: %s IVA in sleep. No message to DSP\n");
return 0;
} else if ((dev_context->dw_brd_state == BRD_RUNNING)) {
} else if ((dev_context->brd_state == BRD_RUNNING)) {
/* Send a prenotificatio to DSP */
dev_dbg(bridge, "OPP: %s sent notification to DSP\n", __func__);
sm_interrupt_dsp(dev_context, MBX_PM_SETPOINT_PRENOTIFY);
@@ -382,7 +382,7 @@ int post_scale_dsp(struct bridge_dev_context *dev_context,
u32 voltage_domain;
struct io_mgr *hio_mgr;
status = dev_get_io_mgr(dev_context->hdev_obj, &hio_mgr);
status = dev_get_io_mgr(dev_context->dev_obj, &hio_mgr);
if (!hio_mgr)
return -EFAULT;
@@ -390,14 +390,14 @@ int post_scale_dsp(struct bridge_dev_context *dev_context,
level = *((u32 *) pargs + 1);
dev_dbg(bridge, "OPP: %s voltage_domain = %x, level = 0x%x\n",
__func__, voltage_domain, level);
if ((dev_context->dw_brd_state == BRD_HIBERNATION) ||
(dev_context->dw_brd_state == BRD_RETENTION) ||
(dev_context->dw_brd_state == BRD_DSP_HIBERNATION)) {
if ((dev_context->brd_state == BRD_HIBERNATION) ||
(dev_context->brd_state == BRD_RETENTION) ||
(dev_context->brd_state == BRD_DSP_HIBERNATION)) {
/* Update the OPP value in shared memory */
io_sh_msetting(hio_mgr, SHM_CURROPP, &level);
dev_dbg(bridge, "OPP: %s IVA in sleep. Wrote to shm\n",
__func__);
} else if ((dev_context->dw_brd_state == BRD_RUNNING)) {
} else if ((dev_context->brd_state == BRD_RUNNING)) {
/* Update the OPP value in shared memory */
io_sh_msetting(hio_mgr, SHM_CURROPP, &level);
/* Send a post notification to DSP */
@@ -434,8 +434,8 @@ void dsp_clk_wakeup_event_ctrl(u32 clock_id, bool enable)
switch (clock_id) {
case BPWR_GP_TIMER5:
iva2_grpsel = readl(resources->dw_per_pm_base + 0xA8);
mpu_grpsel = readl(resources->dw_per_pm_base + 0xA4);
iva2_grpsel = readl(resources->per_pm_base + 0xA8);
mpu_grpsel = readl(resources->per_pm_base + 0xA4);
if (enable) {
iva2_grpsel |= OMAP3430_GRPSEL_GPT5_MASK;
mpu_grpsel &= ~OMAP3430_GRPSEL_GPT5_MASK;
@@ -443,12 +443,12 @@ void dsp_clk_wakeup_event_ctrl(u32 clock_id, bool enable)
mpu_grpsel |= OMAP3430_GRPSEL_GPT5_MASK;
iva2_grpsel &= ~OMAP3430_GRPSEL_GPT5_MASK;
}
writel(iva2_grpsel, resources->dw_per_pm_base + 0xA8);
writel(mpu_grpsel, resources->dw_per_pm_base + 0xA4);
writel(iva2_grpsel, resources->per_pm_base + 0xA8);
writel(mpu_grpsel, resources->per_pm_base + 0xA4);
break;
case BPWR_GP_TIMER6:
iva2_grpsel = readl(resources->dw_per_pm_base + 0xA8);
mpu_grpsel = readl(resources->dw_per_pm_base + 0xA4);
iva2_grpsel = readl(resources->per_pm_base + 0xA8);
mpu_grpsel = readl(resources->per_pm_base + 0xA4);
if (enable) {
iva2_grpsel |= OMAP3430_GRPSEL_GPT6_MASK;
mpu_grpsel &= ~OMAP3430_GRPSEL_GPT6_MASK;
@@ -456,12 +456,12 @@ void dsp_clk_wakeup_event_ctrl(u32 clock_id, bool enable)
mpu_grpsel |= OMAP3430_GRPSEL_GPT6_MASK;
iva2_grpsel &= ~OMAP3430_GRPSEL_GPT6_MASK;
}
writel(iva2_grpsel, resources->dw_per_pm_base + 0xA8);
writel(mpu_grpsel, resources->dw_per_pm_base + 0xA4);
writel(iva2_grpsel, resources->per_pm_base + 0xA8);
writel(mpu_grpsel, resources->per_pm_base + 0xA4);
break;
case BPWR_GP_TIMER7:
iva2_grpsel = readl(resources->dw_per_pm_base + 0xA8);
mpu_grpsel = readl(resources->dw_per_pm_base + 0xA4);
iva2_grpsel = readl(resources->per_pm_base + 0xA8);
mpu_grpsel = readl(resources->per_pm_base + 0xA4);
if (enable) {
iva2_grpsel |= OMAP3430_GRPSEL_GPT7_MASK;
mpu_grpsel &= ~OMAP3430_GRPSEL_GPT7_MASK;
@@ -469,12 +469,12 @@ void dsp_clk_wakeup_event_ctrl(u32 clock_id, bool enable)
mpu_grpsel |= OMAP3430_GRPSEL_GPT7_MASK;
iva2_grpsel &= ~OMAP3430_GRPSEL_GPT7_MASK;
}
writel(iva2_grpsel, resources->dw_per_pm_base + 0xA8);
writel(mpu_grpsel, resources->dw_per_pm_base + 0xA4);
writel(iva2_grpsel, resources->per_pm_base + 0xA8);
writel(mpu_grpsel, resources->per_pm_base + 0xA4);
break;
case BPWR_GP_TIMER8:
iva2_grpsel = readl(resources->dw_per_pm_base + 0xA8);
mpu_grpsel = readl(resources->dw_per_pm_base + 0xA4);
iva2_grpsel = readl(resources->per_pm_base + 0xA8);
mpu_grpsel = readl(resources->per_pm_base + 0xA4);
if (enable) {
iva2_grpsel |= OMAP3430_GRPSEL_GPT8_MASK;
mpu_grpsel &= ~OMAP3430_GRPSEL_GPT8_MASK;
@@ -482,12 +482,12 @@ void dsp_clk_wakeup_event_ctrl(u32 clock_id, bool enable)
mpu_grpsel |= OMAP3430_GRPSEL_GPT8_MASK;
iva2_grpsel &= ~OMAP3430_GRPSEL_GPT8_MASK;
}
writel(iva2_grpsel, resources->dw_per_pm_base + 0xA8);
writel(mpu_grpsel, resources->dw_per_pm_base + 0xA4);
writel(iva2_grpsel, resources->per_pm_base + 0xA8);
writel(mpu_grpsel, resources->per_pm_base + 0xA4);
break;
case BPWR_MCBSP1:
iva2_grpsel = readl(resources->dw_core_pm_base + 0xA8);
mpu_grpsel = readl(resources->dw_core_pm_base + 0xA4);
iva2_grpsel = readl(resources->core_pm_base + 0xA8);
mpu_grpsel = readl(resources->core_pm_base + 0xA4);
if (enable) {
iva2_grpsel |= OMAP3430_GRPSEL_MCBSP1_MASK;
mpu_grpsel &= ~OMAP3430_GRPSEL_MCBSP1_MASK;
@@ -495,12 +495,12 @@ void dsp_clk_wakeup_event_ctrl(u32 clock_id, bool enable)
mpu_grpsel |= OMAP3430_GRPSEL_MCBSP1_MASK;
iva2_grpsel &= ~OMAP3430_GRPSEL_MCBSP1_MASK;
}
writel(iva2_grpsel, resources->dw_core_pm_base + 0xA8);
writel(mpu_grpsel, resources->dw_core_pm_base + 0xA4);
writel(iva2_grpsel, resources->core_pm_base + 0xA8);
writel(mpu_grpsel, resources->core_pm_base + 0xA4);
break;
case BPWR_MCBSP2:
iva2_grpsel = readl(resources->dw_per_pm_base + 0xA8);
mpu_grpsel = readl(resources->dw_per_pm_base + 0xA4);
iva2_grpsel = readl(resources->per_pm_base + 0xA8);
mpu_grpsel = readl(resources->per_pm_base + 0xA4);
if (enable) {
iva2_grpsel |= OMAP3430_GRPSEL_MCBSP2_MASK;
mpu_grpsel &= ~OMAP3430_GRPSEL_MCBSP2_MASK;
@@ -508,12 +508,12 @@ void dsp_clk_wakeup_event_ctrl(u32 clock_id, bool enable)
mpu_grpsel |= OMAP3430_GRPSEL_MCBSP2_MASK;
iva2_grpsel &= ~OMAP3430_GRPSEL_MCBSP2_MASK;
}
writel(iva2_grpsel, resources->dw_per_pm_base + 0xA8);
writel(mpu_grpsel, resources->dw_per_pm_base + 0xA4);
writel(iva2_grpsel, resources->per_pm_base + 0xA8);
writel(mpu_grpsel, resources->per_pm_base + 0xA4);
break;
case BPWR_MCBSP3:
iva2_grpsel = readl(resources->dw_per_pm_base + 0xA8);
mpu_grpsel = readl(resources->dw_per_pm_base + 0xA4);
iva2_grpsel = readl(resources->per_pm_base + 0xA8);
mpu_grpsel = readl(resources->per_pm_base + 0xA4);
if (enable) {
iva2_grpsel |= OMAP3430_GRPSEL_MCBSP3_MASK;
mpu_grpsel &= ~OMAP3430_GRPSEL_MCBSP3_MASK;
@@ -521,12 +521,12 @@ void dsp_clk_wakeup_event_ctrl(u32 clock_id, bool enable)
mpu_grpsel |= OMAP3430_GRPSEL_MCBSP3_MASK;
iva2_grpsel &= ~OMAP3430_GRPSEL_MCBSP3_MASK;
}
writel(iva2_grpsel, resources->dw_per_pm_base + 0xA8);
writel(mpu_grpsel, resources->dw_per_pm_base + 0xA4);
writel(iva2_grpsel, resources->per_pm_base + 0xA8);
writel(mpu_grpsel, resources->per_pm_base + 0xA4);
break;
case BPWR_MCBSP4:
iva2_grpsel = readl(resources->dw_per_pm_base + 0xA8);
mpu_grpsel = readl(resources->dw_per_pm_base + 0xA4);
iva2_grpsel = readl(resources->per_pm_base + 0xA8);
mpu_grpsel = readl(resources->per_pm_base + 0xA4);
if (enable) {
iva2_grpsel |= OMAP3430_GRPSEL_MCBSP4_MASK;
mpu_grpsel &= ~OMAP3430_GRPSEL_MCBSP4_MASK;
@@ -534,12 +534,12 @@ void dsp_clk_wakeup_event_ctrl(u32 clock_id, bool enable)
mpu_grpsel |= OMAP3430_GRPSEL_MCBSP4_MASK;
iva2_grpsel &= ~OMAP3430_GRPSEL_MCBSP4_MASK;
}
writel(iva2_grpsel, resources->dw_per_pm_base + 0xA8);
writel(mpu_grpsel, resources->dw_per_pm_base + 0xA4);
writel(iva2_grpsel, resources->per_pm_base + 0xA8);
writel(mpu_grpsel, resources->per_pm_base + 0xA4);
break;
case BPWR_MCBSP5:
iva2_grpsel = readl(resources->dw_per_pm_base + 0xA8);
mpu_grpsel = readl(resources->dw_per_pm_base + 0xA4);
iva2_grpsel = readl(resources->per_pm_base + 0xA8);
mpu_grpsel = readl(resources->per_pm_base + 0xA4);
if (enable) {
iva2_grpsel |= OMAP3430_GRPSEL_MCBSP5_MASK;
mpu_grpsel &= ~OMAP3430_GRPSEL_MCBSP5_MASK;
@@ -547,8 +547,8 @@ void dsp_clk_wakeup_event_ctrl(u32 clock_id, bool enable)
mpu_grpsel |= OMAP3430_GRPSEL_MCBSP5_MASK;
iva2_grpsel &= ~OMAP3430_GRPSEL_MCBSP5_MASK;
}
writel(iva2_grpsel, resources->dw_per_pm_base + 0xA8);
writel(mpu_grpsel, resources->dw_per_pm_base + 0xA4);
writel(iva2_grpsel, resources->per_pm_base + 0xA8);
writel(mpu_grpsel, resources->per_pm_base + 0xA4);
break;
}
}

96
drivers/staging/tidspbridge/core/tiomap_io.c
View File

@@ -61,24 +61,24 @@ int read_ext_dsp_data(struct bridge_dev_context *dev_ctxt,
u32 ul_tlb_base_virt = 0;
u32 ul_shm_offset_virt = 0;
u32 dw_ext_prog_virt_mem;
u32 dw_base_addr = dev_context->dw_dsp_ext_base_addr;
u32 dw_base_addr = dev_context->dsp_ext_base_addr;
bool trace_read = false;
if (!ul_shm_base_virt) {
status = dev_get_symbol(dev_context->hdev_obj,
status = dev_get_symbol(dev_context->dev_obj,
SHMBASENAME, &ul_shm_base_virt);
}
DBC_ASSERT(ul_shm_base_virt != 0);
/* Check if it is a read of Trace section */
if (!status && !ul_trace_sec_beg) {
status = dev_get_symbol(dev_context->hdev_obj,
status = dev_get_symbol(dev_context->dev_obj,
DSP_TRACESEC_BEG, &ul_trace_sec_beg);
}
DBC_ASSERT(ul_trace_sec_beg != 0);
if (!status && !ul_trace_sec_end) {
status = dev_get_symbol(dev_context->hdev_obj,
status = dev_get_symbol(dev_context->dev_obj,
DSP_TRACESEC_END, &ul_trace_sec_end);
}
DBC_ASSERT(ul_trace_sec_end != 0);
@@ -92,7 +92,7 @@ int read_ext_dsp_data(struct bridge_dev_context *dev_ctxt,
/* If reading from TRACE, force remap/unmap */
if (trace_read && dw_base_addr) {
dw_base_addr = 0;
dev_context->dw_dsp_ext_base_addr = 0;
dev_context->dsp_ext_base_addr = 0;
}
if (!dw_base_addr) {
@@ -102,19 +102,19 @@ int read_ext_dsp_data(struct bridge_dev_context *dev_ctxt,
/* Get DYNEXT_BEG, EXT_BEG and EXT_END. */
if (!status && !ul_dyn_ext_base) {
status = dev_get_symbol(dev_context->hdev_obj,
status = dev_get_symbol(dev_context->dev_obj,
DYNEXTBASE, &ul_dyn_ext_base);
}
DBC_ASSERT(ul_dyn_ext_base != 0);
if (!status) {
status = dev_get_symbol(dev_context->hdev_obj,
status = dev_get_symbol(dev_context->dev_obj,
EXTBASE, &ul_ext_base);
}
DBC_ASSERT(ul_ext_base != 0);
if (!status) {
status = dev_get_symbol(dev_context->hdev_obj,
status = dev_get_symbol(dev_context->dev_obj,
EXTEND, &ul_ext_end);
}
DBC_ASSERT(ul_ext_end != 0);
@@ -134,10 +134,10 @@ int read_ext_dsp_data(struct bridge_dev_context *dev_ctxt,
if (!status) {
ul_tlb_base_virt =
dev_context->atlb_entry[0].ul_dsp_va * DSPWORDSIZE;
dev_context->atlb_entry[0].dsp_va * DSPWORDSIZE;
DBC_ASSERT(ul_tlb_base_virt <= ul_shm_base_virt);
dw_ext_prog_virt_mem =
dev_context->atlb_entry[0].ul_gpp_va;
dev_context->atlb_entry[0].gpp_va;
if (!trace_read) {
ul_shm_offset_virt =
@@ -148,14 +148,14 @@ int read_ext_dsp_data(struct bridge_dev_context *dev_ctxt,
dw_ext_prog_virt_mem -= ul_shm_offset_virt;
dw_ext_prog_virt_mem +=
(ul_ext_base - ul_dyn_ext_base);
dev_context->dw_dsp_ext_base_addr =
dev_context->dsp_ext_base_addr =
dw_ext_prog_virt_mem;
/*
* This dw_dsp_ext_base_addr will get cleared
* This dsp_ext_base_addr will get cleared
* only when the board is stopped.
*/
if (!dev_context->dw_dsp_ext_base_addr)
if (!dev_context->dsp_ext_base_addr)
status = -EPERM;
}
@@ -184,7 +184,7 @@ int write_dsp_data(struct bridge_dev_context *dev_context,
u32 mem_type)
{
u32 offset;
u32 dw_base_addr = dev_context->dw_dsp_base_addr;
u32 dw_base_addr = dev_context->dsp_base_addr;
struct cfg_hostres *resources = dev_context->resources;
int status = 0;
u32 base1, base2, base3;
@@ -195,18 +195,18 @@ int write_dsp_data(struct bridge_dev_context *dev_context,
if (!resources)
return -EPERM;
offset = dsp_addr - dev_context->dw_dsp_start_add;
offset = dsp_addr - dev_context->dsp_start_add;
if (offset < base1) {
dw_base_addr = MEM_LINEAR_ADDRESS(resources->dw_mem_base[2],
resources->dw_mem_length[2]);
dw_base_addr = MEM_LINEAR_ADDRESS(resources->mem_base[2],
resources->mem_length[2]);
} else if (offset > base1 && offset < base2 + OMAP_DSP_MEM2_SIZE) {
dw_base_addr = MEM_LINEAR_ADDRESS(resources->dw_mem_base[3],
resources->dw_mem_length[3]);
dw_base_addr = MEM_LINEAR_ADDRESS(resources->mem_base[3],
resources->mem_length[3]);
offset = offset - base2;
} else if (offset >= base2 + OMAP_DSP_MEM2_SIZE &&
offset < base3 + OMAP_DSP_MEM3_SIZE) {
dw_base_addr = MEM_LINEAR_ADDRESS(resources->dw_mem_base[4],
resources->dw_mem_length[4]);
dw_base_addr = MEM_LINEAR_ADDRESS(resources->mem_base[4],
resources->mem_length[4]);
offset = offset - base3;
} else {
return -EPERM;
@@ -230,7 +230,7 @@ int write_ext_dsp_data(struct bridge_dev_context *dev_context,
u32 ul_num_bytes, u32 mem_type,
bool dynamic_load)
{
u32 dw_base_addr = dev_context->dw_dsp_ext_base_addr;
u32 dw_base_addr = dev_context->dsp_ext_base_addr;
u32 dw_offset = 0;
u8 temp_byte1, temp_byte2;
u8 remain_byte[4];
@@ -246,10 +246,10 @@ int write_ext_dsp_data(struct bridge_dev_context *dev_context,
if (symbols_reloaded) {
/* Check if it is a load to Trace section */
ret = dev_get_symbol(dev_context->hdev_obj,
ret = dev_get_symbol(dev_context->dev_obj,
DSP_TRACESEC_BEG, &ul_trace_sec_beg);
if (!ret)
ret = dev_get_symbol(dev_context->hdev_obj,
ret = dev_get_symbol(dev_context->dev_obj,
DSP_TRACESEC_END,
&ul_trace_sec_end);
}
@@ -263,13 +263,13 @@ int write_ext_dsp_data(struct bridge_dev_context *dev_context,
if ((dynamic_load || trace_load) && dw_base_addr) {
dw_base_addr = 0;
MEM_UNMAP_LINEAR_ADDRESS((void *)
dev_context->dw_dsp_ext_base_addr);
dev_context->dw_dsp_ext_base_addr = 0x0;
dev_context->dsp_ext_base_addr);
dev_context->dsp_ext_base_addr = 0x0;
}
if (!dw_base_addr) {
if (symbols_reloaded)
/* Get SHM_BEG EXT_BEG and EXT_END. */
ret = dev_get_symbol(dev_context->hdev_obj,
ret = dev_get_symbol(dev_context->dev_obj,
SHMBASENAME, &ul_shm_base_virt);
DBC_ASSERT(ul_shm_base_virt != 0);
if (dynamic_load) {
@@ -277,7 +277,7 @@ int write_ext_dsp_data(struct bridge_dev_context *dev_context,
if (symbols_reloaded)
ret =
dev_get_symbol
(dev_context->hdev_obj, DYNEXTBASE,
(dev_context->dev_obj, DYNEXTBASE,
&ul_ext_base);
}
DBC_ASSERT(ul_ext_base != 0);
@@ -289,7 +289,7 @@ int write_ext_dsp_data(struct bridge_dev_context *dev_context,
if (symbols_reloaded)
ret =
dev_get_symbol
(dev_context->hdev_obj, EXTEND,
(dev_context->dev_obj, EXTEND,
&ul_ext_end);
}
} else {
@@ -297,13 +297,13 @@ int write_ext_dsp_data(struct bridge_dev_context *dev_context,
if (!ret)
ret =
dev_get_symbol
(dev_context->hdev_obj, EXTBASE,
(dev_context->dev_obj, EXTBASE,
&ul_ext_base);
DBC_ASSERT(ul_ext_base != 0);
if (!ret)
ret =
dev_get_symbol
(dev_context->hdev_obj, EXTEND,
(dev_context->dev_obj, EXTEND,
&ul_ext_end);
}
}
@@ -319,17 +319,17 @@ int write_ext_dsp_data(struct bridge_dev_context *dev_context,
if (!ret) {
ul_tlb_base_virt =
dev_context->atlb_entry[0].ul_dsp_va * DSPWORDSIZE;
dev_context->atlb_entry[0].dsp_va * DSPWORDSIZE;
DBC_ASSERT(ul_tlb_base_virt <= ul_shm_base_virt);
if (symbols_reloaded) {
ret = dev_get_symbol
(dev_context->hdev_obj,
(dev_context->dev_obj,
DSP_TRACESEC_END, &shm0_end);
if (!ret) {
ret =
dev_get_symbol
(dev_context->hdev_obj, DYNEXTBASE,
(dev_context->dev_obj, DYNEXTBASE,
&ul_dyn_ext_base);
}
}
@@ -337,21 +337,21 @@ int write_ext_dsp_data(struct bridge_dev_context *dev_context,
ul_shm_base_virt - ul_tlb_base_virt;
if (trace_load) {
dw_ext_prog_virt_mem =
dev_context->atlb_entry[0].ul_gpp_va;
dev_context->atlb_entry[0].gpp_va;
} else {
dw_ext_prog_virt_mem = host_res->dw_mem_base[1];
dw_ext_prog_virt_mem = host_res->mem_base[1];
dw_ext_prog_virt_mem +=
(ul_ext_base - ul_dyn_ext_base);
}
dev_context->dw_dsp_ext_base_addr =
dev_context->dsp_ext_base_addr =
(u32) MEM_LINEAR_ADDRESS((void *)
dw_ext_prog_virt_mem,
ul_ext_end - ul_ext_base);
dw_base_addr += dev_context->dw_dsp_ext_base_addr;
/* This dw_dsp_ext_base_addr will get cleared only when
dw_base_addr += dev_context->dsp_ext_base_addr;
/* This dsp_ext_base_addr will get cleared only when
* the board is stopped. */
if (!dev_context->dw_dsp_ext_base_addr)
if (!dev_context->dsp_ext_base_addr)
ret = -EPERM;
}
}
@@ -375,10 +375,10 @@ int write_ext_dsp_data(struct bridge_dev_context *dev_context,
*((u32 *) host_buff) = dw_base_addr + dw_offset;
}
/* Unmap here to force remap for other Ext loads */
if ((dynamic_load || trace_load) && dev_context->dw_dsp_ext_base_addr) {
if ((dynamic_load || trace_load) && dev_context->dsp_ext_base_addr) {
MEM_UNMAP_LINEAR_ADDRESS((void *)
dev_context->dw_dsp_ext_base_addr);
dev_context->dw_dsp_ext_base_addr = 0x0;
dev_context->dsp_ext_base_addr);
dev_context->dsp_ext_base_addr = 0x0;
}
symbols_reloaded = false;
return ret;
@@ -401,8 +401,8 @@ int sm_interrupt_dsp(struct bridge_dev_context *dev_context, u16 mb_val)
if (!resources)
return -EPERM;
if (dev_context->dw_brd_state == BRD_DSP_HIBERNATION ||
dev_context->dw_brd_state == BRD_HIBERNATION) {
if (dev_context->brd_state == BRD_DSP_HIBERNATION ||
dev_context->brd_state == BRD_HIBERNATION) {
#ifdef CONFIG_TIDSPBRIDGE_DVFS
if (pdata->dsp_get_opp)
opplevel = (*pdata->dsp_get_opp) ();
@@ -437,10 +437,10 @@ int sm_interrupt_dsp(struct bridge_dev_context *dev_context, u16 mb_val)
omap_mbox_restore_ctx(dev_context->mbox);
/* Access MMU SYS CONFIG register to generate a short wakeup */
temp = readl(resources->dw_dmmu_base + 0x10);
temp = readl(resources->dmmu_base + 0x10);
dev_context->dw_brd_state = BRD_RUNNING;
} else if (dev_context->dw_brd_state == BRD_RETENTION) {
dev_context->brd_state = BRD_RUNNING;
} else if (dev_context->brd_state == BRD_RETENTION) {
/* Restart the peripheral clocks */
dsp_clock_enable_all(dev_context->dsp_per_clks);
}

28
drivers/staging/tidspbridge/core/ue_deh.c
View File

@@ -52,16 +52,16 @@ static irqreturn_t mmu_fault_isr(int irq, void *data)
if (!deh)
return IRQ_HANDLED;
resources = deh->hbridge_context->resources;
resources = deh->bridge_context->resources;
if (!resources) {
dev_dbg(bridge, "%s: Failed to get Host Resources\n",
__func__);
return IRQ_HANDLED;
}
hw_mmu_event_status(resources->dw_dmmu_base, &event);
hw_mmu_event_status(resources->dmmu_base, &event);
if (event == HW_MMU_TRANSLATION_FAULT) {
hw_mmu_fault_addr_read(resources->dw_dmmu_base, &fault_addr);
hw_mmu_fault_addr_read(resources->dmmu_base, &fault_addr);
dev_dbg(bridge, "%s: event=0x%x, fault_addr=0x%x\n", __func__,
event, fault_addr);
/*
@@ -73,10 +73,10 @@ static irqreturn_t mmu_fault_isr(int irq, void *data)
/* Disable the MMU events, else once we clear it will
* start to raise INTs again */
hw_mmu_event_disable(resources->dw_dmmu_base,
hw_mmu_event_disable(resources->dmmu_base,
HW_MMU_TRANSLATION_FAULT);
} else {
hw_mmu_event_disable(resources->dw_dmmu_base,
hw_mmu_event_disable(resources->dmmu_base,
HW_MMU_ALL_INTERRUPTS);
}
return IRQ_HANDLED;
@@ -113,7 +113,7 @@ int bridge_deh_create(struct deh_mgr **ret_deh,
tasklet_init(&deh->dpc_tasklet, mmu_fault_dpc, (u32) deh);
/* Fill in context structure */
deh->hbridge_context = hbridge_context;
deh->bridge_context = hbridge_context;
/* Install ISR function for DSP MMU fault */
status = request_irq(INT_DSP_MMU_IRQ, mmu_fault_isr, 0,
@@ -185,10 +185,10 @@ static void mmu_fault_print_stack(struct bridge_dev_context *dev_context)
* access entry #0. Then add a new entry so that the DSP OS
* can continue in order to dump the stack.
*/
hw_mmu_twl_disable(resources->dw_dmmu_base);
hw_mmu_tlb_flush_all(resources->dw_dmmu_base);
hw_mmu_twl_disable(resources->dmmu_base);
hw_mmu_tlb_flush_all(resources->dmmu_base);
hw_mmu_tlb_add(resources->dw_dmmu_base,
hw_mmu_tlb_add(resources->dmmu_base,
virt_to_phys(dummy_va_addr), fault_addr,
HW_PAGE_SIZE4KB, 1,
&map_attrs, HW_SET, HW_SET);
@@ -198,12 +198,12 @@ static void mmu_fault_print_stack(struct bridge_dev_context *dev_context)
dsp_gpt_wait_overflow(DSP_CLK_GPT8, 0xfffffffe);
/* Clear MMU interrupt */
hw_mmu_event_ack(resources->dw_dmmu_base,
hw_mmu_event_ack(resources->dmmu_base,
HW_MMU_TRANSLATION_FAULT);
dump_dsp_stack(dev_context);
dsp_clk_disable(DSP_CLK_GPT8);
hw_mmu_disable(resources->dw_dmmu_base);
hw_mmu_disable(resources->dmmu_base);
free_page((unsigned long)dummy_va_addr);
}
#endif
@@ -228,7 +228,7 @@ void bridge_deh_notify(struct deh_mgr *deh, int event, int info)
return;
dev_dbg(bridge, "%s: device exception", __func__);
dev_context = deh->hbridge_context;
dev_context = deh->bridge_context;
switch (event) {
case DSP_SYSERROR:
@@ -254,7 +254,7 @@ void bridge_deh_notify(struct deh_mgr *deh, int event, int info)
}
/* Filter subsequent notifications when an error occurs */
if (dev_context->dw_brd_state != BRD_ERROR) {
if (dev_context->brd_state != BRD_ERROR) {
ntfy_notify(deh->ntfy_obj, event);
#ifdef CONFIG_TIDSPBRIDGE_RECOVERY
bridge_recover_schedule();
@@ -262,7 +262,7 @@ void bridge_deh_notify(struct deh_mgr *deh, int event, int info)
}
/* Set the Board state as ERROR */
dev_context->dw_brd_state = BRD_ERROR;
dev_context->brd_state = BRD_ERROR;
/* Disable all the clocks that were enabled by DSP */
dsp_clock_disable_all(dev_context->dsp_per_clks);
/*

102
drivers/staging/tidspbridge/dynload/cload.c
View File

@@ -498,8 +498,8 @@ static void allocate_sections(struct dload_state *dlthis)
return;
}
/* initialize the handle header */
hndl->dm.hnext = hndl->dm.hprev = hndl; /* circular list */
hndl->dm.hroot = NULL;
hndl->dm.next = hndl->dm.prev = hndl; /* circular list */
hndl->dm.root = NULL;
hndl->dm.dbthis = 0;
dlthis->myhandle = hndl; /* save away for return */
/* pointer to the section list of allocated sections */
@@ -1131,9 +1131,6 @@ static void dload_data(struct dload_state *dlthis)
u16 curr_sect;
struct doff_scnhdr_t *sptr = dlthis->sect_hdrs;
struct ldr_section_info *lptr = dlthis->ldr_sections;
#ifdef OPT_ZERO_COPY_LOADER
bool zero_copy = false;
#endif
u8 *dest;
struct {
@@ -1192,17 +1189,6 @@ static void dload_data(struct dload_state *dlthis)
return;
}
dest = ibuf.bufr;
#ifdef OPT_ZERO_COPY_LOADER
zero_copy = false;
if (!dload_check_type(sptr, DLOAD_CINIT) {
dlthis->myio->writemem(dlthis->myio,
&dest,
lptr->load_addr +
image_offset,
lptr, 0);
zero_copy = (dest != ibuf.bufr);
}
#endif
/* End of determination */
if (dlthis->strm->read_buffer(dlthis->strm,
@@ -1266,33 +1252,27 @@ static void dload_data(struct dload_state *dlthis)
&ibuf.ipacket);
cinit_processed = true;
} else {
#ifdef OPT_ZERO_COPY_LOADER
if (!zero_copy) {
#endif
/* FIXME */
if (!dlthis->myio->
writemem(dlthis->
myio,
ibuf.bufr,
lptr->
load_addr +
image_offset,
lptr,
BYTE_TO_HOST
(ibuf.
ipacket.
packet_size))) {
DL_ERROR
("Write to "
FMT_UI32
" failed",
lptr->
load_addr +
image_offset);
}
#ifdef OPT_ZERO_COPY_LOADER
/* FIXME */
if (!dlthis->myio->
writemem(dlthis->
myio,
ibuf.bufr,
lptr->
load_addr +
image_offset,
lptr,
BYTE_TO_HOST
(ibuf.
ipacket.
packet_size))) {
DL_ERROR
("Write to "
FMT_UI32
" failed",
lptr->
load_addr +
image_offset);
}
#endif
}
}
image_offset +=
@@ -1646,7 +1626,7 @@ static void init_module_handle(struct dload_state *dlthis)
DL_ERROR(err_alloc, sizeof(struct dbg_mirror_root));
return;
}
mlst->hnext = NULL;
mlst->next = NULL;
mlst->changes = 0;
mlst->refcount = 0;
mlst->dbthis = TDATA_TO_TADDR(dlmodsym->value);
@@ -1671,7 +1651,7 @@ static void init_module_handle(struct dload_state *dlthis)
#else
mlist = (struct dbg_mirror_root *)&debug_list_header;
#endif
hndl->dm.hroot = mlist; /* set pointer to root into our handle */
hndl->dm.root = mlist; /* set pointer to root into our handle */
if (!dlthis->allocated_secn_count)
return; /* no load addresses to be recorded */
/* reuse temporary symbol storage */
@@ -1722,9 +1702,9 @@ static void init_module_handle(struct dload_state *dlthis)
dllview_info.context = 0;
hndl->dm.context = 0;
/* fill in next pointer and size */
if (mlist->hnext) {
dbmod->next_module = TADDR_TO_TDATA(mlist->hnext->dm.dbthis);
dbmod->next_module_size = mlist->hnext->dm.dbsiz;
if (mlist->next) {
dbmod->next_module = TADDR_TO_TDATA(mlist->next->dm.dbthis);
dbmod->next_module_size = mlist->next->dm.dbsiz;
} else {
dbmod->next_module_size = 0;
dbmod->next_module = 0;
@@ -1770,11 +1750,11 @@ static void init_module_handle(struct dload_state *dlthis)
}
/* Add the module handle to this processor's list
of handles with debug info */
hndl->dm.hnext = mlist->hnext;
if (hndl->dm.hnext)
hndl->dm.hnext->dm.hprev = hndl;
hndl->dm.hprev = (struct my_handle *)mlist;
mlist->hnext = hndl; /* insert after root */
hndl->dm.next = mlist->next;
if (hndl->dm.next)
hndl->dm.next->dm.prev = hndl;
hndl->dm.prev = (struct my_handle *)mlist;
mlist->next = hndl; /* insert after root */
} /* init_module_handle */
/*************************************************************************
@@ -1830,7 +1810,7 @@ int dynamic_unload_module(void *mhandle,
asecs->name = NULL;
alloc->dload_deallocate(alloc, asecs++);
}
root = hndl->dm.hroot;
root = hndl->dm.root;
if (!root) {
/* there is a debug list containing this module */
goto func_end;
@@ -1840,20 +1820,20 @@ int dynamic_unload_module(void *mhandle,
}
/* Retrieve memory context in which .dllview was allocated */
dllview_info.context = hndl->dm.context;
if (hndl->dm.hprev == hndl)
if (hndl->dm.prev == hndl)
goto exitunltgt;
/* target-side dllview record is in list */
/* dequeue this record from our GPP-side mirror list */
hndl->dm.hprev->dm.hnext = hndl->dm.hnext;
if (hndl->dm.hnext)
hndl->dm.hnext->dm.hprev = hndl->dm.hprev;
hndl->dm.prev->dm.next = hndl->dm.next;
if (hndl->dm.next)
hndl->dm.next->dm.prev = hndl->dm.prev;
/* Update next_module of previous entry in target list
* We are using mhdr here as a surrogate for either a
struct modules_header or a dll_module */
if (hndl->dm.hnext) {
mhdr.first_module = TADDR_TO_TDATA(hndl->dm.hnext->dm.dbthis);
mhdr.first_module_size = hndl->dm.hnext->dm.dbsiz;
if (hndl->dm.next) {
mhdr.first_module = TADDR_TO_TDATA(hndl->dm.next->dm.dbthis);
mhdr.first_module_size = hndl->dm.next->dm.dbsiz;
} else {
mhdr.first_module = 0;
mhdr.first_module_size = 0;
@@ -1871,7 +1851,7 @@ int dynamic_unload_module(void *mhandle,
swap_words(&mhdr, sizeof(struct modules_header) - sizeof(u16),
MODULES_HEADER_BITMAP);
}
if (!init->writemem(init, &mhdr, hndl->dm.hprev->dm.dbthis,
if (!init->writemem(init, &mhdr, hndl->dm.prev->dm.dbthis,
&dllview_info, sizeof(struct modules_header) -
sizeof(mhdr.update_flag))) {
dload_syms_error(syms, dlvwrite);

6
drivers/staging/tidspbridge/dynload/dload_internal.h
View File

@@ -78,15 +78,15 @@ struct my_handle;
struct dbg_mirror_root {
/* must be same as dbg_mirror_list; __DLModules address on target */
u32 dbthis;
struct my_handle *hnext; /* must be same as dbg_mirror_list */
struct my_handle *next; /* must be same as dbg_mirror_list */
u16 changes; /* change counter */
u16 refcount; /* number of modules referencing this root */
};
struct dbg_mirror_list {
u32 dbthis;
struct my_handle *hnext, *hprev;
struct dbg_mirror_root *hroot;
struct my_handle *next, *prev;
struct dbg_mirror_root *root;
u16 dbsiz;
u32 context; /* Save context for .dllview memory allocation */
};

166
drivers/staging/tidspbridge/gen/gb.c
View File

@@ -1,166 +0,0 @@
/*
* gb.c
*
* DSP-BIOS Bridge driver support functions for TI OMAP processors.
*
* Generic bitmap operations.
*
* Copyright (C) 2005-2006 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
/* ----------------------------------- DSP/BIOS Bridge */
#include <linux/types.h>
/* ----------------------------------- This */
#include <dspbridge/gs.h>
#include <dspbridge/gb.h>
struct gb_t_map {
u32 len;
u32 wcnt;
u32 *words;
};
/*
* ======== gb_clear ========
* purpose:
* Clears a bit in the bit map.
*/
void gb_clear(struct gb_t_map *map, u32 bitn)
{
u32 mask;
mask = 1L << (bitn % BITS_PER_LONG);
map->words[bitn / BITS_PER_LONG] &= ~mask;
}
/*
* ======== gb_create ========
* purpose:
* Creates a bit map.
*/
struct gb_t_map *gb_create(u32 len)
{
struct gb_t_map *map;
u32 i;
map = (struct gb_t_map *)gs_alloc(sizeof(struct gb_t_map));
if (map != NULL) {
map->len = len;
map->wcnt = len / BITS_PER_LONG + 1;
map->words = (u32 *) gs_alloc(map->wcnt * sizeof(u32));
if (map->words != NULL) {
for (i = 0; i < map->wcnt; i++)
map->words[i] = 0L;
} else {
gs_frees(map, sizeof(struct gb_t_map));
map = NULL;
}
}
return map;
}
/*
* ======== gb_delete ========
* purpose:
* Frees a bit map.
*/
void gb_delete(struct gb_t_map *map)
{
gs_frees(map->words, map->wcnt * sizeof(u32));
gs_frees(map, sizeof(struct gb_t_map));
}
/*
* ======== gb_findandset ========
* purpose:
* Finds a free bit and sets it.
*/
u32 gb_findandset(struct gb_t_map *map)
{
u32 bitn;
bitn = gb_minclear(map);
if (bitn != GB_NOBITS)
gb_set(map, bitn);
return bitn;
}
/*
* ======== gb_minclear ========
* purpose:
* returns the location of the first unset bit in the bit map.
*/
u32 gb_minclear(struct gb_t_map *map)
{
u32 bit_location = 0;
u32 bit_acc = 0;
u32 i;
u32 bit;
u32 *word;
for (word = map->words, i = 0; i < map->wcnt; word++, i++) {
if (~*word) {
for (bit = 0; bit < BITS_PER_LONG; bit++, bit_acc++) {
if (bit_acc == map->len)
return GB_NOBITS;
if (~*word & (1L << bit)) {
bit_location = i * BITS_PER_LONG + bit;
return bit_location;
}
}
} else {
bit_acc += BITS_PER_LONG;
}
}
return GB_NOBITS;
}
/*
* ======== gb_set ========
* purpose:
* Sets a bit in the bit map.
*/
void gb_set(struct gb_t_map *map, u32 bitn)
{
u32 mask;
mask = 1L << (bitn % BITS_PER_LONG);
map->words[bitn / BITS_PER_LONG] |= mask;
}
/*
* ======== gb_test ========
* purpose:
* Returns true if the bit is set in the specified location.
*/
bool gb_test(struct gb_t_map *map, u32 bitn)
{
bool state;
u32 mask;
u32 word;
mask = 1L << (bitn % BITS_PER_LONG);
word = map->words[bitn / BITS_PER_LONG];
state = word & mask ? true : false;
return state;
}

38
drivers/staging/tidspbridge/gen/gh.c
View File

@@ -17,9 +17,6 @@
#include <linux/types.h>
#include <dspbridge/host_os.h>
#include <dspbridge/gs.h>
#include <dspbridge/gh.h>
struct element {
@@ -37,8 +34,6 @@ struct gh_t_hash_tab {
};
static void noop(void *p);
static s32 cur_init;
static void myfree(void *ptr, s32 size);
/*
* ======== gh_create ========
@@ -51,8 +46,7 @@ struct gh_t_hash_tab *gh_create(u16 max_bucket, u16 val_size,
{
struct gh_t_hash_tab *hash_tab;
u16 i;
hash_tab =
(struct gh_t_hash_tab *)gs_alloc(sizeof(struct gh_t_hash_tab));
hash_tab = kzalloc(sizeof(struct gh_t_hash_tab), GFP_KERNEL);
if (hash_tab == NULL)
return NULL;
hash_tab->max_bucket = max_bucket;
@@ -62,7 +56,7 @@ struct gh_t_hash_tab *gh_create(u16 max_bucket, u16 val_size,
hash_tab->delete = delete == NULL ? noop : delete;
hash_tab->buckets = (struct element **)
gs_alloc(sizeof(struct element *) * max_bucket);
kzalloc(sizeof(struct element *) * max_bucket, GFP_KERNEL);
if (hash_tab->buckets == NULL) {
gh_delete(hash_tab);
return NULL;
@@ -89,17 +83,14 @@ void gh_delete(struct gh_t_hash_tab *hash_tab)
elem = next) {
next = elem->next;
(*hash_tab->delete) (elem->data);
myfree(elem,
sizeof(struct element) - 1 +
hash_tab->val_size);
kfree(elem);
}
}
myfree(hash_tab->buckets, sizeof(struct element *)
* hash_tab->max_bucket);
kfree(hash_tab->buckets);
}
myfree(hash_tab, sizeof(struct gh_t_hash_tab));
kfree(hash_tab);
}
}
@@ -109,9 +100,7 @@ void gh_delete(struct gh_t_hash_tab *hash_tab)
void gh_exit(void)
{
if (cur_init-- == 1)
gs_exit();
/* Do nothing */
}
/*
@@ -138,8 +127,7 @@ void *gh_find(struct gh_t_hash_tab *hash_tab, void *key)
void gh_init(void)
{
if (cur_init++ == 0)
gs_init();
/* Do nothing */
}
/*
@@ -152,8 +140,8 @@ void *gh_insert(struct gh_t_hash_tab *hash_tab, void *key, void *value)
u16 i;
char *src, *dst;
elem = (struct element *)gs_alloc(sizeof(struct element) - 1 +
hash_tab->val_size);
elem = kzalloc(sizeof(struct element) - 1 + hash_tab->val_size,
GFP_KERNEL);
if (elem != NULL) {
dst = (char *)elem->data;
@@ -180,14 +168,6 @@ static void noop(void *p)
p = p; /* stifle compiler warning */
}
/*
* ======== myfree ========
*/
static void myfree(void *ptr, s32 size)
{
gs_free(ptr);
}
#ifdef CONFIG_TIDSPBRIDGE_BACKTRACE
/**
* gh_iterate() - This function goes through all the elements in the hash table

88
drivers/staging/tidspbridge/gen/gs.c
View File

@@ -1,88 +0,0 @@
/*
* gs.c
*
* DSP-BIOS Bridge driver support functions for TI OMAP processors.
*
* General storage memory allocator services.
*
* Copyright (C) 2005-2006 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#include <linux/types.h>
/* ----------------------------------- DSP/BIOS Bridge */
#include <dspbridge/dbdefs.h>
/* ----------------------------------- This */
#include <dspbridge/gs.h>
#include <linux/slab.h>
/* ----------------------------------- Globals */
static u32 cumsize;
/*
* ======== gs_alloc ========
* purpose:
* Allocates memory of the specified size.
*/
void *gs_alloc(u32 size)
{
void *p;
p = kzalloc(size, GFP_KERNEL);
if (p == NULL)
return NULL;
cumsize += size;
return p;
}
/*
* ======== gs_exit ========
* purpose:
* Discontinue the usage of the GS module.
*/
void gs_exit(void)
{
/* Do nothing */
}
/*
* ======== gs_free ========
* purpose:
* Frees the memory.
*/
void gs_free(void *ptr)
{
kfree(ptr);
/* ack! no size info */
/* cumsize -= size; */
}
/*
* ======== gs_frees ========
* purpose:
* Frees the memory.
*/
void gs_frees(void *ptr, u32 size)
{
kfree(ptr);
cumsize -= size;
}
/*
* ======== gs_init ========
* purpose:
* Initializes the GS module.
*/
void gs_init(void)
{
/* Do nothing */
}

22
drivers/staging/tidspbridge/gen/uuidutil.c
View File

@@ -45,11 +45,11 @@ void uuid_uuid_to_string(struct dsp_uuid *uuid_obj, char *sz_uuid,
i = snprintf(sz_uuid, size,
"%.8X_%.4X_%.4X_%.2X%.2X_%.2X%.2X%.2X%.2X%.2X%.2X",
uuid_obj->ul_data1, uuid_obj->us_data2, uuid_obj->us_data3,
uuid_obj->uc_data4, uuid_obj->uc_data5,
uuid_obj->uc_data6[0], uuid_obj->uc_data6[1],
uuid_obj->uc_data6[2], uuid_obj->uc_data6[3],
uuid_obj->uc_data6[4], uuid_obj->uc_data6[5]);
uuid_obj->data1, uuid_obj->data2, uuid_obj->data3,
uuid_obj->data4, uuid_obj->data5,
uuid_obj->data6[0], uuid_obj->data6[1],
uuid_obj->data6[2], uuid_obj->data6[3],
uuid_obj->data6[4], uuid_obj->data6[5]);
DBC_ENSURE(i != -1);
}
@@ -79,35 +79,35 @@ void uuid_uuid_from_string(char *sz_uuid, struct dsp_uuid *uuid_obj)
{
s32 j;
uuid_obj->ul_data1 = uuid_hex_to_bin(sz_uuid, 8);
uuid_obj->data1 = uuid_hex_to_bin(sz_uuid, 8);
sz_uuid += 8;
/* Step over underscore */
sz_uuid++;
uuid_obj->us_data2 = (u16) uuid_hex_to_bin(sz_uuid, 4);
uuid_obj->data2 = (u16) uuid_hex_to_bin(sz_uuid, 4);
sz_uuid += 4;
/* Step over underscore */
sz_uuid++;
uuid_obj->us_data3 = (u16) uuid_hex_to_bin(sz_uuid, 4);
uuid_obj->data3 = (u16) uuid_hex_to_bin(sz_uuid, 4);
sz_uuid += 4;
/* Step over underscore */
sz_uuid++;
uuid_obj->uc_data4 = (u8) uuid_hex_to_bin(sz_uuid, 2);
uuid_obj->data4 = (u8) uuid_hex_to_bin(sz_uuid, 2);
sz_uuid += 2;
uuid_obj->uc_data5 = (u8) uuid_hex_to_bin(sz_uuid, 2);
uuid_obj->data5 = (u8) uuid_hex_to_bin(sz_uuid, 2);
sz_uuid += 2;
/* Step over underscore */
sz_uuid++;
for (j = 0; j < 6; j++) {
uuid_obj->uc_data6[j] = (u8) uuid_hex_to_bin(sz_uuid, 2);
uuid_obj->data6[j] = (u8) uuid_hex_to_bin(sz_uuid, 2);
sz_uuid += 2;
}
}

26
drivers/staging/tidspbridge/include/dspbridge/_chnl_sm.h
View File

@@ -26,7 +26,7 @@
#include <dspbridge/dspapi.h>
#include <dspbridge/dspdefs.h>
#include <dspbridge/list.h>
#include <linux/list.h>
#include <dspbridge/ntfy.h>
/*
@@ -114,20 +114,20 @@ struct shm {
struct chnl_mgr {
/* Function interface to Bridge driver */
struct bridge_drv_interface *intf_fxns;
struct io_mgr *hio_mgr; /* IO manager */
struct io_mgr *iomgr; /* IO manager */
/* Device this board represents */
struct dev_object *hdev_obj;
struct dev_object *dev_obj;
/* These fields initialized in bridge_chnl_create(): */
u32 dw_output_mask; /* Host output channels w/ full buffers */
u32 dw_last_output; /* Last output channel fired from DPC */
u32 output_mask; /* Host output channels w/ full buffers */
u32 last_output; /* Last output channel fired from DPC */
/* Critical section object handle */
spinlock_t chnl_mgr_lock;
u32 word_size; /* Size in bytes of DSP word */
u8 max_channels; /* Total number of channels */
u8 open_channels; /* Total number of open channels */
struct chnl_object **ap_channel; /* Array of channels */
u8 dw_type; /* Type of channel class library */
struct chnl_object **channels; /* Array of channels */
u8 type; /* Type of channel class library */
/* If no shm syms, return for CHNL_Open */
int chnl_open_status;
};
@@ -140,21 +140,21 @@ struct chnl_object {
/* Pointer back to channel manager */
struct chnl_mgr *chnl_mgr_obj;
u32 chnl_id; /* Channel id */
u8 dw_state; /* Current channel state */
u8 state; /* Current channel state */
s8 chnl_mode; /* Chnl mode and attributes */
/* Chnl I/O completion event (user mode) */
void *user_event;
/* Abstract syncronization object */
struct sync_object *sync_event;
u32 process; /* Process which created this channel */
u32 pcb_arg; /* Argument to use with callback */
struct lst_list *pio_requests; /* List of IOR's to driver */
u32 cb_arg; /* Argument to use with callback */
struct list_head io_requests; /* List of IOR's to driver */
s32 cio_cs; /* Number of IOC's in queue */
s32 cio_reqs; /* Number of IORequests in queue */
s32 chnl_packets; /* Initial number of free Irps */
/* List of IOC's from driver */
struct lst_list *pio_completions;
struct lst_list *free_packets_list; /* List of free Irps */
struct list_head io_completions;
struct list_head free_packets_list; /* List of free Irps */
struct ntfy_object *ntfy_obj;
u32 bytes_moved; /* Total number of bytes transfered */
@@ -171,7 +171,7 @@ struct chnl_irp {
u8 *host_user_buf;
/* Buffer to be filled/emptied. (System) */
u8 *host_sys_buf;
u32 dw_arg; /* Issue/Reclaim argument. */
u32 arg; /* Issue/Reclaim argument. */
u32 dsp_tx_addr; /* Transfer address on DSP side. */
u32 byte_size; /* Bytes transferred. */
u32 buf_size; /* Actual buffer size when allocated. */

2
drivers/staging/tidspbridge/include/dspbridge/brddefs.h
View File

@@ -24,9 +24,7 @@
#define BRD_IDLE 0x1 /* Monitor Loaded, but suspended. */
#define BRD_RUNNING 0x2 /* Monitor loaded, and executing. */
#define BRD_UNKNOWN 0x3 /* Board state is indeterminate. */
#define BRD_SYNCINIT 0x4
#define BRD_LOADED 0x5
#define BRD_LASTSTATE BRD_LOADED /* Set to highest legal board state. */
#define BRD_SLEEP_TRANSITION 0x6 /* Sleep transition in progress */
#define BRD_HIBERNATION 0x7 /* MPU initiated hibernation */
#define BRD_RETENTION 0x8 /* Retention mode */

50
drivers/staging/tidspbridge/include/dspbridge/cfgdefs.h
View File

@@ -19,25 +19,12 @@
#ifndef CFGDEFS_
#define CFGDEFS_
/* Maximum length of module search path. */
#define CFG_MAXSEARCHPATHLEN 255
/* Maximum length of general paths. */
#define CFG_MAXPATH 255
/* Host Resources: */
#define CFG_MAXMEMREGISTERS 9
#define CFG_MAXIOPORTS 20
#define CFG_MAXIRQS 7
#define CFG_MAXDMACHANNELS 7
/* IRQ flag */
#define CFG_IRQSHARED 0x01 /* IRQ can be shared */
/* DSP Resources: */
#define CFG_DSPMAXMEMTYPES 10
#define CFG_DEFAULT_NUM_WINDOWS 1 /* We support only one window. */
/* A platform-related device handle: */
struct cfg_devnode;
@@ -47,35 +34,28 @@ struct cfg_devnode;
struct cfg_hostres {
u32 num_mem_windows; /* Set to default */
/* This is the base.memory */
u32 dw_mem_base[CFG_MAXMEMREGISTERS]; /* shm virtual address */
u32 dw_mem_length[CFG_MAXMEMREGISTERS]; /* Length of the Base */
u32 dw_mem_phys[CFG_MAXMEMREGISTERS]; /* shm Physical address */
u32 mem_base[CFG_MAXMEMREGISTERS]; /* shm virtual address */
u32 mem_length[CFG_MAXMEMREGISTERS]; /* Length of the Base */
u32 mem_phys[CFG_MAXMEMREGISTERS]; /* shm Physical address */
u8 birq_registers; /* IRQ Number */
u8 birq_attrib; /* IRQ Attribute */
u32 dw_offset_for_monitor; /* The Shared memory starts from
* dw_mem_base + this offset */
u32 offset_for_monitor; /* The Shared memory starts from
* mem_base + this offset */
/*
* Info needed by NODE for allocating channels to communicate with RMS:
* dw_chnl_offset: Offset of RMS channels. Lower channels are
* chnl_offset: Offset of RMS channels. Lower channels are
* reserved.
* dw_chnl_buf_size: Size of channel buffer to send to RMS
* dw_num_chnls: Total number of channels
* chnl_buf_size: Size of channel buffer to send to RMS
* num_chnls: Total number of channels
* (including reserved).
*/
u32 dw_chnl_offset;
u32 dw_chnl_buf_size;
u32 dw_num_chnls;
void __iomem *dw_per_base;
u32 dw_per_pm_base;
u32 dw_core_pm_base;
void __iomem *dw_dmmu_base;
void __iomem *dw_sys_ctrl_base;
};
struct cfg_dspmemdesc {
u32 mem_type; /* Type of memory. */
u32 ul_min; /* Minimum amount of memory of this type. */
u32 ul_max; /* Maximum amount of memory of this type. */
u32 chnl_offset;
u32 chnl_buf_size;
u32 num_chnls;
void __iomem *per_base;
u32 per_pm_base;
u32 core_pm_base;
void __iomem *dmmu_base;
};
#endif /* CFGDEFS_ */

21
drivers/staging/tidspbridge/include/dspbridge/chnl.h
View File

@@ -24,27 +24,6 @@
#include <dspbridge/chnlpriv.h>
/*
* ======== chnl_close ========
* Purpose:
* Ensures all pending I/O on this channel is cancelled, discards all
* queued I/O completion notifications, then frees the resources allocated
* for this channel, and makes the corresponding logical channel id
* available for subsequent use.
* Parameters:
* chnl_obj: Channel object handle.
* Returns:
* 0: Success;
* -EFAULT: Invalid chnl_obj.
* Requires:
* chnl_init(void) called.
* No thread must be blocked on this channel's I/O completion event.
* Ensures:
* 0: The I/O completion event for this channel is freed.
* chnl_obj is no longer valid.
*/
extern int chnl_close(struct chnl_object *chnl_obj);
/*
* ======== chnl_create ========
* Purpose:

9
drivers/staging/tidspbridge/include/dspbridge/chnldefs.h
View File

@@ -22,9 +22,6 @@
/* Channel id option. */
#define CHNL_PICKFREE (~0UL) /* Let manager pick a free channel. */
/* Channel manager limits: */
#define CHNL_INITIOREQS 4 /* Default # of I/O requests. */
/* Channel modes */
#define CHNL_MODETODSP 0 /* Data streaming to the DSP. */
#define CHNL_MODEFROMDSP 1 /* Data streaming from the DSP. */
@@ -48,7 +45,7 @@
struct chnl_attr {
u32 uio_reqs; /* Max # of preallocated I/O requests. */
void *event_obj; /* User supplied auto-reset event object. */
char *pstr_event_name; /* Ptr to name of user event object. */
char *str_event_name; /* Ptr to name of user event object. */
void *reserved1; /* Reserved for future use. */
u32 reserved2; /* Reserved for future use. */
@@ -56,11 +53,11 @@ struct chnl_attr {
/* I/O completion record: */
struct chnl_ioc {
void *pbuf; /* Buffer to be filled/emptied. */
void *buf; /* Buffer to be filled/emptied. */
u32 byte_size; /* Bytes transferred. */
u32 buf_size; /* Actual buffer size in bytes */
u32 status; /* Status of IO completion. */
u32 dw_arg; /* User argument associated with pbuf. */
u32 arg; /* User argument associated with buf. */
};
#endif /* CHNLDEFS_ */

21
drivers/staging/tidspbridge/include/dspbridge/chnlpriv.h
View File

@@ -39,12 +39,6 @@
*/
#define CHNL_PCPY 0 /* Proc-copy transport 0 */
#define CHNL_MAXIRQ 0xff /* Arbitrarily large number. */
/* The following modes are private: */
#define CHNL_MODEUSEREVENT 0x1000 /* User provided the channel event. */
#define CHNL_MODEMASK 0x1001
/* Higher level channel states: */
#define CHNL_STATEREADY 0 /* Channel ready for I/O. */
#define CHNL_STATECANCEL 1 /* I/O was cancelled. */
@@ -56,23 +50,16 @@
/* Types of channel class libraries: */
#define CHNL_TYPESM 1 /* Shared memory driver. */
#define CHNL_TYPEBM 2 /* Bus Mastering driver. */
/* Max string length of channel I/O completion event name - change if needed */
#define CHNL_MAXEVTNAMELEN 32
/* Max memory pages lockable in CHNL_PrepareBuffer() - change if needed */
#define CHNL_MAXLOCKPAGES 64
/* Channel info. */
struct chnl_info {
struct chnl_mgr *hchnl_mgr; /* Owning channel manager. */
struct chnl_mgr *chnl_mgr; /* Owning channel manager. */
u32 cnhl_id; /* Channel ID. */
void *event_obj; /* Channel I/O completion event. */
/*Abstraction of I/O completion event. */
struct sync_object *sync_event;
s8 dw_mode; /* Channel mode. */
u8 dw_state; /* Current channel state. */
s8 mode; /* Channel mode. */
u8 state; /* Current channel state. */
u32 bytes_tx; /* Total bytes transferred. */
u32 cio_cs; /* Number of IOCs in queue. */
u32 cio_reqs; /* Number of IO Requests in queue. */
@@ -81,7 +68,7 @@ struct chnl_info {
/* Channel manager info: */
struct chnl_mgrinfo {
u8 dw_type; /* Type of channel class library. */
u8 type; /* Type of channel class library. */
/* Channel handle, given the channel id. */
struct chnl_object *chnl_obj;
u8 open_channels; /* Number of open channels. */

2
drivers/staging/tidspbridge/include/dspbridge/cmm.h
View File

@@ -81,7 +81,7 @@ extern void *cmm_calloc_buf(struct cmm_object *hcmm_mgr,
* Requires:
* cmm_init(void) called.
* ph_cmm_mgr != NULL.
* mgr_attrts->ul_min_block_size >= 4 bytes.
* mgr_attrts->min_block_size >= 4 bytes.
* Ensures:
*
*/

39
drivers/staging/tidspbridge/include/dspbridge/cmmdefs.h
View File

@@ -19,18 +19,17 @@
#ifndef CMMDEFS_
#define CMMDEFS_
#include <dspbridge/list.h>
/* Cmm attributes used in cmm_create() */
struct cmm_mgrattrs {
/* Minimum SM allocation; default 32 bytes. */
u32 ul_min_block_size;
u32 min_block_size;
};
/* Attributes for CMM_AllocBuf() & CMM_AllocDesc() */
struct cmm_attrs {
u32 ul_seg_id; /* 1,2... are SM segments. 0 is not. */
u32 ul_alignment; /* 0,1,2,4....ul_min_block_size */
u32 seg_id; /* 1,2... are SM segments. 0 is not. */
u32 alignment; /* 0,1,2,4....min_block_size */
};
/*
@@ -52,40 +51,40 @@ struct cmm_attrs {
*/
struct cmm_seginfo {
u32 dw_seg_base_pa; /* Start Phys address of SM segment */
u32 seg_base_pa; /* Start Phys address of SM segment */
/* Total size in bytes of segment: DSP+GPP */
u32 ul_total_seg_size;
u32 dw_gpp_base_pa; /* Start Phys addr of Gpp SM seg */
u32 ul_gpp_size; /* Size of Gpp SM seg in bytes */
u32 dw_dsp_base_va; /* DSP virt base byte address */
u32 ul_dsp_size; /* DSP seg size in bytes */
u32 total_seg_size;
u32 gpp_base_pa; /* Start Phys addr of Gpp SM seg */
u32 gpp_size; /* Size of Gpp SM seg in bytes */
u32 dsp_base_va; /* DSP virt base byte address */
u32 dsp_size; /* DSP seg size in bytes */
/* # of current GPP allocations from this segment */
u32 ul_in_use_cnt;
u32 dw_seg_base_va; /* Start Virt address of SM seg */
u32 in_use_cnt;
u32 seg_base_va; /* Start Virt address of SM seg */
};
/* CMM useful information */
struct cmm_info {
/* # of SM segments registered with this Cmm. */
u32 ul_num_gppsm_segs;
u32 num_gppsm_segs;
/* Total # of allocations outstanding for CMM */
u32 ul_total_in_use_cnt;
u32 total_in_use_cnt;
/* Min SM block size allocation from cmm_create() */
u32 ul_min_block_size;
u32 min_block_size;
/* Info per registered SM segment. */
struct cmm_seginfo seg_info[CMM_MAXGPPSEGS];
};
/* XlatorCreate attributes */
struct cmm_xlatorattrs {
u32 ul_seg_id; /* segment Id used for SM allocations */
u32 dw_dsp_bufs; /* # of DSP-side bufs */
u32 dw_dsp_buf_size; /* size of DSP-side bufs in GPP bytes */
u32 seg_id; /* segment Id used for SM allocations */
u32 dsp_bufs; /* # of DSP-side bufs */
u32 dsp_buf_size; /* size of DSP-side bufs in GPP bytes */
/* Vm base address alloc'd in client process context */
void *vm_base;
/* dw_vm_size must be >= (dwMaxNumBufs * dwMaxSize) */
u32 dw_vm_size;
/* vm_size must be >= (dwMaxNumBufs * dwMaxSize) */
u32 vm_size;
};
/*

13
drivers/staging/tidspbridge/include/dspbridge/cod.h
View File

@@ -27,9 +27,6 @@
#define COD_TRACEBEG "SYS_PUTCBEG"
#define COD_TRACEEND "SYS_PUTCEND"
#define COD_TRACECURPOS "BRIDGE_SYS_PUTC_current"
#define COD_TRACESECT "trace"
#define COD_TRACEBEGOLD "PUTCBEG"
#define COD_TRACEENDOLD "PUTCEND"
#define COD_NOLOAD DBLL_NOLOAD
#define COD_SYMB DBLL_SYMB
@@ -40,11 +37,6 @@ struct cod_manager;
/* COD library handle */
struct cod_libraryobj;
/* COD attributes */
struct cod_attrs {
u32 ul_reserved;
};
/*
* Function prototypes for writing memory to a DSP system, allocating
* and freeing DSP memory.
@@ -79,8 +71,6 @@ extern void cod_close(struct cod_libraryobj *lib);
* Parameters:
* manager: created manager object
* str_zl_file: ZL DLL filename, of length < COD_MAXPATHLENGTH.
* attrs: attributes to be used by this object. A NULL value
* will cause default attrs to be used.
* Returns:
* 0: Success.
* -ESPIPE: ZL_Create failed.
@@ -92,8 +82,7 @@ extern void cod_close(struct cod_libraryobj *lib);
* Ensures:
*/
extern int cod_create(struct cod_manager **mgr,
char *str_zl_file,
const struct cod_attrs *attrs);
char *str_zl_file);
/*
* ======== cod_delete ========

14
drivers/staging/tidspbridge/include/dspbridge/dbdcddef.h
View File

@@ -48,15 +48,15 @@ struct dcd_nodeprops {
struct dsp_ndbprops ndb_props;
u32 msg_segid;
u32 msg_notify_type;
char *pstr_create_phase_fxn;
char *pstr_delete_phase_fxn;
char *pstr_execute_phase_fxn;
char *pstr_i_alg_name;
char *str_create_phase_fxn;
char *str_delete_phase_fxn;
char *str_execute_phase_fxn;
char *str_i_alg_name;
/* Dynamic load properties */
u16 us_load_type; /* Static, dynamic, overlay */
u32 ul_data_mem_seg_mask; /* Data memory requirements */
u32 ul_code_mem_seg_mask; /* Code memory requirements */
u16 load_type; /* Static, dynamic, overlay */
u32 data_mem_seg_mask; /* Data memory requirements */
u32 code_mem_seg_mask; /* Code memory requirements */
};
/* DCD Generic Object Type */

98
drivers/staging/tidspbridge/include/dspbridge/dbdefs.h
View File

@@ -31,9 +31,6 @@
/* API return value and calling convention */
#define DBAPI int
/* Infinite time value for the utimeout parameter to DSPStream_Select() */
#define DSP_FOREVER (-1)
/* Maximum length of node name, used in dsp_ndbprops */
#define DSP_MAXNAMELEN 32
@@ -74,16 +71,9 @@
#define DSP_NODE_MIN_PRIORITY 1
#define DSP_NODE_MAX_PRIORITY 15
/* Pre-Defined Message Command Codes available to user: */
#define DSP_RMSUSERCODESTART RMS_USER /* Start of RMS user cmd codes */
/* end of user codes */
#define DSP_RMSUSERCODEEND (RMS_USER + RMS_MAXUSERCODES);
/* msg_ctrl contains SM buffer description */
#define DSP_RMSBUFDESC RMS_BUFDESC
/* Shared memory identifier for MEM segment named "SHMSEG0" */
#define DSP_SHMSEG0 (u32)(-1)
/* Processor ID numbers */
#define DSP_UNIT 0
#define IVA_UNIT 1
@@ -91,15 +81,6 @@
#define DSPWORD unsigned char
#define DSPWORDSIZE sizeof(DSPWORD)
/* Power control enumerations */
#define PROC_PWRCONTROL 0x8070
#define PROC_PWRMGT_ENABLE (PROC_PWRCONTROL + 0x3)
#define PROC_PWRMGT_DISABLE (PROC_PWRCONTROL + 0x4)
/* Bridge Code Version */
#define BRIDGE_VERSION_CODE 333
#define MAX_PROFILES 16
/* DSP chip type */
@@ -118,12 +99,12 @@ static inline bool is_valid_proc_event(u32 x)
/* The Node UUID structure */
struct dsp_uuid {
u32 ul_data1;
u16 us_data2;
u16 us_data3;
u8 uc_data4;
u8 uc_data5;
u8 uc_data6[6];
u32 data1;
u16 data2;
u16 data3;
u8 data4;
u8 data5;
u8 data6[6];
};
/* DCD types */
@@ -227,11 +208,11 @@ enum dsp_flushtype {
/* Memory Segment Status Values */
struct dsp_memstat {
u32 ul_size;
u32 ul_total_free_size;
u32 ul_len_max_free_block;
u32 ul_num_free_blocks;
u32 ul_num_alloc_blocks;
u32 size;
u32 total_free_size;
u32 len_max_free_block;
u32 num_free_blocks;
u32 num_alloc_blocks;
};
/* Processor Load information Values */
@@ -248,11 +229,11 @@ struct dsp_strmattr {
u32 buf_size; /* Buffer size (DSP words) */
u32 num_bufs; /* Number of buffers */
u32 buf_alignment; /* Buffer alignment */
u32 utimeout; /* Timeout for blocking STRM calls */
u32 timeout; /* Timeout for blocking STRM calls */
enum dsp_strmmode strm_mode; /* mode of stream when opened */
/* DMA chnl id if dsp_strmmode is LDMA or RDMA */
u32 udma_chnl_id;
u32 udma_priority; /* DMA channel priority 0=lowest, >0=high */
u32 dma_chnl_id;
u32 dma_priority; /* DMA channel priority 0=lowest, >0=high */
};
/* The dsp_cbdata structure */
@@ -263,9 +244,9 @@ struct dsp_cbdata {
/* The dsp_msg structure */
struct dsp_msg {
u32 dw_cmd;
u32 dw_arg1;
u32 dw_arg2;
u32 cmd;
u32 arg1;
u32 arg2;
};
/* The dsp_resourcereqmts structure for node's resource requirements */
@@ -274,9 +255,9 @@ struct dsp_resourcereqmts {
u32 static_data_size;
u32 global_data_size;
u32 program_mem_size;
u32 uwc_execution_time;
u32 uwc_period;
u32 uwc_deadline;
u32 wc_execution_time;
u32 wc_period;
u32 wc_deadline;
u32 avg_exection_time;
u32 minimum_period;
};
@@ -295,7 +276,7 @@ struct dsp_streamconnect {
};
struct dsp_nodeprofs {
u32 ul_heap_size;
u32 heap_size;
};
/* The dsp_ndbprops structure reports the attributes of a node */
@@ -313,7 +294,7 @@ struct dsp_ndbprops {
u32 message_depth;
u32 num_input_streams;
u32 num_output_streams;
u32 utimeout;
u32 timeout;
u32 count_profiles; /* Number of supported profiles */
/* Array of profiles */
struct dsp_nodeprofs node_profiles[MAX_PROFILES];
@@ -325,7 +306,7 @@ struct dsp_ndbprops {
struct dsp_nodeattrin {
u32 cb_struct;
s32 prio;
u32 utimeout;
u32 timeout;
u32 profile_id;
/* Reserved, for Bridge Internal use only */
u32 heap_size;
@@ -359,14 +340,14 @@ struct dsp_nodeattr {
* window handle.
*/
struct dsp_notification {
char *ps_name;
char *name;
void *handle;
};
/* The dsp_processorattrin structure describes the attributes of a processor */
struct dsp_processorattrin {
u32 cb_struct;
u32 utimeout;
u32 timeout;
};
/*
* The dsp_processorinfo structure describes basic capabilities of a
@@ -377,8 +358,8 @@ struct dsp_processorinfo {
int processor_family;
int processor_type;
u32 clock_rate;
u32 ul_internal_mem_size;
u32 ul_external_mem_size;
u32 internal_mem_size;
u32 external_mem_size;
u32 processor_id;
int ty_running_rtos;
s32 node_min_priority;
@@ -387,10 +368,10 @@ struct dsp_processorinfo {
/* Error information of last DSP exception signalled to the GPP */
struct dsp_errorinfo {
u32 dw_err_mask;
u32 dw_val1;
u32 dw_val2;
u32 dw_val3;
u32 err_mask;
u32 val1;
u32 val2;
u32 val3;
};
/* The dsp_processorstate structure describes the state of a DSP processor */
@@ -407,7 +388,7 @@ struct dsp_resourceinfo {
u32 cb_struct;
enum dsp_resourceinfotype resource_type;
union {
u32 ul_resource;
u32 resource;
struct dsp_memstat mem_stat;
struct dsp_procloadstat proc_load_stat;
} result;
@@ -420,13 +401,13 @@ struct dsp_resourceinfo {
*/
struct dsp_streamattrin {
u32 cb_struct;
u32 utimeout;
u32 timeout;
u32 segment_id;
u32 buf_alignment;
u32 num_bufs;
enum dsp_strmmode strm_mode;
u32 udma_chnl_id;
u32 udma_priority;
u32 dma_chnl_id;
u32 dma_priority;
};
/* The dsp_bufferattr structure describes the attributes of a data buffer */
@@ -444,7 +425,7 @@ struct dsp_streaminfo {
u32 cb_struct;
u32 number_bufs_allowed;
u32 number_bufs_in_stream;
u32 ul_number_bytes;
u32 number_bytes;
void *sync_object_handle;
enum dsp_streamstate ss_stream_state;
};
@@ -501,13 +482,6 @@ bit 15 - Output (writeable) buffer
#define DSPPROCTYPE_C64 6410
#define IVAPROCTYPE_ARM7 470
#define REG_MGR_OBJECT 1
#define REG_DRV_OBJECT 2
/* registry */
#define DRVOBJECT "DrvObject"
#define MGROBJECT "MgrObject"
/* Max registry path length. Also the max registry value length. */
#define MAXREGPATHLENGTH 255

141
drivers/staging/tidspbridge/include/dspbridge/dbldefs.h
View File

@@ -1,141 +0,0 @@
/*
* dbldefs.h
*
* DSP-BIOS Bridge driver support functions for TI OMAP processors.
*
* Copyright (C) 2005-2006 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#ifndef DBLDEFS_
#define DBLDEFS_
/*
* Bit masks for dbl_flags.
*/
#define DBL_NOLOAD 0x0 /* Don't load symbols, code, or data */
#define DBL_SYMB 0x1 /* load symbols */
#define DBL_CODE 0x2 /* load code */
#define DBL_DATA 0x4 /* load data */
#define DBL_DYNAMIC 0x8 /* dynamic load */
#define DBL_BSS 0x20 /* Unitialized section */
#define DBL_MAXPATHLENGTH 255
/*
* ======== dbl_flags ========
* Specifies whether to load code, data, or symbols
*/
typedef s32 dbl_flags;
/*
* ======== dbl_sect_info ========
* For collecting info on overlay sections
*/
struct dbl_sect_info {
const char *name; /* name of section */
u32 sect_run_addr; /* run address of section */
u32 sect_load_addr; /* load address of section */
u32 size; /* size of section (target MAUs) */
dbl_flags type; /* Code, data, or BSS */
};
/*
* ======== dbl_symbol ========
* (Needed for dynamic load library)
*/
struct dbl_symbol {
u32 value;
};
/*
* ======== dbl_alloc_fxn ========
* Allocate memory function. Allocate or reserve (if reserved == TRUE)
* "size" bytes of memory from segment "space" and return the address in
* *dsp_address (or starting at *dsp_address if reserve == TRUE). Returns 0 on
* success, or an error code on failure.
*/
typedef s32(*dbl_alloc_fxn) (void *hdl, s32 space, u32 size, u32 align,
u32 *dsp_address, s32 seg_id, s32 req,
bool reserved);
/*
* ======== dbl_free_fxn ========
* Free memory function. Free, or unreserve (if reserved == TRUE) "size"
* bytes of memory from segment "space"
*/
typedef bool(*dbl_free_fxn) (void *hdl, u32 addr, s32 space, u32 size,
bool reserved);
/*
* ======== dbl_log_write_fxn ========
* Function to call when writing data from a section, to log the info.
* Can be NULL if no logging is required.
*/
typedef int(*dbl_log_write_fxn) (void *handle,
struct dbl_sect_info *sect, u32 addr,
u32 bytes);
/*
* ======== dbl_sym_lookup ========
* Symbol lookup function - Find the symbol name and return its value.
*
* Parameters:
* handle - Opaque handle
* parg - Opaque argument.
* name - Name of symbol to lookup.
* sym - Location to store address of symbol structure.
*
* Returns:
* TRUE: Success (symbol was found).
* FALSE: Failed to find symbol.
*/
typedef bool(*dbl_sym_lookup) (void *handle, void *parg, void *rmm_handle,
const char *name, struct dbl_symbol ** sym);
/*
* ======== dbl_write_fxn ========
* Write memory function. Write "n" HOST bytes of memory to segment "mtype"
* starting at address "dsp_address" from the buffer "buf". The buffer is
* formatted as an array of words appropriate for the DSP.
*/
typedef s32(*dbl_write_fxn) (void *hdl, u32 dsp_address, void *buf,
u32 n, s32 mtype);
/*
* ======== dbl_attrs ========
*/
struct dbl_attrs {
dbl_alloc_fxn alloc;
dbl_free_fxn free;
void *rmm_handle; /* Handle to pass to alloc, free functions */
dbl_write_fxn write;
void *input_params; /* Handle to pass to write, cinit function */
dbl_log_write_fxn log_write;
void *log_write_handle;
/* Symbol matching function and handle to pass to it */
dbl_sym_lookup sym_lookup;
void *sym_handle;
void *sym_arg;
/*
* These file manipulation functions should be compatible with the
* "C" run time library functions of the same name.
*/
s32(*fread) (void *, size_t, size_t, void *);
s32(*fseek) (void *, long, int);
s32(*ftell) (void *);
s32(*fclose) (void *);
void *(*fopen) (const char *, const char *);
};
#endif /* DBLDEFS_ */

6
drivers/staging/tidspbridge/include/dspbridge/dbll.h
View File

@@ -42,18 +42,12 @@ extern bool dbll_init(void);
extern int dbll_load(struct dbll_library_obj *lib,
dbll_flags flags,
struct dbll_attrs *attrs, u32 * entry);
extern int dbll_load_sect(struct dbll_library_obj *zl_lib,
char *sec_name, struct dbll_attrs *attrs);
extern int dbll_open(struct dbll_tar_obj *target, char *file,
dbll_flags flags,
struct dbll_library_obj **lib_obj);
extern int dbll_read_sect(struct dbll_library_obj *lib,
char *name, char *buf, u32 size);
extern void dbll_set_attrs(struct dbll_tar_obj *target,
struct dbll_attrs *pattrs);
extern void dbll_unload(struct dbll_library_obj *lib, struct dbll_attrs *attrs);
extern int dbll_unload_sect(struct dbll_library_obj *lib,
char *sect_name, struct dbll_attrs *attrs);
#ifdef CONFIG_TIDSPBRIDGE_BACKTRACE
bool dbll_find_dsp_symbol(struct dbll_library_obj *zl_lib, u32 address,
u32 offset_range, u32 *sym_addr_output, char *name_output);

65
drivers/staging/tidspbridge/include/dspbridge/dblldefs.h
View File

@@ -348,29 +348,6 @@ typedef bool(*dbll_init_fxn) (void);
typedef int(*dbll_load_fxn) (struct dbll_library_obj *lib,
dbll_flags flags,
struct dbll_attrs *attrs, u32 *entry);
/*
* ======== dbll_load_sect ========
* Load a named section from an library (for overlay support).
* Parameters:
* lib - Handle returned from dbll_open().
* sec_name - Name of section to load.
* attrs - Contains write function and handle to pass to it.
* Returns:
* 0: Success.
* -ENXIO: Section not found.
* -ENOSYS: Function not implemented.
* Requires:
* Valid lib.
* sec_name != NULL.
* attrs != NULL.
* attrs->write != NULL.
* Ensures:
*/
typedef int(*dbll_load_sect_fxn) (struct dbll_library_obj *lib,
char *sz_sect_name,
struct dbll_attrs *attrs);
/*
* ======== dbll_open ========
* dbll_open() returns a library handle that can be used to load/unload
@@ -421,23 +398,6 @@ typedef int(*dbll_open_fxn) (struct dbll_tar_obj *target, char *file,
typedef int(*dbll_read_sect_fxn) (struct dbll_library_obj *lib,
char *name, char *content,
u32 cont_size);
/*
* ======== dbll_set_attrs ========
* Set the attributes of the target.
* Parameters:
* target - Handle returned from dbll_create().
* pattrs - New attributes.
* Returns:
* Requires:
* DBL initialized.
* Valid target.
* pattrs != NULL.
* Ensures:
*/
typedef void (*dbll_set_attrs_fxn) (struct dbll_tar_obj *target,
struct dbll_attrs *attrs);
/*
* ======== dbll_unload ========
* Unload library loaded with dbll_load().
@@ -452,28 +412,6 @@ typedef void (*dbll_set_attrs_fxn) (struct dbll_tar_obj *target,
*/
typedef void (*dbll_unload_fxn) (struct dbll_library_obj *library,
struct dbll_attrs *attrs);
/*
* ======== dbll_unload_sect ========
* Unload a named section from an library (for overlay support).
* Parameters:
* lib - Handle returned from dbll_open().
* sec_name - Name of section to load.
* attrs - Contains free() function and handle to pass to it.
* Returns:
* 0: Success.
* -ENXIO: Named section not found.
* -ENOSYS
* Requires:
* DBL initialized.
* Valid lib.
* sec_name != NULL.
* Ensures:
*/
typedef int(*dbll_unload_sect_fxn) (struct dbll_library_obj *lib,
char *sz_sect_name,
struct dbll_attrs *attrs);
struct dbll_fxns {
dbll_close_fxn close_fxn;
dbll_create_fxn create_fxn;
@@ -485,12 +423,9 @@ struct dbll_fxns {
dbll_get_sect_fxn get_sect_fxn;
dbll_init_fxn init_fxn;
dbll_load_fxn load_fxn;
dbll_load_sect_fxn load_sect_fxn;
dbll_open_fxn open_fxn;
dbll_read_sect_fxn read_sect_fxn;
dbll_set_attrs_fxn set_attrs_fxn;
dbll_unload_fxn unload_fxn;
dbll_unload_sect_fxn unload_sect_fxn;
};
#endif /* DBLDEFS_ */

32
drivers/staging/tidspbridge/include/dspbridge/dehdefs.h
View File

@@ -1,32 +0,0 @@
/*
* dehdefs.h
*
* DSP-BIOS Bridge driver support functions for TI OMAP processors.
*
* Definition for Bridge driver module DEH.
*
* Copyright (C) 2005-2006 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#ifndef DEHDEFS_
#define DEHDEFS_
#include <dspbridge/mbx_sh.h> /* shared mailbox codes */
/* DEH object manager */
struct deh_mgr;
/* Magic code used to determine if DSP signaled exception. */
#define DEH_BASE MBX_DEH_BASE
#define DEH_USERS_BASE MBX_DEH_USERS_BASE
#define DEH_LIMIT MBX_DEH_LIMIT
#endif /* _DEHDEFS_H */

65
drivers/staging/tidspbridge/include/dspbridge/dev.h
View File

@@ -23,9 +23,9 @@
#include <dspbridge/chnldefs.h>
#include <dspbridge/cmm.h>
#include <dspbridge/cod.h>
#include <dspbridge/dehdefs.h>
#include <dspbridge/dspdeh.h>
#include <dspbridge/nodedefs.h>
#include <dspbridge/dispdefs.h>
#include <dspbridge/disp.h>
#include <dspbridge/dspdefs.h>
#include <dspbridge/dmm.h>
#include <dspbridge/host_os.h>
@@ -94,43 +94,6 @@ extern int dev_create_device(struct dev_object
const char *driver_file_name,
struct cfg_devnode *dev_node_obj);
/*
* ======== dev_create_iva_device ========
* Purpose:
* Called by the operating system to load the Bridge Driver for IVA.
* Parameters:
* device_obj: Ptr to location to receive the device object handle.
* driver_file_name: Name of Bridge driver PE DLL file to load. If the
* absolute path is not provided, the file is loaded
* through 'Bridge's module search path.
* host_config: Host configuration information, to be passed down
* to the Bridge driver when bridge_dev_create() is called.
* pDspConfig: DSP resources, to be passed down to the Bridge driver
* when bridge_dev_create() is called.
* dev_node_obj: Platform specific device node.
* Returns:
* 0: Module is loaded, device object has been created
* -ENOMEM: Insufficient memory to create needed resources.
* -EPERM: Unable to find Bridge driver entry point function.
* -ESPIPE: Unable to load ZL DLL.
* Requires:
* DEV Initialized.
* device_obj != NULL.
* driver_file_name != NULL.
* host_config != NULL.
* pDspConfig != NULL.
* Ensures:
* 0: *device_obj will contain handle to the new device object.
* Otherwise, does not create the device object, ensures the Bridge driver
* module is unloaded, and sets *device_obj to NULL.
*/
extern int dev_create_iva_device(struct dev_object
**device_obj,
const char *driver_file_name,
const struct cfg_hostres
*host_config,
struct cfg_devnode *dev_node_obj);
/*
* ======== dev_create2 ========
* Purpose:
@@ -146,8 +109,8 @@ extern int dev_create_iva_device(struct dev_object
* DEV Initialized
* Valid hdev_obj
* Ensures:
* 0 and hdev_obj->hnode_mgr != NULL
* else hdev_obj->hnode_mgr == NULL
* 0 and hdev_obj->node_mgr != NULL
* else hdev_obj->node_mgr == NULL
*/
extern int dev_create2(struct dev_object *hdev_obj);
@@ -164,7 +127,7 @@ extern int dev_create2(struct dev_object *hdev_obj);
* DEV Initialized
* Valid hdev_obj
* Ensures:
* 0 and hdev_obj->hnode_mgr == NULL
* 0 and hdev_obj->node_mgr == NULL
* else -EPERM.
*/
extern int dev_destroy2(struct dev_object *hdev_obj);
@@ -541,24 +504,6 @@ extern void dev_exit(void);
*/
extern bool dev_init(void);
/*
* ======== dev_is_locked ========
* Purpose:
* Predicate function to determine if the device has been
* locked by a client for exclusive access.
* Parameters:
* hdev_obj: Handle to device object created with
* dev_create_device().
* Returns:
* 0: TRUE: device has been locked.
* 0: FALSE: device not locked.
* -EFAULT: hdev_obj was invalid.
* Requires:
* DEV Initialized.
* Ensures:
*/
extern int dev_is_locked(struct dev_object *hdev_obj);
/*
* ======== dev_insert_proc_object ========
* Purpose:

15
drivers/staging/tidspbridge/include/dspbridge/disp.h
View File

@@ -22,7 +22,20 @@
#include <dspbridge/dbdefs.h>
#include <dspbridge/nodedefs.h>
#include <dspbridge/nodepriv.h>
#include <dspbridge/dispdefs.h>
struct disp_object;
/* Node Dispatcher attributes */
struct disp_attr {
u32 chnl_offset; /* Offset of channel ids reserved for RMS */
/* Size of buffer for sending data to RMS */
u32 chnl_buf_size;
int proc_family; /* eg, 5000 */
int proc_type; /* eg, 5510 */
void *reserved1; /* Reserved for future use. */
u32 reserved2; /* Reserved for future use. */
};
/*
* ======== disp_create ========

35
drivers/staging/tidspbridge/include/dspbridge/dispdefs.h
View File

@@ -1,35 +0,0 @@
/*
* dispdefs.h
*
* DSP-BIOS Bridge driver support functions for TI OMAP processors.
*
* Global DISP constants and types, shared by PROCESSOR, NODE, and DISP.
*
* Copyright (C) 2005-2006 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#ifndef DISPDEFS_
#define DISPDEFS_
struct disp_object;
/* Node Dispatcher attributes */
struct disp_attr {
u32 ul_chnl_offset; /* Offset of channel ids reserved for RMS */
/* Size of buffer for sending data to RMS */
u32 ul_chnl_buf_size;
int proc_family; /* eg, 5000 */
int proc_type; /* eg, 5510 */
void *reserved1; /* Reserved for future use. */
u32 reserved2; /* Reserved for future use. */
};
#endif /* DISPDEFS_ */

40
drivers/staging/tidspbridge/include/dspbridge/drv.h
View File

@@ -23,11 +23,10 @@
#include <dspbridge/devdefs.h>
#include <dspbridge/drvdefs.h>
#include <linux/idr.h>
#define DRV_ASSIGN 1
#define DRV_RELEASE 0
/* Bridge Driver Object */
struct drv_object;
/* Provide the DSP Internal memory windows that can be accessed from L3 address
* space */
@@ -38,23 +37,14 @@
/* MEM1 is L2 RAM + L2 Cache space */
#define OMAP_DSP_MEM1_BASE 0x5C7F8000
#define OMAP_DSP_MEM1_SIZE 0x18000
#define OMAP_DSP_GEM1_BASE 0x107F8000
/* MEM2 is L1P RAM/CACHE space */
#define OMAP_DSP_MEM2_BASE 0x5CE00000
#define OMAP_DSP_MEM2_SIZE 0x8000
#define OMAP_DSP_GEM2_BASE 0x10E00000
/* MEM3 is L1D RAM/CACHE space */
#define OMAP_DSP_MEM3_BASE 0x5CF04000
#define OMAP_DSP_MEM3_SIZE 0x14000
#define OMAP_DSP_GEM3_BASE 0x10F04000
#define OMAP_IVA2_PRM_BASE 0x48306000
#define OMAP_IVA2_PRM_SIZE 0x1000
#define OMAP_IVA2_CM_BASE 0x48004000
#define OMAP_IVA2_CM_SIZE 0x1000
#define OMAP_PER_CM_BASE 0x48005000
#define OMAP_PER_CM_SIZE 0x1000
@@ -65,20 +55,14 @@
#define OMAP_CORE_PRM_BASE 0x48306A00
#define OMAP_CORE_PRM_SIZE 0x1000
#define OMAP_SYSC_BASE 0x48002000
#define OMAP_SYSC_SIZE 0x1000
#define OMAP_DMMU_BASE 0x5D000000
#define OMAP_DMMU_SIZE 0x1000
#define OMAP_PRCM_VDD1_DOMAIN 1
#define OMAP_PRCM_VDD2_DOMAIN 2
/* GPP PROCESS CLEANUP Data structures */
/* New structure (member of process context) abstracts NODE resource info */
struct node_res_object {
void *hnode;
void *node;
s32 node_allocated; /* Node status */
s32 heap_allocated; /* Heap status */
s32 streams_allocated; /* Streams status */
@@ -114,21 +98,10 @@ struct dmm_rsv_object {
u32 dsp_reserved_addr;
};
/* New structure (member of process context) abstracts DMM resource info */
struct dspheap_res_object {
s32 heap_allocated; /* DMM status */
u32 ul_mpu_addr;
u32 ul_dsp_addr;
u32 ul_dsp_res_addr;
u32 heap_size;
void *hprocessor;
struct dspheap_res_object *next;
};
/* New structure (member of process context) abstracts stream resource info */
struct strm_res_object {
s32 stream_allocated; /* Stream status */
void *hstream;
void *stream;
u32 num_bufs;
u32 dir;
int id;
@@ -156,7 +129,7 @@ struct process_context {
enum gpp_proc_res_state res_state;
/* Handle to Processor */
void *hprocessor;
void *processor;
/* DSP Node resources */
struct idr *node_id;
@@ -169,9 +142,6 @@ struct process_context {
struct list_head dmm_rsv_list;
spinlock_t dmm_rsv_lock;
/* DSP Heap resources */
struct dspheap_res_object *pdspheap_list;
/* Stream resources */
struct idr *stream_id;
};

25
drivers/staging/tidspbridge/include/dspbridge/drvdefs.h
View File

@@ -1,25 +0,0 @@
/*
* drvdefs.h
*
* DSP-BIOS Bridge driver support functions for TI OMAP processors.
*
* Definition of common struct between dspdefs.h and drv.h.
*
* Copyright (C) 2005-2006 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#ifndef DRVDEFS_
#define DRVDEFS_
/* Bridge Driver Object */
struct drv_object;
#endif /* DRVDEFS_ */

216
drivers/staging/tidspbridge/include/dspbridge/dspapi-ioctl.h
View File

@@ -29,22 +29,22 @@ union trapped_args {
/* MGR Module */
struct {
u32 node_id;
struct dsp_ndbprops __user *pndb_props;
u32 undb_props_size;
u32 __user *pu_num_nodes;
struct dsp_ndbprops __user *ndb_props;
u32 ndb_props_size;
u32 __user *num_nodes;
} args_mgr_enumnode_info;
struct {
u32 processor_id;
struct dsp_processorinfo __user *processor_info;
u32 processor_info_size;
u32 __user *pu_num_procs;
u32 __user *num_procs;
} args_mgr_enumproc_info;
struct {
struct dsp_uuid *uuid_obj;
enum dsp_dcdobjtype obj_type;
char *psz_path_name;
char *sz_path_name;
} args_mgr_registerobject;
struct {
@@ -55,8 +55,8 @@ union trapped_args {
struct {
struct dsp_notification __user *__user *anotifications;
u32 count;
u32 __user *pu_index;
u32 utimeout;
u32 __user *index;
u32 timeout;
} args_mgr_wait;
/* PROC Module */
@@ -67,196 +67,188 @@ union trapped_args {
} args_proc_attach;
struct {
void *hprocessor;
u32 dw_cmd;
struct dsp_cbdata __user *pargs;
void *processor;
u32 cmd;
struct dsp_cbdata __user *args;
} args_proc_ctrl;
struct {
void *hprocessor;
void *processor;
} args_proc_detach;
struct {
void *hprocessor;
void *processor;
void *__user *node_tab;
u32 node_tab_size;
u32 __user *pu_num_nodes;
u32 __user *pu_allocated;
u32 __user *num_nodes;
u32 __user *allocated;
} args_proc_enumnode_info;
struct {
void *hprocessor;
void *processor;
u32 resource_type;
struct dsp_resourceinfo *resource_info;
u32 resource_info_size;
} args_proc_enumresources;
struct {
void *hprocessor;
void *processor;
struct dsp_processorstate __user *proc_state_obj;
u32 state_info_size;
} args_proc_getstate;
struct {
void *hprocessor;
u8 __user *pbuf;
u8 __user *psize;
void *processor;
u8 __user *buf;
u8 __user *size;
u32 max_size;
} args_proc_gettrace;
struct {
void *hprocessor;
void *processor;
s32 argc_index;
char __user *__user *user_args;
char *__user *user_envp;
} args_proc_load;
struct {
void *hprocessor;
void *processor;
u32 event_mask;
u32 notify_type;
struct dsp_notification __user *hnotification;
struct dsp_notification __user *notification;
} args_proc_register_notify;
struct {
void *hprocessor;
} args_proc_start;
struct {
void *hprocessor;
u32 ul_size;
void *__user *pp_rsv_addr;
void *processor;
u32 size;
void *__user *rsv_addr;
} args_proc_rsvmem;
struct {
void *hprocessor;
u32 ul_size;
void *prsv_addr;
void *processor;
u32 size;
void *rsv_addr;
} args_proc_unrsvmem;
struct {
void *hprocessor;
void *pmpu_addr;
u32 ul_size;
void *processor;
void *mpu_addr;
u32 size;
void *req_addr;
void *__user *pp_map_addr;
u32 ul_map_attr;
void *__user *map_addr;
u32 map_attr;
} args_proc_mapmem;
struct {
void *hprocessor;
u32 ul_size;
void *processor;
u32 size;
void *map_addr;
} args_proc_unmapmem;
struct {
void *hprocessor;
void *pmpu_addr;
u32 ul_size;
void *processor;
void *mpu_addr;
u32 size;
u32 dir;
} args_proc_dma;
struct {
void *hprocessor;
void *pmpu_addr;
u32 ul_size;
u32 ul_flags;
void *processor;
void *mpu_addr;
u32 size;
u32 flags;
} args_proc_flushmemory;
struct {
void *hprocessor;
} args_proc_stop;
struct {
void *hprocessor;
void *pmpu_addr;
u32 ul_size;
void *processor;
void *mpu_addr;
u32 size;
} args_proc_invalidatememory;
/* NODE Module */
struct {
void *hprocessor;
void *processor;
struct dsp_uuid __user *node_id_ptr;
struct dsp_cbdata __user *pargs;
struct dsp_cbdata __user *args;
struct dsp_nodeattrin __user *attr_in;
void *__user *ph_node;
void *__user *node;
} args_node_allocate;
struct {
void *hnode;
u32 usize;
struct dsp_bufferattr __user *pattr;
u8 *__user *pbuffer;
void *node;
u32 size;
struct dsp_bufferattr __user *attr;
u8 *__user *buffer;
} args_node_allocmsgbuf;
struct {
void *hnode;
void *node;
s32 prio;
} args_node_changepriority;
struct {
void *hnode;
void *node;
u32 stream_id;
void *other_node;
u32 other_stream;
struct dsp_strmattr __user *pattrs;
struct dsp_strmattr __user *attrs;
struct dsp_cbdata __user *conn_param;
} args_node_connect;
struct {
void *hnode;
void *node;
} args_node_create;
struct {
void *hnode;
void *node;
} args_node_delete;
struct {
void *hnode;
struct dsp_bufferattr __user *pattr;
u8 *pbuffer;
void *node;
struct dsp_bufferattr __user *attr;
u8 *buffer;
} args_node_freemsgbuf;
struct {
void *hnode;
struct dsp_nodeattr __user *pattr;
void *node;
struct dsp_nodeattr __user *attr;
u32 attr_size;
} args_node_getattr;
struct {
void *hnode;
void *node;
struct dsp_msg __user *message;
u32 utimeout;
u32 timeout;
} args_node_getmessage;
struct {
void *hnode;
void *node;
} args_node_pause;
struct {
void *hnode;
void *node;
struct dsp_msg __user *message;
u32 utimeout;
u32 timeout;
} args_node_putmessage;
struct {
void *hnode;
void *node;
u32 event_mask;
u32 notify_type;
struct dsp_notification __user *hnotification;
struct dsp_notification __user *notification;
} args_node_registernotify;
struct {
void *hnode;
void *node;
} args_node_run;
struct {
void *hnode;
int __user *pstatus;
void *node;
int __user *status;
} args_node_terminate;
struct {
void *hprocessor;
void *processor;
struct dsp_uuid __user *node_id_ptr;
struct dsp_ndbprops __user *node_props;
} args_node_getuuidprops;
@@ -264,104 +256,104 @@ union trapped_args {
/* STRM module */
struct {
void *hstream;
u32 usize;
void *stream;
u32 size;
u8 *__user *ap_buffer;
u32 num_bufs;
} args_strm_allocatebuffer;
struct {
void *hstream;
void *stream;
} args_strm_close;
struct {
void *hstream;
void *stream;
u8 *__user *ap_buffer;
u32 num_bufs;
} args_strm_freebuffer;
struct {
void *hstream;
void **ph_event;
void *stream;
void **event;
} args_strm_geteventhandle;
struct {
void *hstream;
void *stream;
struct stream_info __user *stream_info;
u32 stream_info_size;
} args_strm_getinfo;
struct {
void *hstream;
void *stream;
bool flush_flag;
} args_strm_idle;
struct {
void *hstream;
u8 *pbuffer;
u32 dw_bytes;
u32 dw_buf_size;
u32 dw_arg;
void *stream;
u8 *buffer;
u32 bytes;
u32 buf_size;
u32 arg;
} args_strm_issue;
struct {
void *hnode;
void *node;
u32 direction;
u32 index;
struct strm_attr __user *attr_in;
void *__user *ph_stream;
void *__user *stream;
} args_strm_open;
struct {
void *hstream;
void *stream;
u8 *__user *buf_ptr;
u32 __user *bytes;
u32 __user *buf_size_ptr;
u32 __user *pdw_arg;
u32 __user *arg;
} args_strm_reclaim;
struct {
void *hstream;
void *stream;
u32 event_mask;
u32 notify_type;
struct dsp_notification __user *hnotification;
struct dsp_notification __user *notification;
} args_strm_registernotify;
struct {
void *__user *stream_tab;
u32 strm_num;
u32 __user *pmask;
u32 utimeout;
u32 __user *mask;
u32 timeout;
} args_strm_select;
/* CMM Module */
struct {
struct cmm_object *hcmm_mgr;
u32 usize;
struct cmm_attrs *pattrs;
void **pp_buf_va;
struct cmm_object *cmm_mgr;
u32 size;
struct cmm_attrs *attrs;
void **buf_va;
} args_cmm_allocbuf;
struct {
struct cmm_object *hcmm_mgr;
struct cmm_object *cmm_mgr;
void *buf_pa;
u32 ul_seg_id;
u32 seg_id;
} args_cmm_freebuf;
struct {
void *hprocessor;
struct cmm_object *__user *ph_cmm_mgr;
void *processor;
struct cmm_object *__user *cmm_mgr;
} args_cmm_gethandle;
struct {
struct cmm_object *hcmm_mgr;
struct cmm_object *cmm_mgr;
struct cmm_info __user *cmm_info_obj;
} args_cmm_getinfo;
/* UTIL module */
struct {
s32 util_argc;
char **pp_argv;
char **argv;
} args_util_testdll;
};

88
drivers/staging/tidspbridge/include/dspbridge/dspdefs.h
View File

@@ -32,17 +32,11 @@
#include <dspbridge/brddefs.h>
#include <dspbridge/cfgdefs.h>
#include <dspbridge/chnlpriv.h>
#include <dspbridge/dehdefs.h>
#include <dspbridge/dspdeh.h>
#include <dspbridge/devdefs.h>
#include <dspbridge/iodefs.h>
#include <dspbridge/io.h>
#include <dspbridge/msgdefs.h>
/*
* Any IOCTLS at or above this value are reserved for standard Bridge driver
* interfaces.
*/
#define BRD_RESERVEDIOCTLBASE 0x8000
/* Handle to Bridge driver's private device context. */
struct bridge_dev_context;
@@ -306,7 +300,7 @@ typedef int(*fxn_brd_write) (struct bridge_dev_context *dev_ctxt,
* mgr_attrts->irq_shared: TRUE if the IRQ is shareable.
* mgr_attrts->word_size: DSP Word size in equivalent PC bytes..
* mgr_attrts->shm_base: Base physical address of shared memory, if any.
* mgr_attrts->usm_length: Bytes of shared memory block.
* mgr_attrts->sm_length: Bytes of shared memory block.
* Returns:
* 0: Success;
* -ENOMEM: Insufficient memory for requested resources.
@@ -981,51 +975,51 @@ typedef void (*fxn_msg_setqueueid) (struct msg_queue *msg_queue_obj,
struct bridge_drv_interface {
u32 brd_api_major_version; /* Set to BRD_API_MAJOR_VERSION. */
u32 brd_api_minor_version; /* Set to BRD_API_MINOR_VERSION. */
fxn_dev_create pfn_dev_create; /* Create device context */
fxn_dev_destroy pfn_dev_destroy; /* Destroy device context */
fxn_dev_ctrl pfn_dev_cntrl; /* Optional vendor interface */
fxn_brd_monitor pfn_brd_monitor; /* Load and/or start monitor */
fxn_brd_start pfn_brd_start; /* Start DSP program. */
fxn_brd_stop pfn_brd_stop; /* Stop/reset board. */
fxn_brd_status pfn_brd_status; /* Get current board status. */
fxn_brd_read pfn_brd_read; /* Read board memory */
fxn_brd_write pfn_brd_write; /* Write board memory. */
fxn_brd_setstate pfn_brd_set_state; /* Sets the Board State */
fxn_brd_memcopy pfn_brd_mem_copy; /* Copies DSP Memory */
fxn_brd_memwrite pfn_brd_mem_write; /* Write DSP Memory w/o halt */
fxn_brd_memmap pfn_brd_mem_map; /* Maps MPU mem to DSP mem */
fxn_brd_memunmap pfn_brd_mem_un_map; /* Unmaps MPU mem to DSP mem */
fxn_chnl_create pfn_chnl_create; /* Create channel manager. */
fxn_chnl_destroy pfn_chnl_destroy; /* Destroy channel manager. */
fxn_chnl_open pfn_chnl_open; /* Create a new channel. */
fxn_chnl_close pfn_chnl_close; /* Close a channel. */
fxn_chnl_addioreq pfn_chnl_add_io_req; /* Req I/O on a channel. */
fxn_chnl_getioc pfn_chnl_get_ioc; /* Wait for I/O completion. */
fxn_chnl_cancelio pfn_chnl_cancel_io; /* Cancl I/O on a channel. */
fxn_chnl_flushio pfn_chnl_flush_io; /* Flush I/O. */
fxn_chnl_getinfo pfn_chnl_get_info; /* Get channel specific info */
fxn_dev_create dev_create; /* Create device context */
fxn_dev_destroy dev_destroy; /* Destroy device context */
fxn_dev_ctrl dev_cntrl; /* Optional vendor interface */
fxn_brd_monitor brd_monitor; /* Load and/or start monitor */
fxn_brd_start brd_start; /* Start DSP program. */
fxn_brd_stop brd_stop; /* Stop/reset board. */
fxn_brd_status brd_status; /* Get current board status. */
fxn_brd_read brd_read; /* Read board memory */
fxn_brd_write brd_write; /* Write board memory. */
fxn_brd_setstate brd_set_state; /* Sets the Board State */
fxn_brd_memcopy brd_mem_copy; /* Copies DSP Memory */
fxn_brd_memwrite brd_mem_write; /* Write DSP Memory w/o halt */
fxn_brd_memmap brd_mem_map; /* Maps MPU mem to DSP mem */
fxn_brd_memunmap brd_mem_un_map; /* Unmaps MPU mem to DSP mem */
fxn_chnl_create chnl_create; /* Create channel manager. */
fxn_chnl_destroy chnl_destroy; /* Destroy channel manager. */
fxn_chnl_open chnl_open; /* Create a new channel. */
fxn_chnl_close chnl_close; /* Close a channel. */
fxn_chnl_addioreq chnl_add_io_req; /* Req I/O on a channel. */
fxn_chnl_getioc chnl_get_ioc; /* Wait for I/O completion. */
fxn_chnl_cancelio chnl_cancel_io; /* Cancl I/O on a channel. */
fxn_chnl_flushio chnl_flush_io; /* Flush I/O. */
fxn_chnl_getinfo chnl_get_info; /* Get channel specific info */
/* Get channel manager info. */
fxn_chnl_getmgrinfo pfn_chnl_get_mgr_info;
fxn_chnl_idle pfn_chnl_idle; /* Idle the channel */
fxn_chnl_getmgrinfo chnl_get_mgr_info;
fxn_chnl_idle chnl_idle; /* Idle the channel */
/* Register for notif. */
fxn_chnl_registernotify pfn_chnl_register_notify;
fxn_io_create pfn_io_create; /* Create IO manager */
fxn_io_destroy pfn_io_destroy; /* Destroy IO manager */
fxn_io_onloaded pfn_io_on_loaded; /* Notify of program loaded */
fxn_chnl_registernotify chnl_register_notify;
fxn_io_create io_create; /* Create IO manager */
fxn_io_destroy io_destroy; /* Destroy IO manager */
fxn_io_onloaded io_on_loaded; /* Notify of program loaded */
/* Get Processor's current and predicted load */
fxn_io_getprocload pfn_io_get_proc_load;
fxn_msg_create pfn_msg_create; /* Create message manager */
fxn_io_getprocload io_get_proc_load;
fxn_msg_create msg_create; /* Create message manager */
/* Create message queue */
fxn_msg_createqueue pfn_msg_create_queue;
fxn_msg_delete pfn_msg_delete; /* Delete message manager */
fxn_msg_createqueue msg_create_queue;
fxn_msg_delete msg_delete; /* Delete message manager */
/* Delete message queue */
fxn_msg_deletequeue pfn_msg_delete_queue;
fxn_msg_get pfn_msg_get; /* Get a message */
fxn_msg_put pfn_msg_put; /* Send a message */
fxn_msg_deletequeue msg_delete_queue;
fxn_msg_get msg_get; /* Get a message */
fxn_msg_put msg_put; /* Send a message */
/* Register for notif. */
fxn_msg_registernotify pfn_msg_register_notify;
fxn_msg_registernotify msg_register_notify;
/* Set message queue id */
fxn_msg_setqueueid pfn_msg_set_queue_id;
fxn_msg_setqueueid msg_set_queue_id;
};
/*

2
drivers/staging/tidspbridge/include/dspbridge/dspdrv.h
View File

@@ -20,8 +20,6 @@
#if !defined _DSPDRV_H_
#define _DSPDRV_H_
#define MAX_DEV 10 /* Max support of 10 devices */
/*
* ======== dsp_deinit ========
* Purpose:

4
drivers/staging/tidspbridge/include/dspbridge/dspio.h
View File

@@ -24,7 +24,8 @@
#define DSPIO_
#include <dspbridge/devdefs.h>
#include <dspbridge/iodefs.h>
#include <dspbridge/io.h>
extern int bridge_io_create(struct io_mgr **io_man,
struct dev_object *hdev_obj,
@@ -34,7 +35,6 @@ extern int bridge_io_destroy(struct io_mgr *hio_mgr);
extern int bridge_io_on_loaded(struct io_mgr *hio_mgr);
extern int iva_io_on_loaded(struct io_mgr *hio_mgr);
extern int bridge_io_get_proc_load(struct io_mgr *hio_mgr,
struct dsp_procloadstat *proc_lstat);

13
drivers/staging/tidspbridge/include/dspbridge/dspioctl.h
View File

@@ -31,9 +31,6 @@
#define BRDIOCTL_CHNLREAD (BRDIOCTL_RESERVEDBASE + 0x10)
#define BRDIOCTL_CHNLWRITE (BRDIOCTL_RESERVEDBASE + 0x20)
#define BRDIOCTL_GETINTRCOUNT (BRDIOCTL_RESERVEDBASE + 0x30)
#define BRDIOCTL_RESETINTRCOUNT (BRDIOCTL_RESERVEDBASE + 0x40)
#define BRDIOCTL_INTERRUPTDSP (BRDIOCTL_RESERVEDBASE + 0x50)
/* DMMU */
#define BRDIOCTL_SETMMUCONFIG (BRDIOCTL_RESERVEDBASE + 0x60)
/* PWR */
@@ -47,8 +44,6 @@
#define BRDIOCTL_DEEPSLEEP (BRDIOCTL_PWRCONTROL + 0x0)
#define BRDIOCTL_EMERGENCYSLEEP (BRDIOCTL_PWRCONTROL + 0x1)
#define BRDIOCTL_WAKEUP (BRDIOCTL_PWRCONTROL + 0x2)
#define BRDIOCTL_PWRENABLE (BRDIOCTL_PWRCONTROL + 0x3)
#define BRDIOCTL_PWRDISABLE (BRDIOCTL_PWRCONTROL + 0x4)
#define BRDIOCTL_CLK_CTRL (BRDIOCTL_PWRCONTROL + 0x7)
/* DSP Initiated Hibernate */
#define BRDIOCTL_PWR_HIBERNATE (BRDIOCTL_PWRCONTROL + 0x8)
@@ -60,11 +55,11 @@
#define BRDIOCTL_NUMOFMMUTLB 32
struct bridge_ioctl_extproc {
u32 ul_dsp_va; /* DSP virtual address */
u32 ul_gpp_pa; /* GPP physical address */
u32 dsp_va; /* DSP virtual address */
u32 gpp_pa; /* GPP physical address */
/* GPP virtual address. __va does not work for ioremapped addresses */
u32 ul_gpp_va;
u32 ul_size; /* Size of the mapped memory in bytes */
u32 gpp_va;
u32 size; /* Size of the mapped memory in bytes */
enum hw_endianism_t endianism;
enum hw_mmu_mixed_size_t mixed_mode;
enum hw_element_size_t elem_size;

2
drivers/staging/tidspbridge/include/dspbridge/dynamic_loader.h
View File

@@ -46,8 +46,6 @@ struct dynamic_loader_initialize;
* Option flags to modify the behavior of module loading
*/
#define DLOAD_INITBSS 0x1 /* initialize BSS sections to zero */
#define DLOAD_BIGEND 0x2 /* require big-endian load module */
#define DLOAD_LITTLE 0x4 /* require little-endian load module */
/*****************************************************************************
* Procedure dynamic_load_module

79
drivers/staging/tidspbridge/include/dspbridge/gb.h
View File

@@ -1,79 +0,0 @@
/*
* gb.h
*
* DSP-BIOS Bridge driver support functions for TI OMAP processors.
*
* Generic bitmap manager.
*
* Copyright (C) 2005-2006 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#ifndef GB_
#define GB_
#define GB_NOBITS (~0)
#include <dspbridge/host_os.h>
struct gb_t_map;
/*
* ======== gb_clear ========
* Clear the bit in position bitn in the bitmap map. Bit positions are
* zero based.
*/
extern void gb_clear(struct gb_t_map *map, u32 bitn);
/*
* ======== gb_create ========
* Create a bit map with len bits. Initially all bits are cleared.
*/
extern struct gb_t_map *gb_create(u32 len);
/*
* ======== gb_delete ========
* Delete previously created bit map
*/
extern void gb_delete(struct gb_t_map *map);
/*
* ======== gb_findandset ========
* Finds a clear bit, sets it, and returns the position
*/
extern u32 gb_findandset(struct gb_t_map *map);
/*
* ======== gb_minclear ========
* gb_minclear returns the minimum clear bit position. If no bit is
* clear, gb_minclear returns -1.
*/
extern u32 gb_minclear(struct gb_t_map *map);
/*
* ======== gb_set ========
* Set the bit in position bitn in the bitmap map. Bit positions are
* zero based.
*/
extern void gb_set(struct gb_t_map *map, u32 bitn);
/*
* ======== gb_test ========
* Returns TRUE if the bit in position bitn is set in map; otherwise
* gb_test returns FALSE. Bit positions are zero based.
*/
extern bool gb_test(struct gb_t_map *map, u32 bitn);
#endif /*GB_ */

59
drivers/staging/tidspbridge/include/dspbridge/gs.h
View File

@@ -1,59 +0,0 @@
/*
* gs.h
*
* DSP-BIOS Bridge driver support functions for TI OMAP processors.
*
* Memory allocation/release wrappers. This module allows clients to
* avoid OS spacific issues related to memory allocation. It also provides
* simple diagnostic capabilities to assist in the detection of memory
* leaks.
*
* Copyright (C) 2005-2006 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#ifndef GS_
#define GS_
/*
* ======== gs_alloc ========
* Alloc size bytes of space. Returns pointer to space
* allocated, otherwise NULL.
*/
extern void *gs_alloc(u32 size);
/*
* ======== gs_exit ========
* Module exit. Do not change to "#define gs_init()"; in
* some environments this operation must actually do some work!
*/
extern void gs_exit(void);
/*
* ======== gs_free ========
* Free space allocated by gs_alloc() or GS_calloc().
*/
extern void gs_free(void *ptr);
/*
* ======== gs_frees ========
* Free space allocated by gs_alloc() or GS_calloc() and assert that
* the size of the allocation is size bytes.
*/
extern void gs_frees(void *ptr, u32 size);
/*
* ======== gs_init ========
* Module initialization. Do not change to "#define gs_init()"; in
* some environments this operation must actually do some work!
*/
extern void gs_init(void);
#endif /*GS_ */

9
drivers/staging/tidspbridge/include/dspbridge/host_os.h
View File

@@ -57,13 +57,4 @@
extern struct platform_device *omap_dspbridge_dev;
extern struct device *bridge;
#if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE)
extern void dspbridge_reserve_sdram(void);
#else
static inline void dspbridge_reserve_sdram(void)
{
}
#endif
extern unsigned long dspbridge_get_mempool_base(void);
#endif

29
drivers/staging/tidspbridge/include/dspbridge/io.h
View File

@@ -22,7 +22,18 @@
#include <dspbridge/cfgdefs.h>
#include <dspbridge/devdefs.h>
#include <dspbridge/iodefs.h>
/* IO Objects: */
struct io_mgr;
/* IO manager attributes: */
struct io_attrs {
u8 birq; /* Channel's I/O IRQ number. */
bool irq_shared; /* TRUE if the IRQ is shareable. */
u32 word_size; /* DSP Word size. */
u32 shm_base; /* Physical base address of shared memory. */
u32 sm_length; /* Size (in bytes) of shared memory. */
};
/*
* ======== io_create ========
@@ -95,20 +106,4 @@ extern void io_exit(void);
*/
extern bool io_init(void);
/*
* ======== io_on_loaded ========
* Purpose:
* Called when a program is loaded so IO manager can update its
* internal state.
* Parameters:
* hio_mgr: IOmanager object.
* Returns:
* 0: Success.
* -EFAULT: hio_mgr was invalid.
* Requires:
* io_init(void) called.
* Ensures:
*/
extern int io_on_loaded(struct io_mgr *hio_mgr);
#endif /* CHNL_ */

143
drivers/staging/tidspbridge/include/dspbridge/io_sm.h
View File

@@ -23,12 +23,16 @@
#include <dspbridge/_chnl_sm.h>
#include <dspbridge/host_os.h>
#include <dspbridge/iodefs.h>
#include <dspbridge/io.h>
#include <dspbridge/mbx_sh.h> /* shared mailbox codes */
/* Magic code used to determine if DSP signaled exception. */
#define DEH_BASE MBX_DEH_BASE
#define DEH_LIMIT MBX_DEH_LIMIT
#define IO_INPUT 0
#define IO_OUTPUT 1
#define IO_SERVICE 2
#define IO_MAXSERVICE IO_SERVICE
#ifdef CONFIG_TIDSPBRIDGE_DVFS
/* The maximum number of OPPs that are supported */
@@ -115,122 +119,6 @@ extern void io_request_chnl(struct io_mgr *io_manager,
*/
extern void iosm_schedule(struct io_mgr *io_manager);
/*
* DSP-DMA IO functions
*/
/*
* ======== io_ddma_init_chnl_desc ========
* Purpose:
* Initialize DSP DMA channel descriptor.
* Parameters:
* hio_mgr: Handle to a I/O manager.
* ddma_chnl_id: DDMA channel identifier.
* num_desc: Number of buffer descriptors(equals # of IOReqs &
* Chirps)
* dsp: Dsp address;
* Returns:
* Requires:
* ddma_chnl_id < DDMA_MAXDDMACHNLS
* num_desc > 0
* pVa != NULL
* pDspPa != NULL
*
* Ensures:
*/
extern void io_ddma_init_chnl_desc(struct io_mgr *hio_mgr, u32 ddma_chnl_id,
u32 num_desc, void *dsp);
/*
* ======== io_ddma_clear_chnl_desc ========
* Purpose:
* Clear DSP DMA channel descriptor.
* Parameters:
* hio_mgr: Handle to a I/O manager.
* ddma_chnl_id: DDMA channel identifier.
* Returns:
* Requires:
* ddma_chnl_id < DDMA_MAXDDMACHNLS
* Ensures:
*/
extern void io_ddma_clear_chnl_desc(struct io_mgr *hio_mgr, u32 ddma_chnl_id);
/*
* ======== io_ddma_request_chnl ========
* Purpose:
* Request channel DSP-DMA from the DSP. Sets up SM descriptors and
* control fields in shared memory.
* Parameters:
* hio_mgr: Handle to a I/O manager.
* pchnl: Ptr to channel object
* chnl_packet_obj: Ptr to channel i/o request packet.
* Returns:
* Requires:
* pchnl != NULL
* pchnl->cio_reqs > 0
* chnl_packet_obj != NULL
* Ensures:
*/
extern void io_ddma_request_chnl(struct io_mgr *hio_mgr,
struct chnl_object *pchnl,
struct chnl_irp *chnl_packet_obj,
u16 *mbx_val);
/*
* Zero-copy IO functions
*/
/*
* ======== io_ddzc_init_chnl_desc ========
* Purpose:
* Initialize ZCPY channel descriptor.
* Parameters:
* hio_mgr: Handle to a I/O manager.
* zid: zero-copy channel identifier.
* Returns:
* Requires:
* ddma_chnl_id < DDMA_MAXZCPYCHNLS
* hio_mgr != Null
* Ensures:
*/
extern void io_ddzc_init_chnl_desc(struct io_mgr *hio_mgr, u32 zid);
/*
* ======== io_ddzc_clear_chnl_desc ========
* Purpose:
* Clear DSP ZC channel descriptor.
* Parameters:
* hio_mgr: Handle to a I/O manager.
* ch_id: ZC channel identifier.
* Returns:
* Requires:
* hio_mgr is valid
* ch_id < DDMA_MAXZCPYCHNLS
* Ensures:
*/
extern void io_ddzc_clear_chnl_desc(struct io_mgr *hio_mgr, u32 ch_id);
/*
* ======== io_ddzc_request_chnl ========
* Purpose:
* Request zero-copy channel transfer. Sets up SM descriptors and
* control fields in shared memory.
* Parameters:
* hio_mgr: Handle to a I/O manager.
* pchnl: Ptr to channel object
* chnl_packet_obj: Ptr to channel i/o request packet.
* Returns:
* Requires:
* pchnl != NULL
* pchnl->cio_reqs > 0
* chnl_packet_obj != NULL
* Ensures:
*/
extern void io_ddzc_request_chnl(struct io_mgr *hio_mgr,
struct chnl_object *pchnl,
struct chnl_irp *chnl_packet_obj,
u16 *mbx_val);
/*
* ======== io_sh_msetting ========
* Purpose:
@@ -254,25 +142,6 @@ extern int io_sh_msetting(struct io_mgr *hio_mgr, u8 desc, void *pargs);
/* Maximum channel bufsize that can be used. */
extern u32 io_buf_size(struct io_mgr *hio_mgr);
extern u32 io_read_value(struct bridge_dev_context *dev_ctxt, u32 dsp_addr);
extern void io_write_value(struct bridge_dev_context *dev_ctxt,
u32 dsp_addr, u32 value);
extern u32 io_read_value_long(struct bridge_dev_context *dev_ctxt,
u32 dsp_addr);
extern void io_write_value_long(struct bridge_dev_context *dev_ctxt,
u32 dsp_addr, u32 value);
extern void io_or_set_value(struct bridge_dev_context *dev_ctxt,
u32 dsp_addr, u32 value);
extern void io_and_set_value(struct bridge_dev_context *dev_ctxt,
u32 dsp_addr, u32 value);
extern void io_sm_init(void);
#ifdef CONFIG_TIDSPBRIDGE_BACKTRACE
/*
* ========print_dsp_trace_buffer ========

36
drivers/staging/tidspbridge/include/dspbridge/iodefs.h
View File

@@ -1,36 +0,0 @@
/*
* iodefs.h
*
* DSP-BIOS Bridge driver support functions for TI OMAP processors.
*
* System-wide channel objects and constants.
*
* Copyright (C) 2005-2006 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#ifndef IODEFS_
#define IODEFS_
#define IO_MAXIRQ 0xff /* Arbitrarily large number. */
/* IO Objects: */
struct io_mgr;
/* IO manager attributes: */
struct io_attrs {
u8 birq; /* Channel's I/O IRQ number. */
bool irq_shared; /* TRUE if the IRQ is shareable. */
u32 word_size; /* DSP Word size. */
u32 shm_base; /* Physical base address of shared memory. */
u32 usm_length; /* Size (in bytes) of shared memory. */
};
#endif /* IODEFS_ */

29
drivers/staging/tidspbridge/include/dspbridge/ldr.h
View File

@@ -1,29 +0,0 @@
/*
* ldr.h
*
* DSP-BIOS Bridge driver support functions for TI OMAP processors.
*
* Provide module loading services and symbol export services.
*
* Notes:
* This service is meant to be used by modules of the DSP/BIOS Bridge
* driver.
*
* Copyright (C) 2005-2006 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#ifndef LDR_
#define LDR_
/* Loader objects: */
struct ldr_module;
#endif /* LDR_ */

225
drivers/staging/tidspbridge/include/dspbridge/list.h
View File

@@ -1,225 +0,0 @@
/*
* list.h
*
* DSP-BIOS Bridge driver support functions for TI OMAP processors.
*
* Declarations of list management control structures and definitions
* of inline list management functions.
*
* Copyright (C) 2008 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#ifndef LIST_
#define LIST_
#include <dspbridge/host_os.h>
#include <linux/list.h>
#define LST_IS_EMPTY(l) list_empty(&(l)->head)
struct lst_list {
struct list_head head;
};
/*
* ======== lst_first ========
* Purpose:
* Returns a pointer to the first element of the list, or NULL if the list
* is empty.
* Parameters:
* lst: Pointer to list control structure.
* Returns:
* Pointer to first list element, or NULL.
* Requires:
* - LST initialized.
* - lst != NULL.
* Ensures:
*/
static inline struct list_head *lst_first(struct lst_list *lst)
{
if (lst && !list_empty(&lst->head))
return lst->head.next;
return NULL;
}
/*
* ======== lst_get_head ========
* Purpose:
* Pops the head off the list and returns a pointer to it.
* Details:
* If the list is empty, returns NULL.
* Else, removes the element at the head of the list, making the next
* element the head of the list.
* The head is removed by making the tail element of the list point its
* "next" pointer at the next element after the head, and by making the
* "prev" pointer of the next element after the head point at the tail
* element. So the next element after the head becomes the new head of
* the list.
* Parameters:
* lst: Pointer to list control structure of list whose head
* element is to be removed
* Returns:
* Pointer to element that was at the head of the list (success)
* NULL No elements in list
* Requires:
* - LST initialized.
* - lst != NULL.
* Ensures:
* Notes:
* Because the tail of the list points forward (its "next" pointer) to
* the head of the list, and the head of the list points backward (its
* "prev" pointer) to the tail of the list, this list is circular.
*/
static inline struct list_head *lst_get_head(struct lst_list *lst)
{
struct list_head *elem_list;
if (!lst || list_empty(&lst->head))
return NULL;
elem_list = lst->head.next;
lst->head.next = elem_list->next;
elem_list->next->prev = &lst->head;
return elem_list;
}
/*
* ======== lst_init_elem ========
* Purpose:
* Initializes a list element to default (cleared) values
* Details:
* Parameters:
* elem_list: Pointer to list element to be reset
* Returns:
* Requires:
* LST initialized.
* Ensures:
* Notes:
* This function must not be called to "reset" an element in the middle
* of a list chain -- that would break the chain.
*
*/
static inline void lst_init_elem(struct list_head *elem_list)
{
if (elem_list) {
elem_list->next = NULL;
elem_list->prev = NULL;
}
}
/*
* ======== lst_insert_before ========
* Purpose:
* Insert the element before the existing element.
* Parameters:
* lst: Pointer to list control structure.
* elem_list: Pointer to element in list to insert.
* elem_existing: Pointer to existing list element.
* Returns:
* Requires:
* - LST initialized.
* - lst != NULL.
* - elem_list != NULL.
* - elem_existing != NULL.
* Ensures:
*/
static inline void lst_insert_before(struct lst_list *lst,
struct list_head *elem_list,
struct list_head *elem_existing)
{
if (lst && elem_list && elem_existing)
list_add_tail(elem_list, elem_existing);
}
/*
* ======== lst_next ========
* Purpose:
* Returns a pointer to the next element of the list, or NULL if the next
* element is the head of the list or the list is empty.
* Parameters:
* lst: Pointer to list control structure.
* cur_elem: Pointer to element in list to remove.
* Returns:
* Pointer to list element, or NULL.
* Requires:
* - LST initialized.
* - lst != NULL.
* - cur_elem != NULL.
* Ensures:
*/
static inline struct list_head *lst_next(struct lst_list *lst,
struct list_head *cur_elem)
{
if (lst && !list_empty(&lst->head) && cur_elem &&
(cur_elem->next != &lst->head))
return cur_elem->next;
return NULL;
}
/*
* ======== lst_put_tail ========
* Purpose:
* Adds the specified element to the tail of the list
* Details:
* Sets new element's "prev" pointer to the address previously held by
* the head element's prev pointer. This is the previous tail member of
* the list.
* Sets the new head's prev pointer to the address of the element.
* Sets next pointer of the previous tail member of the list to point to
* the new element (rather than the head, which it had been pointing at).
* Sets new element's next pointer to the address of the head element.
* Sets head's prev pointer to the address of the new element.
* Parameters:
* lst: Pointer to list control structure to which *elem_list will be
* added
* elem_list: Pointer to list element to be added
* Returns:
* Void
* Requires:
* *elem_list and *lst must both exist.
* LST initialized.
* Ensures:
* Notes:
* Because the tail is always "just before" the head of the list (the
* tail's "next" pointer points at the head of the list, and the head's
* "prev" pointer points at the tail of the list), the list is circular.
*/
static inline void lst_put_tail(struct lst_list *lst,
struct list_head *elem_list)
{
if (lst && elem_list)
list_add_tail(elem_list, &lst->head);
}
/*
* ======== lst_remove_elem ========
* Purpose:
* Removes (unlinks) the given element from the list, if the list is not
* empty. Does not free the list element.
* Parameters:
* lst: Pointer to list control structure.
* cur_elem: Pointer to element in list to remove.
* Returns:
* Requires:
* - LST initialized.
* - lst != NULL.
* - cur_elem != NULL.
* Ensures:
*/
static inline void lst_remove_elem(struct lst_list *lst,
struct list_head *cur_elem)
{
if (lst && !list_empty(&lst->head) && cur_elem)
list_del_init(cur_elem);
}
#endif /* LIST_ */

40
drivers/staging/tidspbridge/include/dspbridge/mbx_sh.h
View File

@@ -110,13 +110,7 @@
#ifndef _MBX_SH_H
#define _MBX_SH_H
#define MBX_CLASS_MSK 0xFC00 /* Class bits are 10 thru 15 */
#define MBX_VALUE_MSK 0x03FF /* Value is 0 thru 9 */
#define MBX_DEH_CLASS 0x0000 /* DEH owns Mbx INTR */
#define MBX_DDMA_CLASS 0x0400 /* DSP-DMA link drvr chnls owns INTR */
#define MBX_PCPY_CLASS 0x0800 /* PROC-COPY " */
#define MBX_ZCPY_CLASS 0x1000 /* ZERO-COPY " */
#define MBX_PM_CLASS 0x2000 /* Power Management */
#define MBX_DBG_CLASS 0x4000 /* For debugging purpose */
@@ -128,55 +122,21 @@
#define MBX_DEH_USERS_BASE 0x100 /* 256 */
#define MBX_DEH_LIMIT 0x3FF /* 1023 */
#define MBX_DEH_RESET 0x101 /* DSP RESET (DEH) */
#define MBX_DEH_EMMU 0X103 /*DSP MMU FAULT RECOVERY */
/*
* Link driver command/status codes.
*/
/* DSP-DMA */
#define MBX_DDMA_NUMCHNLBITS 5 /* # chnl Id: # bits available */
#define MBX_DDMA_CHNLSHIFT 0 /* # of bits to shift */
#define MBX_DDMA_CHNLMSK 0x01F /* bits 0 thru 4 */
#define MBX_DDMA_NUMBUFBITS 5 /* buffer index: # of bits avail */
#define MBX_DDMA_BUFSHIFT (MBX_DDMA_NUMCHNLBITS + MBX_DDMA_CHNLSHIFT)
#define MBX_DDMA_BUFMSK 0x3E0 /* bits 5 thru 9 */
/* Zero-Copy */
#define MBX_ZCPY_NUMCHNLBITS 5 /* # chnl Id: # bits available */
#define MBX_ZCPY_CHNLSHIFT 0 /* # of bits to shift */
#define MBX_ZCPY_CHNLMSK 0x01F /* bits 0 thru 4 */
/* Power Management Commands */
#define MBX_PM_DSPIDLE (MBX_PM_CLASS + 0x0)
#define MBX_PM_DSPWAKEUP (MBX_PM_CLASS + 0x1)
#define MBX_PM_EMERGENCYSLEEP (MBX_PM_CLASS + 0x2)
#define MBX_PM_SLEEPUNTILRESTART (MBX_PM_CLASS + 0x3)
#define MBX_PM_DSPGLOBALIDLE_OFF (MBX_PM_CLASS + 0x4)
#define MBX_PM_DSPGLOBALIDLE_ON (MBX_PM_CLASS + 0x5)
#define MBX_PM_SETPOINT_PRENOTIFY (MBX_PM_CLASS + 0x6)
#define MBX_PM_SETPOINT_POSTNOTIFY (MBX_PM_CLASS + 0x7)
#define MBX_PM_DSPRETN (MBX_PM_CLASS + 0x8)
#define MBX_PM_DSPRETENTION (MBX_PM_CLASS + 0x8)
#define MBX_PM_DSPHIBERNATE (MBX_PM_CLASS + 0x9)
#define MBX_PM_HIBERNATE_EN (MBX_PM_CLASS + 0xA)
#define MBX_PM_OPP_REQ (MBX_PM_CLASS + 0xB)
#define MBX_PM_OPP_CHG (MBX_PM_CLASS + 0xC)
#define MBX_PM_TYPE_MASK 0x0300
#define MBX_PM_TYPE_PWR_CHNG 0x0100
#define MBX_PM_TYPE_OPP_PRECHNG 0x0200
#define MBX_PM_TYPE_OPP_POSTCHNG 0x0300
#define MBX_PM_TYPE_OPP_MASK 0x0300
#define MBX_PM_OPP_PRECHNG (MBX_PM_CLASS | MBX_PM_TYPE_OPP_PRECHNG)
/* DSP to MPU */
#define MBX_PM_OPP_CHNG(OPP) (MBX_PM_CLASS | MBX_PM_TYPE_OPP_PRECHNG | (OPP))
#define MBX_PM_RET (MBX_PM_CLASS | MBX_PM_TYPE_PWR_CHNG | 0x0006)
#define MBX_PM_HIB (MBX_PM_CLASS | MBX_PM_TYPE_PWR_CHNG | 0x0002)
#define MBX_PM_OPP1 0
#define MBX_PM_OPP2 1
#define MBX_PM_OPP3 2
#define MBX_PM_OPP4 3
/* Bridge Debug Commands */
#define MBX_DBG_SYSPRINTF (MBX_DBG_CLASS + 0x0)

4
drivers/staging/tidspbridge/include/dspbridge/mgrpriv.h
View File

@@ -28,8 +28,8 @@
struct mgr_object;
struct mgr_tlbentry {
u32 ul_dsp_virt; /* DSP virtual address */
u32 ul_gpp_phys; /* GPP physical address */
u32 dsp_virt; /* DSP virtual address */
u32 gpp_phys; /* GPP physical address */
};
/*

24
drivers/staging/tidspbridge/include/dspbridge/nldrdefs.h
View File

@@ -82,10 +82,10 @@ typedef u32(*nldr_writefxn) (void *priv_ref,
* Attributes passed to nldr_create function.
*/
struct nldr_attrs {
nldr_ovlyfxn pfn_ovly;
nldr_writefxn pfn_write;
u16 us_dsp_word_size;
u16 us_dsp_mau_size;
nldr_ovlyfxn ovly;
nldr_writefxn write;
u16 dsp_word_size;
u16 dsp_mau_size;
};
/*
@@ -280,14 +280,14 @@ typedef int(*nldr_unloadfxn) (struct nldr_nodeobject *nldr_node_obj,
* ======== node_ldr_fxns ========
*/
struct node_ldr_fxns {
nldr_allocatefxn pfn_allocate;
nldr_createfxn pfn_create;
nldr_deletefxn pfn_delete;
nldr_exitfxn pfn_exit;
nldr_getfxnaddrfxn pfn_get_fxn_addr;
nldr_initfxn pfn_init;
nldr_loadfxn pfn_load;
nldr_unloadfxn pfn_unload;
nldr_allocatefxn allocate;
nldr_createfxn create;
nldr_deletefxn delete;
nldr_exitfxn exit;
nldr_getfxnaddrfxn get_fxn_addr;
nldr_initfxn init;
nldr_loadfxn load;
nldr_unloadfxn unload;
};
#endif /* NLDRDEFS_ */

20
drivers/staging/tidspbridge/include/dspbridge/node.h
View File

@@ -22,7 +22,7 @@
#include <dspbridge/procpriv.h>
#include <dspbridge/nodedefs.h>
#include <dspbridge/dispdefs.h>
#include <dspbridge/disp.h>
#include <dspbridge/nldrdefs.h>
#include <dspbridge/drv.h>
@@ -112,24 +112,6 @@ extern int node_alloc_msg_buf(struct node_object *hnode,
*/
extern int node_change_priority(struct node_object *hnode, s32 prio);
/*
* ======== node_close_orphans ========
* Purpose:
* Delete all nodes whose owning processor is being destroyed.
* Parameters:
* hnode_mgr: Node manager object.
* proc: Handle to processor object being destroyed.
* Returns:
* 0: Success.
* -EPERM: Unable to delete all nodes belonging to proc.
* Requires:
* Valid hnode_mgr.
* proc != NULL.
* Ensures:
*/
extern int node_close_orphans(struct node_mgr *hnode_mgr,
struct proc_object *proc);
/*
* ======== node_connect ========
* Purpose:

10
drivers/staging/tidspbridge/include/dspbridge/nodepriv.h
View File

@@ -43,7 +43,7 @@ struct node_strmdef {
u32 buf_size; /* Size of buffers for SIO stream */
u32 num_bufs; /* max # of buffers in SIO stream at once */
u32 seg_id; /* Memory segment id to allocate buffers */
u32 utimeout; /* Timeout for blocking SIO calls */
u32 timeout; /* Timeout for blocking SIO calls */
u32 buf_alignment; /* Buffer alignment */
char *sz_device; /* Device name for stream */
};
@@ -55,14 +55,14 @@ struct node_taskargs {
u32 stack_size;
u32 sys_stack_size;
u32 stack_seg;
u32 udsp_heap_res_addr; /* DSP virtual heap address */
u32 udsp_heap_addr; /* DSP virtual heap address */
u32 dsp_heap_res_addr; /* DSP virtual heap address */
u32 dsp_heap_addr; /* DSP virtual heap address */
u32 heap_size; /* Heap size */
u32 ugpp_heap_addr; /* GPP virtual heap address */
u32 gpp_heap_addr; /* GPP virtual heap address */
u32 profile_id; /* Profile ID */
u32 num_inputs;
u32 num_outputs;
u32 ul_dais_arg; /* Address of iAlg object */
u32 dais_arg; /* Address of iAlg object */
struct node_strmdef *strm_in_def;
struct node_strmdef *strm_out_def;
};

8
drivers/staging/tidspbridge/include/dspbridge/pwr.h
View File

@@ -18,7 +18,13 @@
#define PWR_
#include <dspbridge/dbdefs.h>
#include <dspbridge/pwr_sh.h>
#include <dspbridge/mbx_sh.h>
/* valid sleep command codes that can be sent by GPP via mailbox: */
#define PWR_DEEPSLEEP MBX_PM_DSPIDLE
#define PWR_EMERGENCYDEEPSLEEP MBX_PM_EMERGENCYSLEEP
#define PWR_WAKEUP MBX_PM_DSPWAKEUP
/*
* ======== pwr_sleep_dsp ========

33
drivers/staging/tidspbridge/include/dspbridge/pwr_sh.h
View File

@@ -1,33 +0,0 @@
/*
* pwr_sh.h
*
* DSP-BIOS Bridge driver support functions for TI OMAP processors.
*
* Power Manager shared definitions (used on both GPP and DSP sides).
*
* Copyright (C) 2008 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#ifndef PWR_SH_
#define PWR_SH_
#include <dspbridge/mbx_sh.h>
/* valid sleep command codes that can be sent by GPP via mailbox: */
#define PWR_DEEPSLEEP MBX_PM_DSPIDLE
#define PWR_EMERGENCYDEEPSLEEP MBX_PM_EMERGENCYSLEEP
#define PWR_SLEEPUNTILRESTART MBX_PM_SLEEPUNTILRESTART
#define PWR_WAKEUP MBX_PM_DSPWAKEUP
#define PWR_AUTOENABLE MBX_PM_PWRENABLE
#define PWR_AUTODISABLE MBX_PM_PWRDISABLE
#define PWR_RETENTION MBX_PM_DSPRETN
#endif /* PWR_SH_ */

11
drivers/staging/tidspbridge/include/dspbridge/resourcecleanup.h
View File

@@ -17,23 +17,12 @@
#include <dspbridge/nodepriv.h>
#include <dspbridge/drv.h>
extern int drv_get_proc_ctxt_list(struct process_context **pctxt,
struct drv_object *hdrv_obj);
extern int drv_insert_proc_context(struct drv_object *driver_obj,
void *process_ctxt);
extern int drv_remove_all_dmm_res_elements(void *process_ctxt);
extern int drv_remove_all_node_res_elements(void *process_ctxt);
extern int drv_proc_set_pid(void *ctxt, s32 process);
extern int drv_remove_all_resources(void *process_ctxt);
extern int drv_remove_proc_context(struct drv_object *driver_obj,
void *pr_ctxt);
extern int drv_insert_node_res_element(void *hnode, void *node_resource,
void *process_ctxt);

9
drivers/staging/tidspbridge/include/dspbridge/rms_sh.h
View File

@@ -22,27 +22,18 @@
#include <dspbridge/rmstypes.h>
/* Node Types: */
#define RMS_TASK 1 /* Task node */
#define RMS_DAIS 2 /* xDAIS socket node */
#define RMS_MSG 3 /* Message node */
/* Memory Types: */
#define RMS_CODE 0 /* Program space */
#define RMS_DATA 1 /* Data space */
#define RMS_IO 2 /* I/O space */
/* RM Server Command and Response Buffer Sizes: */
#define RMS_COMMANDBUFSIZE 256 /* Size of command buffer */
#define RMS_RESPONSEBUFSIZE 16 /* Size of response buffer */
/* Pre-Defined Command/Response Codes: */
#define RMS_EXIT 0x80000000 /* GPP->Node: shutdown */
#define RMS_EXITACK 0x40000000 /* Node->GPP: ack shutdown */
#define RMS_BUFDESC 0x20000000 /* Arg1 SM buf, Arg2 SM size */
#define RMS_KILLTASK 0x10000000 /* GPP->Node: Kill Task */
#define RMS_USER 0x0 /* Start of user-defined msg codes */
#define RMS_MAXUSERCODES 0xfff /* Maximum user defined C/R Codes */
/* RM Server RPC Command Structure: */
struct rms_command {

62
drivers/staging/tidspbridge/include/dspbridge/strm.h
View File

@@ -141,25 +141,6 @@ extern int strm_free_buffer(struct strm_res_object *strmres,
u8 **ap_buffer, u32 num_bufs,
struct process_context *pr_ctxt);
/*
* ======== strm_get_event_handle ========
* Purpose:
* Get stream's user event handle. This function is used when closing
* a stream, so the event can be closed.
* Parameter:
* stream_obj: Stream handle returned from strm_open().
* ph_event: Location to store event handle on output.
* Returns:
* 0: Success.
* -EFAULT: Invalid stream_obj.
* Requires:
* strm_init(void) called.
* ph_event != NULL.
* Ensures:
*/
extern int strm_get_event_handle(struct strm_object *stream_obj,
void **ph_event);
/*
* ======== strm_get_info ========
* Purpose:
@@ -275,27 +256,6 @@ extern int strm_open(struct node_object *hnode, u32 dir,
struct strm_res_object **strmres,
struct process_context *pr_ctxt);
/*
* ======== strm_prepare_buffer ========
* Purpose:
* Prepare a data buffer not allocated by DSPStream_AllocateBuffers()
* for use with a stream.
* Parameter:
* stream_obj: Stream handle returned from strm_open().
* usize: Size (GPP bytes) of the buffer.
* pbuffer: Buffer address.
* Returns:
* 0: Success.
* -EFAULT: Invalid stream_obj.
* -EPERM: Failure occurred, unable to prepare buffer.
* Requires:
* strm_init(void) called.
* pbuffer != NULL.
* Ensures:
*/
extern int strm_prepare_buffer(struct strm_object *stream_obj,
u32 usize, u8 *pbuffer);
/*
* ======== strm_reclaim ========
* Purpose:
@@ -379,26 +339,4 @@ extern int strm_register_notify(struct strm_object *stream_obj,
extern int strm_select(struct strm_object **strm_tab,
u32 strms, u32 *pmask, u32 utimeout);
/*
* ======== strm_unprepare_buffer ========
* Purpose:
* Unprepare a data buffer that was previously prepared for a stream
* with DSPStream_PrepareBuffer(), and that will no longer be used with
* the stream.
* Parameter:
* stream_obj: Stream handle returned from strm_open().
* usize: Size (GPP bytes) of the buffer.
* pbuffer: Buffer address.
* Returns:
* 0: Success.
* -EFAULT: Invalid stream_obj.
* -EPERM: Failure occurred, unable to unprepare buffer.
* Requires:
* strm_init(void) called.
* pbuffer != NULL.
* Ensures:
*/
extern int strm_unprepare_buffer(struct strm_object *stream_obj,
u32 usize, u8 *pbuffer);
#endif /* STRM_ */

6
drivers/staging/tidspbridge/include/dspbridge/strmdefs.h
View File

@@ -19,18 +19,16 @@
#ifndef STRMDEFS_
#define STRMDEFS_
#define STRM_MAXEVTNAMELEN 32
struct strm_mgr;
struct strm_object;
struct strm_attr {
void *user_event;
char *pstr_event_name;
char *str_event_name;
void *virt_base; /* Process virtual base address of
* mapped SM */
u32 ul_virt_size; /* Size of virtual space in bytes */
u32 virt_size; /* Size of virtual space in bytes */
struct dsp_streamattrin *stream_attr_in;
};

14
drivers/staging/tidspbridge/include/dspbridge/sync.h
View File

@@ -20,6 +20,7 @@
#define _SYNC_H
#include <dspbridge/dbdefs.h>
#include <dspbridge/host_os.h>
/* Special timeout value indicating an infinite wait: */
@@ -80,13 +81,22 @@ void sync_set_event(struct sync_object *event);
* This functios will wait until @event is set or until timeout. In case of
* success the function will return 0 and
* in case of timeout the function will return -ETIME
* in case of signal the function will return -ERESTARTSYS
*/
static inline int sync_wait_on_event(struct sync_object *event,
unsigned timeout)
{
return wait_for_completion_timeout(&event->comp,
msecs_to_jiffies(timeout)) ? 0 : -ETIME;
int res;
res = wait_for_completion_interruptible_timeout(&event->comp,
msecs_to_jiffies(timeout));
if (!res)
res = -ETIME;
else if (res > 0)
res = 0;
return res;
}
/**

39
drivers/staging/tidspbridge/include/dspbridge/utildefs.h
View File

@@ -1,39 +0,0 @@
/*
* utildefs.h
*
* DSP-BIOS Bridge driver support functions for TI OMAP processors.
*
* Global UTIL constants and types, shared between DSP API and DSPSYS.
*
* Copyright (C) 2005-2006 Texas Instruments, Inc.
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#ifndef UTILDEFS_
#define UTILDEFS_
/* constants taken from configmg.h */
#define UTIL_MAXMEMREGS 9
#define UTIL_MAXIOPORTS 20
#define UTIL_MAXIRQS 7
#define UTIL_MAXDMACHNLS 7
/* misc. constants */
#define UTIL_MAXARGVS 10
/* Platform specific important info */
struct util_sysinfo {
/* Granularity of page protection; usually 1k or 4k */
u32 dw_page_size;
u32 dw_allocation_granularity; /* VM granularity, usually 64K */
u32 dw_number_of_processors; /* Used as sanity check */
};
#endif /* UTILDEFS_ */

4
drivers/staging/tidspbridge/pmgr/chnl.c
View File

@@ -87,7 +87,7 @@ int chnl_create(struct chnl_mgr **channel_mgr,
struct bridge_drv_interface *intf_fxns;
dev_get_intf_fxns(hdev_obj, &intf_fxns);
/* Let Bridge channel module finish the create: */
status = (*intf_fxns->pfn_chnl_create) (&hchnl_mgr, hdev_obj,
status = (*intf_fxns->chnl_create) (&hchnl_mgr, hdev_obj,
mgr_attrts);
if (!status) {
/* Fill in DSP API channel module's fields of the
@@ -120,7 +120,7 @@ int chnl_destroy(struct chnl_mgr *hchnl_mgr)
if (chnl_mgr_obj) {
intf_fxns = chnl_mgr_obj->intf_fxns;
/* Let Bridge channel module destroy the chnl_mgr: */
status = (*intf_fxns->pfn_chnl_destroy) (hchnl_mgr);
status = (*intf_fxns->chnl_destroy) (hchnl_mgr);
} else {
status = -EFAULT;
}

659
drivers/staging/tidspbridge/pmgr/cmm.c
View File

File diff suppressed because it is too large Load Diff

20
drivers/staging/tidspbridge/pmgr/cod.c
View File

@@ -33,9 +33,6 @@
/* ----------------------------------- Trace & Debug */
#include <dspbridge/dbc.h>
/* ----------------------------------- OS Adaptation Layer */
#include <dspbridge/ldr.h>
/* ----------------------------------- Platform Manager */
/* Include appropriate loader header file */
#include <dspbridge/dbll.h>
@@ -50,8 +47,7 @@ struct cod_manager {
struct dbll_tar_obj *target;
struct dbll_library_obj *base_lib;
bool loaded; /* Base library loaded? */
u32 ul_entry;
struct ldr_module *dll_obj;
u32 entry;
struct dbll_fxns fxns;
struct dbll_attrs attrs;
char sz_zl_file[COD_MAXPATHLENGTH];
@@ -78,12 +74,9 @@ static struct dbll_fxns ldr_fxns = {
(dbll_get_sect_fxn) dbll_get_sect,
(dbll_init_fxn) dbll_init,
(dbll_load_fxn) dbll_load,
(dbll_load_sect_fxn) dbll_load_sect,
(dbll_open_fxn) dbll_open,
(dbll_read_sect_fxn) dbll_read_sect,
(dbll_set_attrs_fxn) dbll_set_attrs,
(dbll_unload_fxn) dbll_unload,
(dbll_unload_sect_fxn) dbll_unload_sect,
};
static bool no_op(void);
@@ -209,8 +202,7 @@ void cod_close(struct cod_libraryobj *lib)
* dynamically loaded object files.
*
*/
int cod_create(struct cod_manager **mgr, char *str_zl_file,
const struct cod_attrs *attrs)
int cod_create(struct cod_manager **mgr, char *str_zl_file)
{
struct cod_manager *mgr_new;
struct dbll_attrs zl_attrs;
@@ -222,10 +214,6 @@ int cod_create(struct cod_manager **mgr, char *str_zl_file,
/* assume failure */
*mgr = NULL;
/* we don't support non-default attrs yet */
if (attrs != NULL)
return -ENOSYS;
mgr_new = kzalloc(sizeof(struct cod_manager), GFP_KERNEL);
if (mgr_new == NULL)
return -ENOMEM;
@@ -358,7 +346,7 @@ int cod_get_entry(struct cod_manager *cod_mgr_obj, u32 *entry_pt)
DBC_REQUIRE(cod_mgr_obj);
DBC_REQUIRE(entry_pt != NULL);
*entry_pt = cod_mgr_obj->ul_entry;
*entry_pt = cod_mgr_obj->entry;
return 0;
}
@@ -528,7 +516,7 @@ int cod_load_base(struct cod_manager *cod_mgr_obj, u32 num_argc, char *args[],
flags = DBLL_CODE | DBLL_DATA | DBLL_SYMB;
status = cod_mgr_obj->fxns.load_fxn(cod_mgr_obj->base_lib, flags,
&new_attrs,
&cod_mgr_obj->ul_entry);
&cod_mgr_obj->entry);
if (status)
cod_mgr_obj->fxns.close_fxn(cod_mgr_obj->base_lib);

53
drivers/staging/tidspbridge/pmgr/dbll.c
View File

@@ -123,7 +123,7 @@ struct dbll_library_obj {
u32 open_ref; /* Number of times opened */
u32 load_ref; /* Number of times loaded */
struct gh_t_hash_tab *sym_tab; /* Hash table of symbols */
u32 ul_pos;
u32 pos;
};
/*
@@ -398,7 +398,7 @@ int dbll_get_sect(struct dbll_library_obj *lib, char *name, u32 *paddr,
} else {
(*(zl_lib->target_obj->attrs.fseek)) (zl_lib->fp,
zl_lib->ul_pos,
zl_lib->pos,
SEEK_SET);
}
} else {
@@ -522,7 +522,7 @@ int dbll_load(struct dbll_library_obj *lib, dbll_flags flags,
}
if (!status) {
zl_lib->ul_pos = (*(zl_lib->target_obj->attrs.ftell))
zl_lib->pos = (*(zl_lib->target_obj->attrs.ftell))
(zl_lib->fp);
/* Reset file cursor */
(*(zl_lib->target_obj->attrs.fseek)) (zl_lib->fp,
@@ -567,18 +567,6 @@ int dbll_load(struct dbll_library_obj *lib, dbll_flags flags,
return status;
}
/*
* ======== dbll_load_sect ========
* Not supported for COFF.
*/
int dbll_load_sect(struct dbll_library_obj *zl_lib, char *sec_name,
struct dbll_attrs *attrs)
{
DBC_REQUIRE(zl_lib);
return -ENOSYS;
}
/*
* ======== dbll_open ========
*/
@@ -611,7 +599,7 @@ int dbll_open(struct dbll_tar_obj *target, char *file, dbll_flags flags,
if (zl_lib == NULL) {
status = -ENOMEM;
} else {
zl_lib->ul_pos = 0;
zl_lib->pos = 0;
/* Increment ref count to allow close on failure
* later on */
zl_lib->open_ref++;
@@ -661,7 +649,7 @@ int dbll_open(struct dbll_tar_obj *target, char *file, dbll_flags flags,
if (!status && zl_lib->fp == NULL)
status = dof_open(zl_lib);
zl_lib->ul_pos = (*(zl_lib->target_obj->attrs.ftell)) (zl_lib->fp);
zl_lib->pos = (*(zl_lib->target_obj->attrs.ftell)) (zl_lib->fp);
(*(zl_lib->target_obj->attrs.fseek)) (zl_lib->fp, (long)0, SEEK_SET);
/* Create a hash table for symbols if flag is set */
if (zl_lib->sym_tab != NULL || !(flags & DBLL_SYMB))
@@ -750,7 +738,7 @@ int dbll_read_sect(struct dbll_library_obj *lib, char *name,
} else {
(*(zl_lib->target_obj->attrs.fseek)) (zl_lib->fp,
zl_lib->ul_pos,
zl_lib->pos,
SEEK_SET);
}
} else {
@@ -793,22 +781,6 @@ int dbll_read_sect(struct dbll_library_obj *lib, char *name,
return status;
}
/*
* ======== dbll_set_attrs ========
* Set the attributes of the target.
*/
void dbll_set_attrs(struct dbll_tar_obj *target, struct dbll_attrs *pattrs)
{
struct dbll_tar_obj *zl_target = (struct dbll_tar_obj *)target;
DBC_REQUIRE(refs > 0);
DBC_REQUIRE(zl_target);
DBC_REQUIRE(pattrs != NULL);
if ((pattrs != NULL) && (zl_target != NULL))
zl_target->attrs = *pattrs;
}
/*
* ======== dbll_unload ========
*/
@@ -847,19 +819,6 @@ void dbll_unload(struct dbll_library_obj *lib, struct dbll_attrs *attrs)
DBC_ENSURE(zl_lib->load_ref >= 0);
}
/*
* ======== dbll_unload_sect ========
* Not supported for COFF.
*/
int dbll_unload_sect(struct dbll_library_obj *lib, char *sec_name,
struct dbll_attrs *attrs)
{
DBC_REQUIRE(refs > 0);
DBC_REQUIRE(sec_name != NULL);
return -ENOSYS;
}
/*
* ======== dof_close ========
*/

355
drivers/staging/tidspbridge/pmgr/dev.c
View File

@@ -16,6 +16,7 @@
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#include <linux/types.h>
#include <linux/list.h>
/* ----------------------------------- Host OS */
#include <dspbridge/host_os.h>
@@ -26,10 +27,6 @@
/* ----------------------------------- Trace & Debug */
#include <dspbridge/dbc.h>
/* ----------------------------------- OS Adaptation Layer */
#include <dspbridge/ldr.h>
#include <dspbridge/list.h>
/* ----------------------------------- Platform Manager */
#include <dspbridge/cod.h>
#include <dspbridge/drv.h>
@@ -60,28 +57,26 @@
/* The Bridge device object: */
struct dev_object {
/* LST requires "link" to be first field! */
struct list_head link; /* Link to next dev_object. */
u8 dev_type; /* Device Type */
struct cfg_devnode *dev_node_obj; /* Platform specific dev id */
/* Bridge Context Handle */
struct bridge_dev_context *hbridge_context;
struct bridge_dev_context *bridge_context;
/* Function interface to Bridge driver. */
struct bridge_drv_interface bridge_interface;
struct brd_object *lock_owner; /* Client with exclusive access. */
struct cod_manager *cod_mgr; /* Code manager handle. */
struct chnl_mgr *hchnl_mgr; /* Channel manager. */
struct deh_mgr *hdeh_mgr; /* DEH manager. */
struct msg_mgr *hmsg_mgr; /* Message manager. */
struct io_mgr *hio_mgr; /* IO manager (CHNL, msg_ctrl) */
struct cmm_object *hcmm_mgr; /* SM memory manager. */
struct chnl_mgr *chnl_mgr; /* Channel manager. */
struct deh_mgr *deh_mgr; /* DEH manager. */
struct msg_mgr *msg_mgr; /* Message manager. */
struct io_mgr *iomgr; /* IO manager (CHNL, msg_ctrl) */
struct cmm_object *cmm_mgr; /* SM memory manager. */
struct dmm_object *dmm_mgr; /* Dynamic memory manager. */
struct ldr_module *module_obj; /* Bridge Module handle. */
u32 word_size; /* DSP word size: quick access. */
struct drv_object *hdrv_obj; /* Driver Object */
struct lst_list *proc_list; /* List of Proceeosr attached to
* this device */
struct node_mgr *hnode_mgr;
struct drv_object *drv_obj; /* Driver Object */
/* List of Processors attached to this device */
struct list_head proc_list;
struct node_mgr *node_mgr;
};
struct drv_ext {
@@ -115,9 +110,9 @@ u32 dev_brd_write_fxn(void *arb, u32 dsp_add, void *host_buf,
DBC_REQUIRE(host_buf != NULL); /* Required of BrdWrite(). */
if (dev_obj) {
/* Require of BrdWrite() */
DBC_ASSERT(dev_obj->hbridge_context != NULL);
status = (*dev_obj->bridge_interface.pfn_brd_write) (
dev_obj->hbridge_context, host_buf,
DBC_ASSERT(dev_obj->bridge_context != NULL);
status = (*dev_obj->bridge_interface.brd_write) (
dev_obj->bridge_context, host_buf,
dsp_add, ul_num_bytes, mem_space);
/* Special case of getting the address only */
if (ul_num_bytes == 0)
@@ -140,7 +135,6 @@ int dev_create_device(struct dev_object **device_obj,
struct cfg_devnode *dev_node_obj)
{
struct cfg_hostres *host_res;
struct ldr_module *module_obj = NULL;
struct bridge_drv_interface *drv_fxns = NULL;
struct dev_object *dev_obj = NULL;
struct chnl_mgrattrs mgr_attrs;
@@ -180,13 +174,12 @@ int dev_create_device(struct dev_object **device_obj,
if (dev_obj) {
/* Fill out the rest of the Dev Object structure: */
dev_obj->dev_node_obj = dev_node_obj;
dev_obj->module_obj = module_obj;
dev_obj->cod_mgr = NULL;
dev_obj->hchnl_mgr = NULL;
dev_obj->hdeh_mgr = NULL;
dev_obj->chnl_mgr = NULL;
dev_obj->deh_mgr = NULL;
dev_obj->lock_owner = NULL;
dev_obj->word_size = DSPWORDSIZE;
dev_obj->hdrv_obj = hdrv_obj;
dev_obj->drv_obj = hdrv_obj;
dev_obj->dev_type = DSP_UNIT;
/* Store this Bridge's interface functions, based on its
* version. */
@@ -195,12 +188,12 @@ int dev_create_device(struct dev_object **device_obj,
/* Call fxn_dev_create() to get the Bridge's device
* context handle. */
status = (dev_obj->bridge_interface.pfn_dev_create)
(&dev_obj->hbridge_context, dev_obj,
status = (dev_obj->bridge_interface.dev_create)
(&dev_obj->bridge_context, dev_obj,
host_res);
/* Assert bridge_dev_create()'s ensure clause: */
DBC_ASSERT(status
|| (dev_obj->hbridge_context != NULL));
|| (dev_obj->bridge_context != NULL));
} else {
status = -ENOMEM;
}
@@ -220,54 +213,47 @@ int dev_create_device(struct dev_object **device_obj,
num_windows = host_res->num_mem_windows;
if (num_windows) {
/* Assume last memory window is for CHNL */
io_mgr_attrs.shm_base = host_res->dw_mem_base[1] +
host_res->dw_offset_for_monitor;
io_mgr_attrs.usm_length =
host_res->dw_mem_length[1] -
host_res->dw_offset_for_monitor;
io_mgr_attrs.shm_base = host_res->mem_base[1] +
host_res->offset_for_monitor;
io_mgr_attrs.sm_length =
host_res->mem_length[1] -
host_res->offset_for_monitor;
} else {
io_mgr_attrs.shm_base = 0;
io_mgr_attrs.usm_length = 0;
io_mgr_attrs.sm_length = 0;
pr_err("%s: No memory reserved for shared structures\n",
__func__);
}
status = chnl_create(&dev_obj->hchnl_mgr, dev_obj, &mgr_attrs);
status = chnl_create(&dev_obj->chnl_mgr, dev_obj, &mgr_attrs);
if (status == -ENOSYS) {
/* It's OK for a device not to have a channel
* manager: */
status = 0;
}
/* Create CMM mgr even if Msg Mgr not impl. */
status = cmm_create(&dev_obj->hcmm_mgr,
status = cmm_create(&dev_obj->cmm_mgr,
(struct dev_object *)dev_obj, NULL);
/* Only create IO manager if we have a channel manager */
if (!status && dev_obj->hchnl_mgr) {
status = io_create(&dev_obj->hio_mgr, dev_obj,
if (!status && dev_obj->chnl_mgr) {
status = io_create(&dev_obj->iomgr, dev_obj,
&io_mgr_attrs);
}
/* Only create DEH manager if we have an IO manager */
if (!status) {
/* Instantiate the DEH module */
status = bridge_deh_create(&dev_obj->hdeh_mgr, dev_obj);
status = bridge_deh_create(&dev_obj->deh_mgr, dev_obj);
}
/* Create DMM mgr . */
status = dmm_create(&dev_obj->dmm_mgr,
(struct dev_object *)dev_obj, NULL);
}
/* Add the new DEV_Object to the global list: */
if (!status) {
lst_init_elem(&dev_obj->link);
if (!status)
status = drv_insert_dev_object(hdrv_obj, dev_obj);
}
/* Create the Processor List */
if (!status) {
dev_obj->proc_list = kzalloc(sizeof(struct lst_list),
GFP_KERNEL);
if (!(dev_obj->proc_list))
status = -EPERM;
else
INIT_LIST_HEAD(&dev_obj->proc_list->head);
}
if (!status)
INIT_LIST_HEAD(&dev_obj->proc_list);
leave:
/* If all went well, return a handle to the dev object;
* else, cleanup and return NULL in the OUT parameter. */
@@ -275,7 +261,6 @@ int dev_create_device(struct dev_object **device_obj,
*device_obj = dev_obj;
} else {
if (dev_obj) {
kfree(dev_obj->proc_list);
if (dev_obj->cod_mgr)
cod_delete(dev_obj->cod_mgr);
if (dev_obj->dmm_mgr)
@@ -306,13 +291,13 @@ int dev_create2(struct dev_object *hdev_obj)
DBC_REQUIRE(hdev_obj);
/* There can be only one Node Manager per DEV object */
DBC_ASSERT(!dev_obj->hnode_mgr);
status = node_create_mgr(&dev_obj->hnode_mgr, hdev_obj);
DBC_ASSERT(!dev_obj->node_mgr);
status = node_create_mgr(&dev_obj->node_mgr, hdev_obj);
if (status)
dev_obj->hnode_mgr = NULL;
dev_obj->node_mgr = NULL;
DBC_ENSURE((!status && dev_obj->hnode_mgr != NULL)
|| (status && dev_obj->hnode_mgr == NULL));
DBC_ENSURE((!status && dev_obj->node_mgr != NULL)
|| (status && dev_obj->node_mgr == NULL));
return status;
}
@@ -329,15 +314,15 @@ int dev_destroy2(struct dev_object *hdev_obj)
DBC_REQUIRE(refs > 0);
DBC_REQUIRE(hdev_obj);
if (dev_obj->hnode_mgr) {
if (node_delete_mgr(dev_obj->hnode_mgr))
if (dev_obj->node_mgr) {
if (node_delete_mgr(dev_obj->node_mgr))
status = -EPERM;
else
dev_obj->hnode_mgr = NULL;
dev_obj->node_mgr = NULL;
}
DBC_ENSURE((!status && dev_obj->hnode_mgr == NULL) || status);
DBC_ENSURE((!status && dev_obj->node_mgr == NULL) || status);
return status;
}
@@ -360,33 +345,33 @@ int dev_destroy_device(struct dev_object *hdev_obj)
dev_obj->cod_mgr = NULL;
}
if (dev_obj->hnode_mgr) {
node_delete_mgr(dev_obj->hnode_mgr);
dev_obj->hnode_mgr = NULL;
if (dev_obj->node_mgr) {
node_delete_mgr(dev_obj->node_mgr);
dev_obj->node_mgr = NULL;
}
/* Free the io, channel, and message managers for this board: */
if (dev_obj->hio_mgr) {
io_destroy(dev_obj->hio_mgr);
dev_obj->hio_mgr = NULL;
if (dev_obj->iomgr) {
io_destroy(dev_obj->iomgr);
dev_obj->iomgr = NULL;
}
if (dev_obj->hchnl_mgr) {
chnl_destroy(dev_obj->hchnl_mgr);
dev_obj->hchnl_mgr = NULL;
if (dev_obj->chnl_mgr) {
chnl_destroy(dev_obj->chnl_mgr);
dev_obj->chnl_mgr = NULL;
}
if (dev_obj->hmsg_mgr) {
msg_delete(dev_obj->hmsg_mgr);
dev_obj->hmsg_mgr = NULL;
if (dev_obj->msg_mgr) {
msg_delete(dev_obj->msg_mgr);
dev_obj->msg_mgr = NULL;
}
if (dev_obj->hdeh_mgr) {
if (dev_obj->deh_mgr) {
/* Uninitialize DEH module. */
bridge_deh_destroy(dev_obj->hdeh_mgr);
dev_obj->hdeh_mgr = NULL;
bridge_deh_destroy(dev_obj->deh_mgr);
dev_obj->deh_mgr = NULL;
}
if (dev_obj->hcmm_mgr) {
cmm_destroy(dev_obj->hcmm_mgr, true);
dev_obj->hcmm_mgr = NULL;
if (dev_obj->cmm_mgr) {
cmm_destroy(dev_obj->cmm_mgr, true);
dev_obj->cmm_mgr = NULL;
}
if (dev_obj->dmm_mgr) {
@@ -396,18 +381,15 @@ int dev_destroy_device(struct dev_object *hdev_obj)
/* Call the driver's bridge_dev_destroy() function: */
/* Require of DevDestroy */
if (dev_obj->hbridge_context) {
status = (*dev_obj->bridge_interface.pfn_dev_destroy)
(dev_obj->hbridge_context);
dev_obj->hbridge_context = NULL;
if (dev_obj->bridge_context) {
status = (*dev_obj->bridge_interface.dev_destroy)
(dev_obj->bridge_context);
dev_obj->bridge_context = NULL;
} else
status = -EPERM;
if (!status) {
kfree(dev_obj->proc_list);
dev_obj->proc_list = NULL;
/* Remove this DEV_Object from the global list: */
drv_remove_dev_object(dev_obj->hdrv_obj, dev_obj);
drv_remove_dev_object(dev_obj->drv_obj, dev_obj);
/* Free The library * LDR_FreeModule
* (dev_obj->module_obj); */
/* Free this dev object: */
@@ -437,7 +419,7 @@ int dev_get_chnl_mgr(struct dev_object *hdev_obj,
DBC_REQUIRE(mgr != NULL);
if (hdev_obj) {
*mgr = dev_obj->hchnl_mgr;
*mgr = dev_obj->chnl_mgr;
} else {
*mgr = NULL;
status = -EFAULT;
@@ -463,7 +445,7 @@ int dev_get_cmm_mgr(struct dev_object *hdev_obj,
DBC_REQUIRE(mgr != NULL);
if (hdev_obj) {
*mgr = dev_obj->hcmm_mgr;
*mgr = dev_obj->cmm_mgr;
} else {
*mgr = NULL;
status = -EFAULT;
@@ -536,7 +518,7 @@ int dev_get_deh_mgr(struct dev_object *hdev_obj,
DBC_REQUIRE(deh_manager != NULL);
DBC_REQUIRE(hdev_obj);
if (hdev_obj) {
*deh_manager = hdev_obj->hdeh_mgr;
*deh_manager = hdev_obj->deh_mgr;
} else {
*deh_manager = NULL;
status = -EFAULT;
@@ -623,7 +605,7 @@ int dev_get_io_mgr(struct dev_object *hdev_obj,
DBC_REQUIRE(hdev_obj);
if (hdev_obj) {
*io_man = hdev_obj->hio_mgr;
*io_man = hdev_obj->iomgr;
} else {
*io_man = NULL;
status = -EFAULT;
@@ -660,7 +642,7 @@ void dev_get_msg_mgr(struct dev_object *hdev_obj, struct msg_mgr **msg_man)
DBC_REQUIRE(msg_man != NULL);
DBC_REQUIRE(hdev_obj);
*msg_man = hdev_obj->hmsg_mgr;
*msg_man = hdev_obj->msg_mgr;
}
/*
@@ -678,7 +660,7 @@ int dev_get_node_manager(struct dev_object *hdev_obj,
DBC_REQUIRE(node_man != NULL);
if (hdev_obj) {
*node_man = dev_obj->hnode_mgr;
*node_man = dev_obj->node_mgr;
} else {
*node_man = NULL;
status = -EFAULT;
@@ -728,7 +710,7 @@ int dev_get_bridge_context(struct dev_object *hdev_obj,
DBC_REQUIRE(phbridge_context != NULL);
if (hdev_obj) {
*phbridge_context = dev_obj->hbridge_context;
*phbridge_context = dev_obj->bridge_context;
} else {
*phbridge_context = NULL;
status = -EFAULT;
@@ -799,20 +781,18 @@ bool dev_init(void)
* Purpose:
* Notify all clients of this device of a change in device status.
*/
int dev_notify_clients(struct dev_object *hdev_obj, u32 ret)
int dev_notify_clients(struct dev_object *dev_obj, u32 ret)
{
int status = 0;
struct list_head *curr;
struct dev_object *dev_obj = hdev_obj;
void *proc_obj;
/*
* FIXME: this code needs struct proc_object to have a list_head
* at the begining. If not, this can go horribly wrong.
*/
list_for_each(curr, &dev_obj->proc_list)
proc_notify_clients((void *)curr, ret);
for (proc_obj = (void *)lst_first(dev_obj->proc_list);
proc_obj != NULL;
proc_obj = (void *)lst_next(dev_obj->proc_list,
(struct list_head *)proc_obj))
proc_notify_clients(proc_obj, (u32) ret);
return status;
return 0;
}
/*
@@ -864,11 +844,11 @@ int dev_set_chnl_mgr(struct dev_object *hdev_obj,
DBC_REQUIRE(refs > 0);
if (hdev_obj)
dev_obj->hchnl_mgr = hmgr;
dev_obj->chnl_mgr = hmgr;
else
status = -EFAULT;
DBC_ENSURE(status || (dev_obj->hchnl_mgr == hmgr));
DBC_ENSURE(status || (dev_obj->chnl_mgr == hmgr));
return status;
}
@@ -882,7 +862,7 @@ void dev_set_msg_mgr(struct dev_object *hdev_obj, struct msg_mgr *hmgr)
DBC_REQUIRE(refs > 0);
DBC_REQUIRE(hdev_obj);
hdev_obj->hmsg_mgr = hmgr;
hdev_obj->msg_mgr = hmgr;
}
/*
@@ -894,7 +874,7 @@ int dev_start_device(struct cfg_devnode *dev_node_obj)
{
struct dev_object *hdev_obj = NULL; /* handle to 'Bridge Device */
/* Bridge driver filename */
char bridge_file_name[CFG_MAXSEARCHPATHLEN] = "UMA";
char *bridge_file_name = "UMA";
int status;
struct mgr_object *hmgr_obj = NULL;
struct drv_data *drv_datap = dev_get_drvdata(bridge);
@@ -967,7 +947,7 @@ static int init_cod_mgr(struct dev_object *dev_obj)
DBC_REQUIRE(refs > 0);
DBC_REQUIRE(!dev_obj || (dev_obj->cod_mgr == NULL));
status = cod_create(&dev_obj->cod_mgr, sz_dummy_file, NULL);
status = cod_create(&dev_obj->cod_mgr, sz_dummy_file);
return status;
}
@@ -994,23 +974,23 @@ static int init_cod_mgr(struct dev_object *dev_obj)
int dev_insert_proc_object(struct dev_object *hdev_obj,
u32 proc_obj, bool *already_attached)
{
int status = 0;
struct dev_object *dev_obj = (struct dev_object *)hdev_obj;
DBC_REQUIRE(refs > 0);
DBC_REQUIRE(dev_obj);
DBC_REQUIRE(proc_obj != 0);
DBC_REQUIRE(dev_obj->proc_list != NULL);
DBC_REQUIRE(already_attached != NULL);
if (!LST_IS_EMPTY(dev_obj->proc_list))
if (!list_empty(&dev_obj->proc_list))
*already_attached = true;
/* Add DevObject to tail. */
lst_put_tail(dev_obj->proc_list, (struct list_head *)proc_obj);
/*
* FIXME: this code needs struct proc_object to have a list_head
* at the begining. If not, this can go horribly wrong.
*/
list_add_tail((struct list_head *)proc_obj, &dev_obj->proc_list);
DBC_ENSURE(!status && !LST_IS_EMPTY(dev_obj->proc_list));
return status;
return 0;
}
/*
@@ -1039,15 +1019,12 @@ int dev_remove_proc_object(struct dev_object *hdev_obj, u32 proc_obj)
DBC_REQUIRE(dev_obj);
DBC_REQUIRE(proc_obj != 0);
DBC_REQUIRE(dev_obj->proc_list != NULL);
DBC_REQUIRE(!LST_IS_EMPTY(dev_obj->proc_list));
DBC_REQUIRE(!list_empty(&dev_obj->proc_list));
/* Search list for dev_obj: */
for (cur_elem = lst_first(dev_obj->proc_list); cur_elem != NULL;
cur_elem = lst_next(dev_obj->proc_list, cur_elem)) {
/* If found, remove it. */
list_for_each(cur_elem, &dev_obj->proc_list) {
if ((u32) cur_elem == proc_obj) {
lst_remove_elem(dev_obj->proc_list, cur_elem);
list_del(cur_elem);
status = 0;
break;
}
@@ -1056,14 +1033,10 @@ int dev_remove_proc_object(struct dev_object *hdev_obj, u32 proc_obj)
return status;
}
int dev_get_dev_type(struct dev_object *device_obj, u8 *dev_type)
int dev_get_dev_type(struct dev_object *dev_obj, u8 *dev_type)
{
int status = 0;
struct dev_object *dev_obj = (struct dev_object *)device_obj;
*dev_type = dev_obj->dev_type;
return status;
return 0;
}
/*
@@ -1106,73 +1079,73 @@ static void store_interface_fxns(struct bridge_drv_interface *drv_fxns,
intf_fxns->brd_api_minor_version = drv_fxns->brd_api_minor_version;
/* Install functions up to DSP API version .80 (first alpha): */
if (bridge_version > 0) {
STORE_FXN(fxn_dev_create, pfn_dev_create);
STORE_FXN(fxn_dev_destroy, pfn_dev_destroy);
STORE_FXN(fxn_dev_ctrl, pfn_dev_cntrl);
STORE_FXN(fxn_brd_monitor, pfn_brd_monitor);
STORE_FXN(fxn_brd_start, pfn_brd_start);
STORE_FXN(fxn_brd_stop, pfn_brd_stop);
STORE_FXN(fxn_brd_status, pfn_brd_status);
STORE_FXN(fxn_brd_read, pfn_brd_read);
STORE_FXN(fxn_brd_write, pfn_brd_write);
STORE_FXN(fxn_brd_setstate, pfn_brd_set_state);
STORE_FXN(fxn_brd_memcopy, pfn_brd_mem_copy);
STORE_FXN(fxn_brd_memwrite, pfn_brd_mem_write);
STORE_FXN(fxn_brd_memmap, pfn_brd_mem_map);
STORE_FXN(fxn_brd_memunmap, pfn_brd_mem_un_map);
STORE_FXN(fxn_chnl_create, pfn_chnl_create);
STORE_FXN(fxn_chnl_destroy, pfn_chnl_destroy);
STORE_FXN(fxn_chnl_open, pfn_chnl_open);
STORE_FXN(fxn_chnl_close, pfn_chnl_close);
STORE_FXN(fxn_chnl_addioreq, pfn_chnl_add_io_req);
STORE_FXN(fxn_chnl_getioc, pfn_chnl_get_ioc);
STORE_FXN(fxn_chnl_cancelio, pfn_chnl_cancel_io);
STORE_FXN(fxn_chnl_flushio, pfn_chnl_flush_io);
STORE_FXN(fxn_chnl_getinfo, pfn_chnl_get_info);
STORE_FXN(fxn_chnl_getmgrinfo, pfn_chnl_get_mgr_info);
STORE_FXN(fxn_chnl_idle, pfn_chnl_idle);
STORE_FXN(fxn_chnl_registernotify, pfn_chnl_register_notify);
STORE_FXN(fxn_io_create, pfn_io_create);
STORE_FXN(fxn_io_destroy, pfn_io_destroy);
STORE_FXN(fxn_io_onloaded, pfn_io_on_loaded);
STORE_FXN(fxn_io_getprocload, pfn_io_get_proc_load);
STORE_FXN(fxn_msg_create, pfn_msg_create);
STORE_FXN(fxn_msg_createqueue, pfn_msg_create_queue);
STORE_FXN(fxn_msg_delete, pfn_msg_delete);
STORE_FXN(fxn_msg_deletequeue, pfn_msg_delete_queue);
STORE_FXN(fxn_msg_get, pfn_msg_get);
STORE_FXN(fxn_msg_put, pfn_msg_put);
STORE_FXN(fxn_msg_registernotify, pfn_msg_register_notify);
STORE_FXN(fxn_msg_setqueueid, pfn_msg_set_queue_id);
STORE_FXN(fxn_dev_create, dev_create);
STORE_FXN(fxn_dev_destroy, dev_destroy);
STORE_FXN(fxn_dev_ctrl, dev_cntrl);
STORE_FXN(fxn_brd_monitor, brd_monitor);
STORE_FXN(fxn_brd_start, brd_start);
STORE_FXN(fxn_brd_stop, brd_stop);
STORE_FXN(fxn_brd_status, brd_status);
STORE_FXN(fxn_brd_read, brd_read);
STORE_FXN(fxn_brd_write, brd_write);
STORE_FXN(fxn_brd_setstate, brd_set_state);
STORE_FXN(fxn_brd_memcopy, brd_mem_copy);
STORE_FXN(fxn_brd_memwrite, brd_mem_write);
STORE_FXN(fxn_brd_memmap, brd_mem_map);
STORE_FXN(fxn_brd_memunmap, brd_mem_un_map);
STORE_FXN(fxn_chnl_create, chnl_create);
STORE_FXN(fxn_chnl_destroy, chnl_destroy);
STORE_FXN(fxn_chnl_open, chnl_open);
STORE_FXN(fxn_chnl_close, chnl_close);
STORE_FXN(fxn_chnl_addioreq, chnl_add_io_req);
STORE_FXN(fxn_chnl_getioc, chnl_get_ioc);
STORE_FXN(fxn_chnl_cancelio, chnl_cancel_io);
STORE_FXN(fxn_chnl_flushio, chnl_flush_io);
STORE_FXN(fxn_chnl_getinfo, chnl_get_info);
STORE_FXN(fxn_chnl_getmgrinfo, chnl_get_mgr_info);
STORE_FXN(fxn_chnl_idle, chnl_idle);
STORE_FXN(fxn_chnl_registernotify, chnl_register_notify);
STORE_FXN(fxn_io_create, io_create);
STORE_FXN(fxn_io_destroy, io_destroy);
STORE_FXN(fxn_io_onloaded, io_on_loaded);
STORE_FXN(fxn_io_getprocload, io_get_proc_load);
STORE_FXN(fxn_msg_create, msg_create);
STORE_FXN(fxn_msg_createqueue, msg_create_queue);
STORE_FXN(fxn_msg_delete, msg_delete);
STORE_FXN(fxn_msg_deletequeue, msg_delete_queue);
STORE_FXN(fxn_msg_get, msg_get);
STORE_FXN(fxn_msg_put, msg_put);
STORE_FXN(fxn_msg_registernotify, msg_register_notify);
STORE_FXN(fxn_msg_setqueueid, msg_set_queue_id);
}
/* Add code for any additional functions in newerBridge versions here */
/* Ensure postcondition: */
DBC_ENSURE(intf_fxns->pfn_dev_create != NULL);
DBC_ENSURE(intf_fxns->pfn_dev_destroy != NULL);
DBC_ENSURE(intf_fxns->pfn_dev_cntrl != NULL);
DBC_ENSURE(intf_fxns->pfn_brd_monitor != NULL);
DBC_ENSURE(intf_fxns->pfn_brd_start != NULL);
DBC_ENSURE(intf_fxns->pfn_brd_stop != NULL);
DBC_ENSURE(intf_fxns->pfn_brd_status != NULL);
DBC_ENSURE(intf_fxns->pfn_brd_read != NULL);
DBC_ENSURE(intf_fxns->pfn_brd_write != NULL);
DBC_ENSURE(intf_fxns->pfn_chnl_create != NULL);
DBC_ENSURE(intf_fxns->pfn_chnl_destroy != NULL);
DBC_ENSURE(intf_fxns->pfn_chnl_open != NULL);
DBC_ENSURE(intf_fxns->pfn_chnl_close != NULL);
DBC_ENSURE(intf_fxns->pfn_chnl_add_io_req != NULL);
DBC_ENSURE(intf_fxns->pfn_chnl_get_ioc != NULL);
DBC_ENSURE(intf_fxns->pfn_chnl_cancel_io != NULL);
DBC_ENSURE(intf_fxns->pfn_chnl_flush_io != NULL);
DBC_ENSURE(intf_fxns->pfn_chnl_get_info != NULL);
DBC_ENSURE(intf_fxns->pfn_chnl_get_mgr_info != NULL);
DBC_ENSURE(intf_fxns->pfn_chnl_idle != NULL);
DBC_ENSURE(intf_fxns->pfn_chnl_register_notify != NULL);
DBC_ENSURE(intf_fxns->pfn_io_create != NULL);
DBC_ENSURE(intf_fxns->pfn_io_destroy != NULL);
DBC_ENSURE(intf_fxns->pfn_io_on_loaded != NULL);
DBC_ENSURE(intf_fxns->pfn_io_get_proc_load != NULL);
DBC_ENSURE(intf_fxns->pfn_msg_set_queue_id != NULL);
DBC_ENSURE(intf_fxns->dev_create != NULL);
DBC_ENSURE(intf_fxns->dev_destroy != NULL);
DBC_ENSURE(intf_fxns->dev_cntrl != NULL);
DBC_ENSURE(intf_fxns->brd_monitor != NULL);
DBC_ENSURE(intf_fxns->brd_start != NULL);
DBC_ENSURE(intf_fxns->brd_stop != NULL);
DBC_ENSURE(intf_fxns->brd_status != NULL);
DBC_ENSURE(intf_fxns->brd_read != NULL);
DBC_ENSURE(intf_fxns->brd_write != NULL);
DBC_ENSURE(intf_fxns->chnl_create != NULL);
DBC_ENSURE(intf_fxns->chnl_destroy != NULL);
DBC_ENSURE(intf_fxns->chnl_open != NULL);
DBC_ENSURE(intf_fxns->chnl_close != NULL);
DBC_ENSURE(intf_fxns->chnl_add_io_req != NULL);
DBC_ENSURE(intf_fxns->chnl_get_ioc != NULL);
DBC_ENSURE(intf_fxns->chnl_cancel_io != NULL);
DBC_ENSURE(intf_fxns->chnl_flush_io != NULL);
DBC_ENSURE(intf_fxns->chnl_get_info != NULL);
DBC_ENSURE(intf_fxns->chnl_get_mgr_info != NULL);
DBC_ENSURE(intf_fxns->chnl_idle != NULL);
DBC_ENSURE(intf_fxns->chnl_register_notify != NULL);
DBC_ENSURE(intf_fxns->io_create != NULL);
DBC_ENSURE(intf_fxns->io_destroy != NULL);
DBC_ENSURE(intf_fxns->io_on_loaded != NULL);
DBC_ENSURE(intf_fxns->io_get_proc_load != NULL);
DBC_ENSURE(intf_fxns->msg_set_queue_id != NULL);
#undef STORE_FXN
}

272
drivers/staging/tidspbridge/pmgr/dspapi.c
View File

@@ -68,7 +68,7 @@
/* Device IOCtl function pointer */
struct api_cmd {
u32(*fxn) (union trapped_args *args, void *pr_ctxt);
u32 dw_index;
u32 index;
};
/* ----------------------------------- Globals */
@@ -416,7 +416,7 @@ u32 mgrwrap_enum_node_info(union trapped_args *args, void *pr_ctxt)
u8 *pndb_props;
u32 num_nodes;
int status = 0;
u32 size = args->args_mgr_enumnode_info.undb_props_size;
u32 size = args->args_mgr_enumnode_info.ndb_props_size;
if (size < sizeof(struct dsp_ndbprops))
return -EINVAL;
@@ -431,9 +431,9 @@ u32 mgrwrap_enum_node_info(union trapped_args *args, void *pr_ctxt)
(struct dsp_ndbprops *)pndb_props, size,
&num_nodes);
}
CP_TO_USR(args->args_mgr_enumnode_info.pndb_props, pndb_props, status,
CP_TO_USR(args->args_mgr_enumnode_info.ndb_props, pndb_props, status,
size);
CP_TO_USR(args->args_mgr_enumnode_info.pu_num_nodes, &num_nodes, status,
CP_TO_USR(args->args_mgr_enumnode_info.num_nodes, &num_nodes, status,
1);
kfree(pndb_props);
@@ -466,7 +466,7 @@ u32 mgrwrap_enum_proc_info(union trapped_args *args, void *pr_ctxt)
}
CP_TO_USR(args->args_mgr_enumproc_info.processor_info, processor_info,
status, size);
CP_TO_USR(args->args_mgr_enumproc_info.pu_num_procs, &num_procs,
CP_TO_USR(args->args_mgr_enumproc_info.num_procs, &num_procs,
status, 1);
kfree(processor_info);
@@ -490,7 +490,7 @@ u32 mgrwrap_register_object(union trapped_args *args, void *pr_ctxt)
goto func_end;
/* path_size is increased by 1 to accommodate NULL */
path_size = strlen_user((char *)
args->args_mgr_registerobject.psz_path_name) +
args->args_mgr_registerobject.sz_path_name) +
1;
psz_path_name = kmalloc(path_size, GFP_KERNEL);
if (!psz_path_name) {
@@ -499,7 +499,7 @@ u32 mgrwrap_register_object(union trapped_args *args, void *pr_ctxt)
}
ret = strncpy_from_user(psz_path_name,
(char *)args->args_mgr_registerobject.
psz_path_name, path_size);
sz_path_name, path_size);
if (!ret) {
status = -EFAULT;
goto func_end;
@@ -569,9 +569,9 @@ u32 mgrwrap_wait_for_bridge_events(union trapped_args *args, void *pr_ctxt)
status = mgr_wait_for_bridge_events(anotifications, count,
&index,
args->args_mgr_wait.
utimeout);
timeout);
}
CP_TO_USR(args->args_mgr_wait.pu_index, &index, status, 1);
CP_TO_USR(args->args_mgr_wait.index, &index, status, 1);
return status;
}
@@ -617,10 +617,10 @@ u32 procwrap_attach(union trapped_args *args, void *pr_ctxt)
u32 procwrap_ctrl(union trapped_args *args, void *pr_ctxt)
{
u32 cb_data_size, __user * psize = (u32 __user *)
args->args_proc_ctrl.pargs;
args->args_proc_ctrl.args;
u8 *pargs = NULL;
int status = 0;
void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
void *hprocessor = ((struct process_context *)pr_ctxt)->processor;
if (psize) {
if (get_user(cb_data_size, psize)) {
@@ -634,16 +634,16 @@ u32 procwrap_ctrl(union trapped_args *args, void *pr_ctxt)
goto func_end;
}
CP_FM_USR(pargs, args->args_proc_ctrl.pargs, status,
CP_FM_USR(pargs, args->args_proc_ctrl.args, status,
cb_data_size);
}
if (!status) {
status = proc_ctrl(hprocessor,
args->args_proc_ctrl.dw_cmd,
args->args_proc_ctrl.cmd,
(struct dsp_cbdata *)pargs);
}
/* CP_TO_USR(args->args_proc_ctrl.pargs, pargs, status, 1); */
/* CP_TO_USR(args->args_proc_ctrl.args, pargs, status, 1); */
kfree(pargs);
func_end:
return status;
@@ -668,7 +668,7 @@ u32 procwrap_enum_node_info(union trapped_args *args, void *pr_ctxt)
void *node_tab[MAX_NODES];
u32 num_nodes;
u32 alloc_cnt;
void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
void *hprocessor = ((struct process_context *)pr_ctxt)->processor;
if (!args->args_proc_enumnode_info.node_tab_size)
return -EINVAL;
@@ -679,9 +679,9 @@ u32 procwrap_enum_node_info(union trapped_args *args, void *pr_ctxt)
&num_nodes, &alloc_cnt);
CP_TO_USR(args->args_proc_enumnode_info.node_tab, node_tab, status,
num_nodes);
CP_TO_USR(args->args_proc_enumnode_info.pu_num_nodes, &num_nodes,
CP_TO_USR(args->args_proc_enumnode_info.num_nodes, &num_nodes,
status, 1);
CP_TO_USR(args->args_proc_enumnode_info.pu_allocated, &alloc_cnt,
CP_TO_USR(args->args_proc_enumnode_info.allocated, &alloc_cnt,
status, 1);
return status;
}
@@ -694,8 +694,8 @@ u32 procwrap_end_dma(union trapped_args *args, void *pr_ctxt)
return -EINVAL;
status = proc_end_dma(pr_ctxt,
args->args_proc_dma.pmpu_addr,
args->args_proc_dma.ul_size,
args->args_proc_dma.mpu_addr,
args->args_proc_dma.size,
args->args_proc_dma.dir);
return status;
}
@@ -708,8 +708,8 @@ u32 procwrap_begin_dma(union trapped_args *args, void *pr_ctxt)
return -EINVAL;
status = proc_begin_dma(pr_ctxt,
args->args_proc_dma.pmpu_addr,
args->args_proc_dma.ul_size,
args->args_proc_dma.mpu_addr,
args->args_proc_dma.size,
args->args_proc_dma.dir);
return status;
}
@@ -721,14 +721,14 @@ u32 procwrap_flush_memory(union trapped_args *args, void *pr_ctxt)
{
int status;
if (args->args_proc_flushmemory.ul_flags >
if (args->args_proc_flushmemory.flags >
PROC_WRITEBACK_INVALIDATE_MEM)
return -EINVAL;
status = proc_flush_memory(pr_ctxt,
args->args_proc_flushmemory.pmpu_addr,
args->args_proc_flushmemory.ul_size,
args->args_proc_flushmemory.ul_flags);
args->args_proc_flushmemory.mpu_addr,
args->args_proc_flushmemory.size,
args->args_proc_flushmemory.flags);
return status;
}
@@ -741,8 +741,8 @@ u32 procwrap_invalidate_memory(union trapped_args *args, void *pr_ctxt)
status =
proc_invalidate_memory(pr_ctxt,
args->args_proc_invalidatememory.pmpu_addr,
args->args_proc_invalidatememory.ul_size);
args->args_proc_invalidatememory.mpu_addr,
args->args_proc_invalidatememory.size);
return status;
}
@@ -753,7 +753,7 @@ u32 procwrap_enum_resources(union trapped_args *args, void *pr_ctxt)
{
int status = 0;
struct dsp_resourceinfo resource_info;
void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
void *hprocessor = ((struct process_context *)pr_ctxt)->processor;
if (args->args_proc_enumresources.resource_info_size <
sizeof(struct dsp_resourceinfo))
@@ -780,7 +780,7 @@ u32 procwrap_get_state(union trapped_args *args, void *pr_ctxt)
{
int status;
struct dsp_processorstate proc_state;
void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
void *hprocessor = ((struct process_context *)pr_ctxt)->processor;
if (args->args_proc_getstate.state_info_size <
sizeof(struct dsp_processorstate))
@@ -801,7 +801,7 @@ u32 procwrap_get_trace(union trapped_args *args, void *pr_ctxt)
{
int status;
u8 *pbuf;
void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
void *hprocessor = ((struct process_context *)pr_ctxt)->processor;
if (args->args_proc_gettrace.max_size > MAX_TRACEBUFLEN)
return -EINVAL;
@@ -813,7 +813,7 @@ u32 procwrap_get_trace(union trapped_args *args, void *pr_ctxt)
} else {
status = -ENOMEM;
}
CP_TO_USR(args->args_proc_gettrace.pbuf, pbuf, status,
CP_TO_USR(args->args_proc_gettrace.buf, pbuf, status,
args->args_proc_gettrace.max_size);
kfree(pbuf);
@@ -830,7 +830,7 @@ u32 procwrap_load(union trapped_args *args, void *pr_ctxt)
char *temp;
s32 count = args->args_proc_load.argc_index;
u8 **argv = NULL, **envp = NULL;
void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
void *hprocessor = ((struct process_context *)pr_ctxt)->processor;
if (count <= 0 || count > MAX_LOADARGS) {
status = -EINVAL;
@@ -948,18 +948,18 @@ u32 procwrap_map(union trapped_args *args, void *pr_ctxt)
{
int status;
void *map_addr;
void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
void *hprocessor = ((struct process_context *)pr_ctxt)->processor;
if (!args->args_proc_mapmem.ul_size)
if (!args->args_proc_mapmem.size)
return -EINVAL;
status = proc_map(args->args_proc_mapmem.hprocessor,
args->args_proc_mapmem.pmpu_addr,
args->args_proc_mapmem.ul_size,
status = proc_map(args->args_proc_mapmem.processor,
args->args_proc_mapmem.mpu_addr,
args->args_proc_mapmem.size,
args->args_proc_mapmem.req_addr, &map_addr,
args->args_proc_mapmem.ul_map_attr, pr_ctxt);
args->args_proc_mapmem.map_attr, pr_ctxt);
if (!status) {
if (put_user(map_addr, args->args_proc_mapmem.pp_map_addr)) {
if (put_user(map_addr, args->args_proc_mapmem.map_addr)) {
status = -EINVAL;
proc_un_map(hprocessor, map_addr, pr_ctxt);
}
@@ -975,17 +975,17 @@ u32 procwrap_register_notify(union trapped_args *args, void *pr_ctxt)
{
int status;
struct dsp_notification notification;
void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
void *hprocessor = ((struct process_context *)pr_ctxt)->processor;
/* Initialize the notification data structure */
notification.ps_name = NULL;
notification.name = NULL;
notification.handle = NULL;
status = proc_register_notify(hprocessor,
args->args_proc_register_notify.event_mask,
args->args_proc_register_notify.notify_type,
&notification);
CP_TO_USR(args->args_proc_register_notify.hnotification, &notification,
CP_TO_USR(args->args_proc_register_notify.notification, &notification,
status, 1);
return status;
}
@@ -997,20 +997,20 @@ u32 procwrap_reserve_memory(union trapped_args *args, void *pr_ctxt)
{
int status;
void *prsv_addr;
void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
void *hprocessor = ((struct process_context *)pr_ctxt)->processor;
if ((args->args_proc_rsvmem.ul_size <= 0) ||
(args->args_proc_rsvmem.ul_size & (PG_SIZE4K - 1)) != 0)
if ((args->args_proc_rsvmem.size <= 0) ||
(args->args_proc_rsvmem.size & (PG_SIZE4K - 1)) != 0)
return -EINVAL;
status = proc_reserve_memory(hprocessor,
args->args_proc_rsvmem.ul_size, &prsv_addr,
args->args_proc_rsvmem.size, &prsv_addr,
pr_ctxt);
if (!status) {
if (put_user(prsv_addr, args->args_proc_rsvmem.pp_rsv_addr)) {
if (put_user(prsv_addr, args->args_proc_rsvmem.rsv_addr)) {
status = -EINVAL;
proc_un_reserve_memory(args->args_proc_rsvmem.
hprocessor, prsv_addr, pr_ctxt);
processor, prsv_addr, pr_ctxt);
}
}
return status;
@@ -1023,7 +1023,7 @@ u32 procwrap_start(union trapped_args *args, void *pr_ctxt)
{
u32 ret;
ret = proc_start(((struct process_context *)pr_ctxt)->hprocessor);
ret = proc_start(((struct process_context *)pr_ctxt)->processor);
return ret;
}
@@ -1034,7 +1034,7 @@ u32 procwrap_un_map(union trapped_args *args, void *pr_ctxt)
{
int status;
status = proc_un_map(((struct process_context *)pr_ctxt)->hprocessor,
status = proc_un_map(((struct process_context *)pr_ctxt)->processor,
args->args_proc_unmapmem.map_addr, pr_ctxt);
return status;
}
@@ -1045,10 +1045,10 @@ u32 procwrap_un_map(union trapped_args *args, void *pr_ctxt)
u32 procwrap_un_reserve_memory(union trapped_args *args, void *pr_ctxt)
{
int status;
void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
void *hprocessor = ((struct process_context *)pr_ctxt)->processor;
status = proc_un_reserve_memory(hprocessor,
args->args_proc_unrsvmem.prsv_addr,
args->args_proc_unrsvmem.rsv_addr,
pr_ctxt);
return status;
}
@@ -1060,7 +1060,7 @@ u32 procwrap_stop(union trapped_args *args, void *pr_ctxt)
{
u32 ret;
ret = proc_stop(((struct process_context *)pr_ctxt)->hprocessor);
ret = proc_stop(((struct process_context *)pr_ctxt)->processor);
return ret;
}
@@ -1087,12 +1087,12 @@ u32 nodewrap_allocate(union trapped_args *args, void *pr_ctxt)
int status = 0;
struct dsp_uuid node_uuid;
u32 cb_data_size = 0;
u32 __user *psize = (u32 __user *) args->args_node_allocate.pargs;
u32 __user *psize = (u32 __user *) args->args_node_allocate.args;
u8 *pargs = NULL;
struct dsp_nodeattrin proc_attr_in, *attr_in = NULL;
struct node_res_object *node_res;
int nodeid;
void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
void *hprocessor = ((struct process_context *)pr_ctxt)->processor;
/* Optional argument */
if (psize) {
@@ -1106,7 +1106,7 @@ u32 nodewrap_allocate(union trapped_args *args, void *pr_ctxt)
status = -ENOMEM;
}
CP_FM_USR(pargs, args->args_node_allocate.pargs, status,
CP_FM_USR(pargs, args->args_node_allocate.args, status,
cb_data_size);
}
CP_FM_USR(&node_uuid, args->args_node_allocate.node_id_ptr, status, 1);
@@ -1129,7 +1129,7 @@ u32 nodewrap_allocate(union trapped_args *args, void *pr_ctxt)
}
if (!status) {
nodeid = node_res->id + 1;
CP_TO_USR(args->args_node_allocate.ph_node, &nodeid,
CP_TO_USR(args->args_node_allocate.node, &nodeid,
status, 1);
if (status) {
status = -EFAULT;
@@ -1154,28 +1154,28 @@ u32 nodewrap_alloc_msg_buf(union trapped_args *args, void *pr_ctxt)
struct node_res_object *node_res;
find_node_handle(&node_res, pr_ctxt,
args->args_node_allocmsgbuf.hnode);
args->args_node_allocmsgbuf.node);
if (!node_res)
return -EFAULT;
if (!args->args_node_allocmsgbuf.usize)
if (!args->args_node_allocmsgbuf.size)
return -EINVAL;
if (args->args_node_allocmsgbuf.pattr) { /* Optional argument */
CP_FM_USR(&attr, args->args_node_allocmsgbuf.pattr, status, 1);
if (args->args_node_allocmsgbuf.attr) { /* Optional argument */
CP_FM_USR(&attr, args->args_node_allocmsgbuf.attr, status, 1);
if (!status)
pattr = &attr;
}
/* argument */
CP_FM_USR(&pbuffer, args->args_node_allocmsgbuf.pbuffer, status, 1);
CP_FM_USR(&pbuffer, args->args_node_allocmsgbuf.buffer, status, 1);
if (!status) {
status = node_alloc_msg_buf(node_res->hnode,
args->args_node_allocmsgbuf.usize,
status = node_alloc_msg_buf(node_res->node,
args->args_node_allocmsgbuf.size,
pattr, &pbuffer);
}
CP_TO_USR(args->args_node_allocmsgbuf.pbuffer, &pbuffer, status, 1);
CP_TO_USR(args->args_node_allocmsgbuf.buffer, &pbuffer, status, 1);
return status;
}
@@ -1188,12 +1188,12 @@ u32 nodewrap_change_priority(union trapped_args *args, void *pr_ctxt)
struct node_res_object *node_res;
find_node_handle(&node_res, pr_ctxt,
args->args_node_changepriority.hnode);
args->args_node_changepriority.node);
if (!node_res)
return -EFAULT;
ret = node_change_priority(node_res->hnode,
ret = node_change_priority(node_res->node,
args->args_node_changepriority.prio);
return ret;
@@ -1213,20 +1213,20 @@ u32 nodewrap_connect(union trapped_args *args, void *pr_ctxt)
struct node_res_object *node_res1, *node_res2;
struct node_object *node1 = NULL, *node2 = NULL;
if ((int)args->args_node_connect.hnode != DSP_HGPPNODE) {
if ((int)args->args_node_connect.node != DSP_HGPPNODE) {
find_node_handle(&node_res1, pr_ctxt,
args->args_node_connect.hnode);
args->args_node_connect.node);
if (node_res1)
node1 = node_res1->hnode;
node1 = node_res1->node;
} else {
node1 = args->args_node_connect.hnode;
node1 = args->args_node_connect.node;
}
if ((int)args->args_node_connect.other_node != DSP_HGPPNODE) {
find_node_handle(&node_res2, pr_ctxt,
args->args_node_connect.other_node);
if (node_res2)
node2 = node_res2->hnode;
node2 = node_res2->node;
} else {
node2 = args->args_node_connect.other_node;
}
@@ -1253,8 +1253,8 @@ u32 nodewrap_connect(union trapped_args *args, void *pr_ctxt)
if (status)
goto func_cont;
}
if (args->args_node_connect.pattrs) { /* Optional argument */
CP_FM_USR(&attrs, args->args_node_connect.pattrs, status, 1);
if (args->args_node_connect.attrs) { /* Optional argument */
CP_FM_USR(&attrs, args->args_node_connect.attrs, status, 1);
if (!status)
pattrs = &attrs;
@@ -1280,12 +1280,12 @@ u32 nodewrap_create(union trapped_args *args, void *pr_ctxt)
u32 ret;
struct node_res_object *node_res;
find_node_handle(&node_res, pr_ctxt, args->args_node_create.hnode);
find_node_handle(&node_res, pr_ctxt, args->args_node_create.node);
if (!node_res)
return -EFAULT;
ret = node_create(node_res->hnode);
ret = node_create(node_res->node);
return ret;
}
@@ -1298,7 +1298,7 @@ u32 nodewrap_delete(union trapped_args *args, void *pr_ctxt)
u32 ret;
struct node_res_object *node_res;
find_node_handle(&node_res, pr_ctxt, args->args_node_delete.hnode);
find_node_handle(&node_res, pr_ctxt, args->args_node_delete.node);
if (!node_res)
return -EFAULT;
@@ -1318,24 +1318,24 @@ u32 nodewrap_free_msg_buf(union trapped_args *args, void *pr_ctxt)
struct dsp_bufferattr attr;
struct node_res_object *node_res;
find_node_handle(&node_res, pr_ctxt, args->args_node_freemsgbuf.hnode);
find_node_handle(&node_res, pr_ctxt, args->args_node_freemsgbuf.node);
if (!node_res)
return -EFAULT;
if (args->args_node_freemsgbuf.pattr) { /* Optional argument */
CP_FM_USR(&attr, args->args_node_freemsgbuf.pattr, status, 1);
if (args->args_node_freemsgbuf.attr) { /* Optional argument */
CP_FM_USR(&attr, args->args_node_freemsgbuf.attr, status, 1);
if (!status)
pattr = &attr;
}
if (!args->args_node_freemsgbuf.pbuffer)
if (!args->args_node_freemsgbuf.buffer)
return -EFAULT;
if (!status) {
status = node_free_msg_buf(node_res->hnode,
args->args_node_freemsgbuf.pbuffer,
status = node_free_msg_buf(node_res->node,
args->args_node_freemsgbuf.buffer,
pattr);
}
@@ -1351,14 +1351,14 @@ u32 nodewrap_get_attr(union trapped_args *args, void *pr_ctxt)
struct dsp_nodeattr attr;
struct node_res_object *node_res;
find_node_handle(&node_res, pr_ctxt, args->args_node_getattr.hnode);
find_node_handle(&node_res, pr_ctxt, args->args_node_getattr.node);
if (!node_res)
return -EFAULT;
status = node_get_attr(node_res->hnode, &attr,
status = node_get_attr(node_res->node, &attr,
args->args_node_getattr.attr_size);
CP_TO_USR(args->args_node_getattr.pattr, &attr, status, 1);
CP_TO_USR(args->args_node_getattr.attr, &attr, status, 1);
return status;
}
@@ -1372,13 +1372,13 @@ u32 nodewrap_get_message(union trapped_args *args, void *pr_ctxt)
struct dsp_msg msg;
struct node_res_object *node_res;
find_node_handle(&node_res, pr_ctxt, args->args_node_getmessage.hnode);
find_node_handle(&node_res, pr_ctxt, args->args_node_getmessage.node);
if (!node_res)
return -EFAULT;
status = node_get_message(node_res->hnode, &msg,
args->args_node_getmessage.utimeout);
status = node_get_message(node_res->node, &msg,
args->args_node_getmessage.timeout);
CP_TO_USR(args->args_node_getmessage.message, &msg, status, 1);
@@ -1393,12 +1393,12 @@ u32 nodewrap_pause(union trapped_args *args, void *pr_ctxt)
u32 ret;
struct node_res_object *node_res;
find_node_handle(&node_res, pr_ctxt, args->args_node_pause.hnode);
find_node_handle(&node_res, pr_ctxt, args->args_node_pause.node);
if (!node_res)
return -EFAULT;
ret = node_pause(node_res->hnode);
ret = node_pause(node_res->node);
return ret;
}
@@ -1412,7 +1412,7 @@ u32 nodewrap_put_message(union trapped_args *args, void *pr_ctxt)
struct dsp_msg msg;
struct node_res_object *node_res;
find_node_handle(&node_res, pr_ctxt, args->args_node_putmessage.hnode);
find_node_handle(&node_res, pr_ctxt, args->args_node_putmessage.node);
if (!node_res)
return -EFAULT;
@@ -1421,8 +1421,8 @@ u32 nodewrap_put_message(union trapped_args *args, void *pr_ctxt)
if (!status) {
status =
node_put_message(node_res->hnode, &msg,
args->args_node_putmessage.utimeout);
node_put_message(node_res->node, &msg,
args->args_node_putmessage.timeout);
}
return status;
@@ -1438,25 +1438,25 @@ u32 nodewrap_register_notify(union trapped_args *args, void *pr_ctxt)
struct node_res_object *node_res;
find_node_handle(&node_res, pr_ctxt,
args->args_node_registernotify.hnode);
args->args_node_registernotify.node);
if (!node_res)
return -EFAULT;
/* Initialize the notification data structure */
notification.ps_name = NULL;
notification.name = NULL;
notification.handle = NULL;
if (!args->args_proc_register_notify.event_mask)
CP_FM_USR(&notification,
args->args_proc_register_notify.hnotification,
args->args_proc_register_notify.notification,
status, 1);
status = node_register_notify(node_res->hnode,
status = node_register_notify(node_res->node,
args->args_node_registernotify.event_mask,
args->args_node_registernotify.
notify_type, &notification);
CP_TO_USR(args->args_node_registernotify.hnotification, &notification,
CP_TO_USR(args->args_node_registernotify.notification, &notification,
status, 1);
return status;
}
@@ -1469,12 +1469,12 @@ u32 nodewrap_run(union trapped_args *args, void *pr_ctxt)
u32 ret;
struct node_res_object *node_res;
find_node_handle(&node_res, pr_ctxt, args->args_node_run.hnode);
find_node_handle(&node_res, pr_ctxt, args->args_node_run.node);
if (!node_res)
return -EFAULT;
ret = node_run(node_res->hnode);
ret = node_run(node_res->node);
return ret;
}
@@ -1488,14 +1488,14 @@ u32 nodewrap_terminate(union trapped_args *args, void *pr_ctxt)
int tempstatus;
struct node_res_object *node_res;
find_node_handle(&node_res, pr_ctxt, args->args_node_terminate.hnode);
find_node_handle(&node_res, pr_ctxt, args->args_node_terminate.node);
if (!node_res)
return -EFAULT;
status = node_terminate(node_res->hnode, &tempstatus);
status = node_terminate(node_res->node, &tempstatus);
CP_TO_USR(args->args_node_terminate.pstatus, &tempstatus, status, 1);
CP_TO_USR(args->args_node_terminate.status, &tempstatus, status, 1);
return status;
}
@@ -1508,7 +1508,7 @@ u32 nodewrap_get_uuid_props(union trapped_args *args, void *pr_ctxt)
int status = 0;
struct dsp_uuid node_uuid;
struct dsp_ndbprops *pnode_props = NULL;
void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
void *hprocessor = ((struct process_context *)pr_ctxt)->processor;
CP_FM_USR(&node_uuid, args->args_node_getuuidprops.node_id_ptr, status,
1);
@@ -1551,7 +1551,7 @@ u32 strmwrap_allocate_buffer(union trapped_args *args, void *pr_ctxt)
struct strm_res_object *strm_res;
find_strm_handle(&strm_res, pr_ctxt,
args->args_strm_allocatebuffer.hstream);
args->args_strm_allocatebuffer.stream);
if (!strm_res)
return -EFAULT;
@@ -1564,7 +1564,7 @@ u32 strmwrap_allocate_buffer(union trapped_args *args, void *pr_ctxt)
return -ENOMEM;
status = strm_allocate_buffer(strm_res,
args->args_strm_allocatebuffer.usize,
args->args_strm_allocatebuffer.size,
ap_buffer, num_bufs, pr_ctxt);
if (!status) {
CP_TO_USR(args->args_strm_allocatebuffer.ap_buffer, ap_buffer,
@@ -1587,7 +1587,7 @@ u32 strmwrap_close(union trapped_args *args, void *pr_ctxt)
{
struct strm_res_object *strm_res;
find_strm_handle(&strm_res, pr_ctxt, args->args_strm_close.hstream);
find_strm_handle(&strm_res, pr_ctxt, args->args_strm_close.stream);
if (!strm_res)
return -EFAULT;
@@ -1606,7 +1606,7 @@ u32 strmwrap_free_buffer(union trapped_args *args, void *pr_ctxt)
struct strm_res_object *strm_res;
find_strm_handle(&strm_res, pr_ctxt,
args->args_strm_freebuffer.hstream);
args->args_strm_freebuffer.stream);
if (!strm_res)
return -EFAULT;
@@ -1654,7 +1654,7 @@ u32 strmwrap_get_info(union trapped_args *args, void *pr_ctxt)
struct strm_res_object *strm_res;
find_strm_handle(&strm_res, pr_ctxt,
args->args_strm_getinfo.hstream);
args->args_strm_getinfo.stream);
if (!strm_res)
return -EFAULT;
@@ -1665,7 +1665,7 @@ u32 strmwrap_get_info(union trapped_args *args, void *pr_ctxt)
strm_info.user_strm = &user;
if (!status) {
status = strm_get_info(strm_res->hstream,
status = strm_get_info(strm_res->stream,
&strm_info,
args->args_strm_getinfo.
stream_info_size);
@@ -1684,12 +1684,12 @@ u32 strmwrap_idle(union trapped_args *args, void *pr_ctxt)
u32 ret;
struct strm_res_object *strm_res;
find_strm_handle(&strm_res, pr_ctxt, args->args_strm_idle.hstream);
find_strm_handle(&strm_res, pr_ctxt, args->args_strm_idle.stream);
if (!strm_res)
return -EFAULT;
ret = strm_idle(strm_res->hstream, args->args_strm_idle.flush_flag);
ret = strm_idle(strm_res->stream, args->args_strm_idle.flush_flag);
return ret;
}
@@ -1702,22 +1702,22 @@ u32 strmwrap_issue(union trapped_args *args, void *pr_ctxt)
int status = 0;
struct strm_res_object *strm_res;
find_strm_handle(&strm_res, pr_ctxt, args->args_strm_issue.hstream);
find_strm_handle(&strm_res, pr_ctxt, args->args_strm_issue.stream);
if (!strm_res)
return -EFAULT;
if (!args->args_strm_issue.pbuffer)
if (!args->args_strm_issue.buffer)
return -EFAULT;
/* No need of doing CP_FM_USR for the user buffer (pbuffer)
as this is done in Bridge internal function bridge_chnl_add_io_req
in chnl_sm.c */
status = strm_issue(strm_res->hstream,
args->args_strm_issue.pbuffer,
args->args_strm_issue.dw_bytes,
args->args_strm_issue.dw_buf_size,
args->args_strm_issue.dw_arg);
status = strm_issue(strm_res->stream,
args->args_strm_issue.buffer,
args->args_strm_issue.bytes,
args->args_strm_issue.buf_size,
args->args_strm_issue.arg);
return status;
}
@@ -1734,7 +1734,7 @@ u32 strmwrap_open(union trapped_args *args, void *pr_ctxt)
struct node_res_object *node_res;
int strmid;
find_node_handle(&node_res, pr_ctxt, args->args_strm_open.hnode);
find_node_handle(&node_res, pr_ctxt, args->args_strm_open.node);
if (!node_res)
return -EFAULT;
@@ -1750,13 +1750,13 @@ u32 strmwrap_open(union trapped_args *args, void *pr_ctxt)
}
}
status = strm_open(node_res->hnode,
status = strm_open(node_res->node,
args->args_strm_open.direction,
args->args_strm_open.index, &attr, &strm_res_obj,
pr_ctxt);
if (!status) {
strmid = strm_res_obj->id + 1;
CP_TO_USR(args->args_strm_open.ph_stream, &strmid, status, 1);
CP_TO_USR(args->args_strm_open.stream, &strmid, status, 1);
}
return status;
}
@@ -1773,16 +1773,16 @@ u32 strmwrap_reclaim(union trapped_args *args, void *pr_ctxt)
u32 ul_buf_size;
struct strm_res_object *strm_res;
find_strm_handle(&strm_res, pr_ctxt, args->args_strm_reclaim.hstream);
find_strm_handle(&strm_res, pr_ctxt, args->args_strm_reclaim.stream);
if (!strm_res)
return -EFAULT;
status = strm_reclaim(strm_res->hstream, &buf_ptr,
status = strm_reclaim(strm_res->stream, &buf_ptr,
&ul_bytes, &ul_buf_size, &dw_arg);
CP_TO_USR(args->args_strm_reclaim.buf_ptr, &buf_ptr, status, 1);
CP_TO_USR(args->args_strm_reclaim.bytes, &ul_bytes, status, 1);
CP_TO_USR(args->args_strm_reclaim.pdw_arg, &dw_arg, status, 1);
CP_TO_USR(args->args_strm_reclaim.arg, &dw_arg, status, 1);
if (args->args_strm_reclaim.buf_size_ptr != NULL) {
CP_TO_USR(args->args_strm_reclaim.buf_size_ptr, &ul_buf_size,
@@ -1802,20 +1802,20 @@ u32 strmwrap_register_notify(union trapped_args *args, void *pr_ctxt)
struct strm_res_object *strm_res;
find_strm_handle(&strm_res, pr_ctxt,
args->args_strm_registernotify.hstream);
args->args_strm_registernotify.stream);
if (!strm_res)
return -EFAULT;
/* Initialize the notification data structure */
notification.ps_name = NULL;
notification.name = NULL;
notification.handle = NULL;
status = strm_register_notify(strm_res->hstream,
status = strm_register_notify(strm_res->stream,
args->args_strm_registernotify.event_mask,
args->args_strm_registernotify.
notify_type, &notification);
CP_TO_USR(args->args_strm_registernotify.hnotification, &notification,
CP_TO_USR(args->args_strm_registernotify.notification, &notification,
status, 1);
return status;
@@ -1848,14 +1848,14 @@ u32 strmwrap_select(union trapped_args *args, void *pr_ctxt)
if (!strm_res)
return -EFAULT;
strm_tab[i] = strm_res->hstream;
strm_tab[i] = strm_res->stream;
}
if (!status) {
status = strm_select(strm_tab, args->args_strm_select.strm_num,
&mask, args->args_strm_select.utimeout);
&mask, args->args_strm_select.timeout);
}
CP_TO_USR(args->args_strm_select.pmask, &mask, status, 1);
CP_TO_USR(args->args_strm_select.mask, &mask, status, 1);
return status;
}
@@ -1888,11 +1888,11 @@ u32 cmmwrap_get_handle(union trapped_args *args, void *pr_ctxt)
{
int status = 0;
struct cmm_object *hcmm_mgr;
void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
void *hprocessor = ((struct process_context *)pr_ctxt)->processor;
status = cmm_get_handle(hprocessor, &hcmm_mgr);
CP_TO_USR(args->args_cmm_gethandle.ph_cmm_mgr, &hcmm_mgr, status, 1);
CP_TO_USR(args->args_cmm_gethandle.cmm_mgr, &hcmm_mgr, status, 1);
return status;
}
@@ -1905,7 +1905,7 @@ u32 cmmwrap_get_info(union trapped_args *args, void *pr_ctxt)
int status = 0;
struct cmm_info cmm_info_obj;
status = cmm_get_info(args->args_cmm_getinfo.hcmm_mgr, &cmm_info_obj);
status = cmm_get_info(args->args_cmm_getinfo.cmm_mgr, &cmm_info_obj);
CP_TO_USR(args->args_cmm_getinfo.cmm_info_obj, &cmm_info_obj, status,
1);

9
drivers/staging/tidspbridge/pmgr/io.c
View File

@@ -31,7 +31,6 @@
/* ----------------------------------- This */
#include <ioobj.h>
#include <dspbridge/iodefs.h>
#include <dspbridge/io.h>
/* ----------------------------------- Globals */
@@ -58,7 +57,7 @@ int io_create(struct io_mgr **io_man, struct dev_object *hdev_obj,
*io_man = NULL;
/* A memory base of 0 implies no memory base: */
if ((mgr_attrts->shm_base != 0) && (mgr_attrts->usm_length == 0))
if ((mgr_attrts->shm_base != 0) && (mgr_attrts->sm_length == 0))
status = -EINVAL;
if (mgr_attrts->word_size == 0)
@@ -68,13 +67,13 @@ int io_create(struct io_mgr **io_man, struct dev_object *hdev_obj,
dev_get_intf_fxns(hdev_obj, &intf_fxns);
/* Let Bridge channel module finish the create: */
status = (*intf_fxns->pfn_io_create) (&hio_mgr, hdev_obj,
status = (*intf_fxns->io_create) (&hio_mgr, hdev_obj,
mgr_attrts);
if (!status) {
pio_mgr = (struct io_mgr_ *)hio_mgr;
pio_mgr->intf_fxns = intf_fxns;
pio_mgr->hdev_obj = hdev_obj;
pio_mgr->dev_obj = hdev_obj;
/* Return the new channel manager handle: */
*io_man = hio_mgr;
@@ -100,7 +99,7 @@ int io_destroy(struct io_mgr *hio_mgr)
intf_fxns = pio_mgr->intf_fxns;
/* Let Bridge channel module destroy the io_mgr: */
status = (*intf_fxns->pfn_io_destroy) (hio_mgr);
status = (*intf_fxns->io_destroy) (hio_mgr);
return status;
}

4
drivers/staging/tidspbridge/pmgr/ioobj.h
View File

@@ -29,10 +29,10 @@
*/
struct io_mgr_ {
/* These must be the first fields in a io_mgr struct: */
struct bridge_dev_context *hbridge_context; /* Bridge context. */
struct bridge_dev_context *bridge_context; /* Bridge context. */
/* Function interface to Bridge driver. */
struct bridge_drv_interface *intf_fxns;
struct dev_object *hdev_obj; /* Device this board represents. */
struct dev_object *dev_obj; /* Device this board represents. */
};
#endif /* IOOBJ_ */

4
drivers/staging/tidspbridge/pmgr/msg.c
View File

@@ -64,7 +64,7 @@ int msg_create(struct msg_mgr **msg_man,
/* Let Bridge message module finish the create: */
status =
(*intf_fxns->pfn_msg_create) (&hmsg_mgr, hdev_obj, msg_callback);
(*intf_fxns->msg_create) (&hmsg_mgr, hdev_obj, msg_callback);
if (!status) {
/* Fill in DSP API message module's fields of the msg_mgr
@@ -96,7 +96,7 @@ void msg_delete(struct msg_mgr *hmsg_mgr)
intf_fxns = msg_mgr_obj->intf_fxns;
/* Let Bridge message module destroy the msg_mgr: */
(*intf_fxns->pfn_msg_delete) (hmsg_mgr);
(*intf_fxns->msg_delete) (hmsg_mgr);
} else {
dev_dbg(bridge, "%s: Error hmsg_mgr handle: %p\n",
__func__, hmsg_mgr);

66
drivers/staging/tidspbridge/rmgr/dbdcd.c
View File

@@ -134,7 +134,7 @@ int dcd_create_manager(char *sz_zl_dll_name,
DBC_REQUIRE(refs >= 0);
DBC_REQUIRE(dcd_mgr);
status = cod_create(&cod_mgr, sz_zl_dll_name, NULL);
status = cod_create(&cod_mgr, sz_zl_dll_name);
if (status)
goto func_end;
@@ -1020,8 +1020,6 @@ static s32 atoi(char *psz_buf)
{
char *pch = psz_buf;
s32 base = 0;
unsigned long res;
int ret_val;
while (isspace(*pch))
pch++;
@@ -1033,9 +1031,7 @@ static s32 atoi(char *psz_buf)
base = 16;
}
ret_val = strict_strtoul(pch, base, &res);
return ret_val ? : res;
return simple_strtoul(pch, NULL, base);
}
/*
@@ -1116,14 +1112,14 @@ static int get_attrs_from_buf(char *psz_buf, u32 ul_buf_size,
dsp_resource_reqmts.program_mem_size = atoi(token);
token = strsep(&psz_cur, seps);
gen_obj->obj_data.node_obj.ndb_props.
dsp_resource_reqmts.uwc_execution_time = atoi(token);
dsp_resource_reqmts.wc_execution_time = atoi(token);
token = strsep(&psz_cur, seps);
gen_obj->obj_data.node_obj.ndb_props.
dsp_resource_reqmts.uwc_period = atoi(token);
dsp_resource_reqmts.wc_period = atoi(token);
token = strsep(&psz_cur, seps);
gen_obj->obj_data.node_obj.ndb_props.
dsp_resource_reqmts.uwc_deadline = atoi(token);
dsp_resource_reqmts.wc_deadline = atoi(token);
token = strsep(&psz_cur, seps);
gen_obj->obj_data.node_obj.ndb_props.
@@ -1166,40 +1162,40 @@ static int get_attrs_from_buf(char *psz_buf, u32 ul_buf_size,
atoi(token);
token = strsep(&psz_cur, seps);
/* u32 utimeout */
gen_obj->obj_data.node_obj.ndb_props.utimeout = atoi(token);
/* u32 timeout */
gen_obj->obj_data.node_obj.ndb_props.timeout = atoi(token);
token = strsep(&psz_cur, seps);
/* char *pstr_create_phase_fxn */
/* char *str_create_phase_fxn */
DBC_REQUIRE(token);
token_len = strlen(token);
gen_obj->obj_data.node_obj.pstr_create_phase_fxn =
gen_obj->obj_data.node_obj.str_create_phase_fxn =
kzalloc(token_len + 1, GFP_KERNEL);
strncpy(gen_obj->obj_data.node_obj.pstr_create_phase_fxn,
strncpy(gen_obj->obj_data.node_obj.str_create_phase_fxn,
token, token_len);
gen_obj->obj_data.node_obj.pstr_create_phase_fxn[token_len] =
gen_obj->obj_data.node_obj.str_create_phase_fxn[token_len] =
'\0';
token = strsep(&psz_cur, seps);
/* char *pstr_execute_phase_fxn */
/* char *str_execute_phase_fxn */
DBC_REQUIRE(token);
token_len = strlen(token);
gen_obj->obj_data.node_obj.pstr_execute_phase_fxn =
gen_obj->obj_data.node_obj.str_execute_phase_fxn =
kzalloc(token_len + 1, GFP_KERNEL);
strncpy(gen_obj->obj_data.node_obj.pstr_execute_phase_fxn,
strncpy(gen_obj->obj_data.node_obj.str_execute_phase_fxn,
token, token_len);
gen_obj->obj_data.node_obj.pstr_execute_phase_fxn[token_len] =
gen_obj->obj_data.node_obj.str_execute_phase_fxn[token_len] =
'\0';
token = strsep(&psz_cur, seps);
/* char *pstr_delete_phase_fxn */
/* char *str_delete_phase_fxn */
DBC_REQUIRE(token);
token_len = strlen(token);
gen_obj->obj_data.node_obj.pstr_delete_phase_fxn =
gen_obj->obj_data.node_obj.str_delete_phase_fxn =
kzalloc(token_len + 1, GFP_KERNEL);
strncpy(gen_obj->obj_data.node_obj.pstr_delete_phase_fxn,
strncpy(gen_obj->obj_data.node_obj.str_delete_phase_fxn,
token, token_len);
gen_obj->obj_data.node_obj.pstr_delete_phase_fxn[token_len] =
gen_obj->obj_data.node_obj.str_delete_phase_fxn[token_len] =
'\0';
token = strsep(&psz_cur, seps);
@@ -1211,34 +1207,34 @@ static int get_attrs_from_buf(char *psz_buf, u32 ul_buf_size,
gen_obj->obj_data.node_obj.msg_notify_type = atoi(token);
token = strsep(&psz_cur, seps);
/* char *pstr_i_alg_name */
/* char *str_i_alg_name */
if (token) {
token_len = strlen(token);
gen_obj->obj_data.node_obj.pstr_i_alg_name =
gen_obj->obj_data.node_obj.str_i_alg_name =
kzalloc(token_len + 1, GFP_KERNEL);
strncpy(gen_obj->obj_data.node_obj.pstr_i_alg_name,
strncpy(gen_obj->obj_data.node_obj.str_i_alg_name,
token, token_len);
gen_obj->obj_data.node_obj.pstr_i_alg_name[token_len] =
gen_obj->obj_data.node_obj.str_i_alg_name[token_len] =
'\0';
token = strsep(&psz_cur, seps);
}
/* Load type (static, dynamic, or overlay) */
if (token) {
gen_obj->obj_data.node_obj.us_load_type = atoi(token);
gen_obj->obj_data.node_obj.load_type = atoi(token);
token = strsep(&psz_cur, seps);
}
/* Dynamic load data requirements */
if (token) {
gen_obj->obj_data.node_obj.ul_data_mem_seg_mask =
gen_obj->obj_data.node_obj.data_mem_seg_mask =
atoi(token);
token = strsep(&psz_cur, seps);
}
/* Dynamic load code requirements */
if (token) {
gen_obj->obj_data.node_obj.ul_code_mem_seg_mask =
gen_obj->obj_data.node_obj.code_mem_seg_mask =
atoi(token);
token = strsep(&psz_cur, seps);
}
@@ -1257,7 +1253,7 @@ static int get_attrs_from_buf(char *psz_buf, u32 ul_buf_size,
/* Heap Size for the node */
gen_obj->obj_data.node_obj.
ndb_props.node_profiles[i].
ul_heap_size = atoi(token);
heap_size = atoi(token);
}
}
}
@@ -1289,10 +1285,10 @@ static int get_attrs_from_buf(char *psz_buf, u32 ul_buf_size,
gen_obj->obj_data.proc_info.clock_rate = atoi(token);
token = strsep(&psz_cur, seps);
gen_obj->obj_data.proc_info.ul_internal_mem_size = atoi(token);
gen_obj->obj_data.proc_info.internal_mem_size = atoi(token);
token = strsep(&psz_cur, seps);
gen_obj->obj_data.proc_info.ul_external_mem_size = atoi(token);
gen_obj->obj_data.proc_info.external_mem_size = atoi(token);
token = strsep(&psz_cur, seps);
gen_obj->obj_data.proc_info.processor_id = atoi(token);
@@ -1312,11 +1308,11 @@ static int get_attrs_from_buf(char *psz_buf, u32 ul_buf_size,
for (entry_id = 0; entry_id < 7; entry_id++) {
token = strsep(&psz_cur, seps);
gen_obj->obj_data.ext_proc_obj.ty_tlb[entry_id].
ul_gpp_phys = atoi(token);
gpp_phys = atoi(token);
token = strsep(&psz_cur, seps);
gen_obj->obj_data.ext_proc_obj.ty_tlb[entry_id].
ul_dsp_virt = atoi(token);
dsp_virt = atoi(token);
}
#endif

124
drivers/staging/tidspbridge/rmgr/disp.c
View File

@@ -58,15 +58,15 @@
* ======== disp_object ========
*/
struct disp_object {
struct dev_object *hdev_obj; /* Device for this processor */
struct dev_object *dev_obj; /* Device for this processor */
/* Function interface to Bridge driver */
struct bridge_drv_interface *intf_fxns;
struct chnl_mgr *hchnl_mgr; /* Channel manager */
struct chnl_mgr *chnl_mgr; /* Channel manager */
struct chnl_object *chnl_to_dsp; /* Chnl for commands to RMS */
struct chnl_object *chnl_from_dsp; /* Chnl for replies from RMS */
u8 *pbuf; /* Buffer for commands, replies */
u32 ul_bufsize; /* pbuf size in bytes */
u32 ul_bufsize_rms; /* pbuf size in RMS words */
u8 *buf; /* Buffer for commands, replies */
u32 bufsize; /* buf size in bytes */
u32 bufsize_rms; /* buf size in RMS words */
u32 char_size; /* Size of DSP character */
u32 word_size; /* Size of DSP word */
u32 data_mau_size; /* Size of DSP Data MAU */
@@ -108,11 +108,11 @@ int disp_create(struct disp_object **dispatch_obj,
if (disp_obj == NULL)
status = -ENOMEM;
else
disp_obj->hdev_obj = hdev_obj;
disp_obj->dev_obj = hdev_obj;
/* Get Channel manager and Bridge function interface */
if (!status) {
status = dev_get_chnl_mgr(hdev_obj, &(disp_obj->hchnl_mgr));
status = dev_get_chnl_mgr(hdev_obj, &(disp_obj->chnl_mgr));
if (!status) {
(void)dev_get_intf_fxns(hdev_obj, &intf_fxns);
disp_obj->intf_fxns = intf_fxns;
@@ -140,26 +140,26 @@ int disp_create(struct disp_object **dispatch_obj,
/* Open channels for communicating with the RMS */
chnl_attr_obj.uio_reqs = CHNLIOREQS;
chnl_attr_obj.event_obj = NULL;
ul_chnl_id = disp_attrs->ul_chnl_offset + CHNLTORMSOFFSET;
status = (*intf_fxns->pfn_chnl_open) (&(disp_obj->chnl_to_dsp),
disp_obj->hchnl_mgr,
ul_chnl_id = disp_attrs->chnl_offset + CHNLTORMSOFFSET;
status = (*intf_fxns->chnl_open) (&(disp_obj->chnl_to_dsp),
disp_obj->chnl_mgr,
CHNL_MODETODSP, ul_chnl_id,
&chnl_attr_obj);
if (!status) {
ul_chnl_id = disp_attrs->ul_chnl_offset + CHNLFROMRMSOFFSET;
ul_chnl_id = disp_attrs->chnl_offset + CHNLFROMRMSOFFSET;
status =
(*intf_fxns->pfn_chnl_open) (&(disp_obj->chnl_from_dsp),
disp_obj->hchnl_mgr,
(*intf_fxns->chnl_open) (&(disp_obj->chnl_from_dsp),
disp_obj->chnl_mgr,
CHNL_MODEFROMDSP, ul_chnl_id,
&chnl_attr_obj);
}
if (!status) {
/* Allocate buffer for commands, replies */
disp_obj->ul_bufsize = disp_attrs->ul_chnl_buf_size;
disp_obj->ul_bufsize_rms = RMS_COMMANDBUFSIZE;
disp_obj->pbuf = kzalloc(disp_obj->ul_bufsize, GFP_KERNEL);
if (disp_obj->pbuf == NULL)
disp_obj->bufsize = disp_attrs->chnl_buf_size;
disp_obj->bufsize_rms = RMS_COMMANDBUFSIZE;
disp_obj->buf = kzalloc(disp_obj->bufsize, GFP_KERNEL);
if (disp_obj->buf == NULL)
status = -ENOMEM;
}
func_cont:
@@ -232,7 +232,7 @@ int disp_node_change_priority(struct disp_object *disp_obj,
DBC_REQUIRE(hnode != NULL);
/* Send message to RMS to change priority */
rms_cmd = (struct rms_command *)(disp_obj->pbuf);
rms_cmd = (struct rms_command *)(disp_obj->buf);
rms_cmd->fxn = (rms_word) (rms_fxn);
rms_cmd->arg1 = (rms_word) node_env;
rms_cmd->arg2 = prio;
@@ -282,7 +282,7 @@ int disp_node_create(struct disp_object *disp_obj,
DBC_REQUIRE(node_get_type(hnode) != NODE_DEVICE);
DBC_REQUIRE(node_env != NULL);
status = dev_get_dev_type(disp_obj->hdev_obj, &dev_type);
status = dev_get_dev_type(disp_obj->dev_obj, &dev_type);
if (status)
goto func_end;
@@ -295,7 +295,7 @@ int disp_node_create(struct disp_object *disp_obj,
DBC_REQUIRE(pargs != NULL);
node_type = node_get_type(hnode);
node_msg_args = pargs->asa.node_msg_args;
max = disp_obj->ul_bufsize_rms; /*Max # of RMS words that can be sent */
max = disp_obj->bufsize_rms; /*Max # of RMS words that can be sent */
DBC_ASSERT(max == RMS_COMMANDBUFSIZE);
chars_in_rms_word = sizeof(rms_word) / disp_obj->char_size;
/* Number of RMS words needed to hold arg data */
@@ -347,7 +347,7 @@ int disp_node_create(struct disp_object *disp_obj,
*/
if (!status) {
total = 0; /* Total number of words in buffer so far */
pdw_buf = (rms_word *) disp_obj->pbuf;
pdw_buf = (rms_word *) disp_obj->buf;
rms_cmd = (struct rms_command *)pdw_buf;
rms_cmd->fxn = (rms_word) (rms_fxn);
rms_cmd->arg1 = (rms_word) (ul_create_fxn);
@@ -402,16 +402,16 @@ int disp_node_create(struct disp_object *disp_obj,
more_task_args->sysstack_size =
task_arg_obj.sys_stack_size;
more_task_args->stack_seg = task_arg_obj.stack_seg;
more_task_args->heap_addr = task_arg_obj.udsp_heap_addr;
more_task_args->heap_addr = task_arg_obj.dsp_heap_addr;
more_task_args->heap_size = task_arg_obj.heap_size;
more_task_args->misc = task_arg_obj.ul_dais_arg;
more_task_args->misc = task_arg_obj.dais_arg;
more_task_args->num_input_streams =
task_arg_obj.num_inputs;
total +=
sizeof(struct rms_more_task_args) /
sizeof(rms_word);
dev_dbg(bridge, "%s: udsp_heap_addr %x, heap_size %x\n",
__func__, task_arg_obj.udsp_heap_addr,
dev_dbg(bridge, "%s: dsp_heap_addr %x, heap_size %x\n",
__func__, task_arg_obj.dsp_heap_addr,
task_arg_obj.heap_size);
/* Keep track of pSIOInDef[] and pSIOOutDef[]
* positions in the buffer, since this needs to be
@@ -460,17 +460,6 @@ int disp_node_create(struct disp_object *disp_obj,
DBC_ASSERT(ul_bytes < (RMS_COMMANDBUFSIZE * sizeof(rms_word)));
status = send_message(disp_obj, node_get_timeout(hnode),
ul_bytes, node_env);
if (status >= 0) {
/*
* Message successfully received from RMS.
* Return the status of the Node's create function
* on the DSP-side
*/
status = (((rms_word *) (disp_obj->pbuf))[0]);
if (status < 0)
dev_dbg(bridge, "%s: DSP-side failed: 0x%x\n",
__func__, status);
}
}
func_end:
return status;
@@ -495,7 +484,7 @@ int disp_node_delete(struct disp_object *disp_obj,
DBC_REQUIRE(disp_obj);
DBC_REQUIRE(hnode != NULL);
status = dev_get_dev_type(disp_obj->hdev_obj, &dev_type);
status = dev_get_dev_type(disp_obj->dev_obj, &dev_type);
if (!status) {
@@ -504,7 +493,7 @@ int disp_node_delete(struct disp_object *disp_obj,
/*
* Fill in buffer to send to RMS
*/
rms_cmd = (struct rms_command *)disp_obj->pbuf;
rms_cmd = (struct rms_command *)disp_obj->buf;
rms_cmd->fxn = (rms_word) (rms_fxn);
rms_cmd->arg1 = (rms_word) node_env;
rms_cmd->arg2 = (rms_word) (ul_delete_fxn);
@@ -513,18 +502,6 @@ int disp_node_delete(struct disp_object *disp_obj,
status = send_message(disp_obj, node_get_timeout(hnode),
sizeof(struct rms_command),
&dw_arg);
if (status >= 0) {
/*
* Message successfully received from RMS.
* Return the status of the Node's delete
* function on the DSP-side
*/
status = (((rms_word *) (disp_obj->pbuf))[0]);
if (status < 0)
dev_dbg(bridge, "%s: DSP-side failed: "
"0x%x\n", __func__, status);
}
}
}
return status;
@@ -548,7 +525,7 @@ int disp_node_run(struct disp_object *disp_obj,
DBC_REQUIRE(disp_obj);
DBC_REQUIRE(hnode != NULL);
status = dev_get_dev_type(disp_obj->hdev_obj, &dev_type);
status = dev_get_dev_type(disp_obj->dev_obj, &dev_type);
if (!status) {
@@ -557,7 +534,7 @@ int disp_node_run(struct disp_object *disp_obj,
/*
* Fill in buffer to send to RMS.
*/
rms_cmd = (struct rms_command *)disp_obj->pbuf;
rms_cmd = (struct rms_command *)disp_obj->buf;
rms_cmd->fxn = (rms_word) (rms_fxn);
rms_cmd->arg1 = (rms_word) node_env;
rms_cmd->arg2 = (rms_word) (ul_execute_fxn);
@@ -566,18 +543,6 @@ int disp_node_run(struct disp_object *disp_obj,
status = send_message(disp_obj, node_get_timeout(hnode),
sizeof(struct rms_command),
&dw_arg);
if (status >= 0) {
/*
* Message successfully received from RMS.
* Return the status of the Node's execute
* function on the DSP-side
*/
status = (((rms_word *) (disp_obj->pbuf))[0]);
if (status < 0)
dev_dbg(bridge, "%s: DSP-side failed: "
"0x%x\n", __func__, status);
}
}
}
@@ -601,7 +566,7 @@ static void delete_disp(struct disp_object *disp_obj)
if (disp_obj->chnl_from_dsp) {
/* Channel close can fail only if the channel handle
* is invalid. */
status = (*intf_fxns->pfn_chnl_close)
status = (*intf_fxns->chnl_close)
(disp_obj->chnl_from_dsp);
if (status) {
dev_dbg(bridge, "%s: Failed to close channel "
@@ -610,14 +575,14 @@ static void delete_disp(struct disp_object *disp_obj)
}
if (disp_obj->chnl_to_dsp) {
status =
(*intf_fxns->pfn_chnl_close) (disp_obj->
(*intf_fxns->chnl_close) (disp_obj->
chnl_to_dsp);
if (status) {
dev_dbg(bridge, "%s: Failed to close channel to"
" RMS: 0x%x\n", __func__, status);
}
}
kfree(disp_obj->pbuf);
kfree(disp_obj->buf);
kfree(disp_obj);
}
@@ -646,7 +611,7 @@ static int fill_stream_def(rms_word *pdw_buf, u32 *ptotal, u32 offset,
strm_def_obj->nbufs = strm_def.num_bufs;
strm_def_obj->segid = strm_def.seg_id;
strm_def_obj->align = strm_def.buf_alignment;
strm_def_obj->timeout = strm_def.utimeout;
strm_def_obj->timeout = strm_def.timeout;
}
if (!status) {
@@ -699,16 +664,16 @@ static int send_message(struct disp_object *disp_obj, u32 timeout,
*pdw_arg = (u32) NULL;
intf_fxns = disp_obj->intf_fxns;
chnl_obj = disp_obj->chnl_to_dsp;
pbuf = disp_obj->pbuf;
pbuf = disp_obj->buf;
/* Send the command */
status = (*intf_fxns->pfn_chnl_add_io_req) (chnl_obj, pbuf, ul_bytes, 0,
status = (*intf_fxns->chnl_add_io_req) (chnl_obj, pbuf, ul_bytes, 0,
0L, dw_arg);
if (status)
goto func_end;
status =
(*intf_fxns->pfn_chnl_get_ioc) (chnl_obj, timeout, &chnl_ioc_obj);
(*intf_fxns->chnl_get_ioc) (chnl_obj, timeout, &chnl_ioc_obj);
if (!status) {
if (!CHNL_IS_IO_COMPLETE(chnl_ioc_obj)) {
if (CHNL_IS_TIMED_OUT(chnl_ioc_obj))
@@ -723,13 +688,13 @@ static int send_message(struct disp_object *disp_obj, u32 timeout,
chnl_obj = disp_obj->chnl_from_dsp;
ul_bytes = REPLYSIZE;
status = (*intf_fxns->pfn_chnl_add_io_req) (chnl_obj, pbuf, ul_bytes,
status = (*intf_fxns->chnl_add_io_req) (chnl_obj, pbuf, ul_bytes,
0, 0L, dw_arg);
if (status)
goto func_end;
status =
(*intf_fxns->pfn_chnl_get_ioc) (chnl_obj, timeout, &chnl_ioc_obj);
(*intf_fxns->chnl_get_ioc) (chnl_obj, timeout, &chnl_ioc_obj);
if (!status) {
if (CHNL_IS_TIMED_OUT(chnl_ioc_obj)) {
status = -ETIME;
@@ -738,10 +703,17 @@ static int send_message(struct disp_object *disp_obj, u32 timeout,
status = -EPERM;
} else {
if (CHNL_IS_IO_COMPLETE(chnl_ioc_obj)) {
DBC_ASSERT(chnl_ioc_obj.pbuf == pbuf);
status = (*((rms_word *) chnl_ioc_obj.pbuf));
DBC_ASSERT(chnl_ioc_obj.buf == pbuf);
if (*((int *)chnl_ioc_obj.buf) < 0) {
/* Translate DSP's to kernel error */
status = -EREMOTEIO;
dev_dbg(bridge, "%s: DSP-side failed:"
" DSP errcode = 0x%x, Kernel "
"errcode = %d\n", __func__,
*(int *)pbuf, status);
}
*pdw_arg =
(((rms_word *) (chnl_ioc_obj.pbuf))[1]);
(((rms_word *) (chnl_ioc_obj.buf))[1]);
} else {
status = -EPERM;
}

202
drivers/staging/tidspbridge/rmgr/drv.c
View File

@@ -16,6 +16,7 @@
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#include <linux/types.h>
#include <linux/list.h>
/* ----------------------------------- Host OS */
#include <dspbridge/host_os.h>
@@ -26,9 +27,6 @@
/* ----------------------------------- Trace & Debug */
#include <dspbridge/dbc.h>
/* ----------------------------------- OS Adaptation Layer */
#include <dspbridge/list.h>
/* ----------------------------------- This */
#include <dspbridge/drv.h>
#include <dspbridge/dev.h>
@@ -42,8 +40,8 @@
/* ----------------------------------- Defines, Data Structures, Typedefs */
struct drv_object {
struct lst_list *dev_list;
struct lst_list *dev_node_string;
struct list_head dev_list;
struct list_head dev_node_string;
};
/*
@@ -91,7 +89,7 @@ int drv_insert_node_res_element(void *hnode, void *node_resource,
goto func_end;
}
(*node_res_obj)->hnode = hnode;
(*node_res_obj)->node = hnode;
retval = idr_get_new(ctxt->node_id, *node_res_obj,
&(*node_res_obj)->id);
if (retval == -EAGAIN) {
@@ -125,13 +123,13 @@ static int drv_proc_free_node_res(int id, void *p, void *data)
u32 node_state;
if (node_res_obj->node_allocated) {
node_state = node_get_state(node_res_obj->hnode);
node_state = node_get_state(node_res_obj->node);
if (node_state <= NODE_DELETING) {
if ((node_state == NODE_RUNNING) ||
(node_state == NODE_PAUSED) ||
(node_state == NODE_TERMINATING))
node_terminate
(node_res_obj->hnode, &status);
(node_res_obj->node, &status);
node_delete(node_res_obj, ctxt);
}
@@ -150,7 +148,7 @@ int drv_remove_all_dmm_res_elements(void *process_ctxt)
/* Free DMM mapped memory resources */
list_for_each_entry_safe(map_obj, temp_map, &ctxt->dmm_map_list, link) {
status = proc_un_map(ctxt->hprocessor,
status = proc_un_map(ctxt->processor,
(void *)map_obj->dsp_addr, ctxt);
if (status)
pr_err("%s: proc_un_map failed!"
@@ -159,7 +157,7 @@ int drv_remove_all_dmm_res_elements(void *process_ctxt)
/* Free DMM reserved memory resources */
list_for_each_entry_safe(rsv_obj, temp_rsv, &ctxt->dmm_rsv_list, link) {
status = proc_un_reserve_memory(ctxt->hprocessor, (void *)
status = proc_un_reserve_memory(ctxt->processor, (void *)
rsv_obj->dsp_reserved_addr,
ctxt);
if (status)
@@ -218,7 +216,7 @@ int drv_proc_insert_strm_res_element(void *stream_obj,
goto func_end;
}
(*pstrm_res)->hstream = stream_obj;
(*pstrm_res)->stream = stream_obj;
retval = idr_get_new(ctxt->stream_id, *pstrm_res,
&(*pstrm_res)->id);
if (retval == -EAGAIN) {
@@ -265,9 +263,9 @@ static int drv_proc_free_strm_res(int id, void *p, void *process_ctxt)
}
strm_info.user_strm = &user;
user.number_bufs_in_stream = 0;
strm_get_info(strm_res->hstream, &strm_info, sizeof(strm_info));
strm_get_info(strm_res->stream, &strm_info, sizeof(strm_info));
while (user.number_bufs_in_stream--)
strm_reclaim(strm_res->hstream, &buf_ptr, &ul_bytes,
strm_reclaim(strm_res->stream, &buf_ptr, &ul_bytes,
(u32 *) &ul_buf_size, &dw_arg);
strm_close(strm_res, ctxt);
return 0;
@@ -316,22 +314,8 @@ int drv_create(struct drv_object **drv_obj)
pdrv_object = kzalloc(sizeof(struct drv_object), GFP_KERNEL);
if (pdrv_object) {
/* Create and Initialize List of device objects */
pdrv_object->dev_list = kzalloc(sizeof(struct lst_list),
GFP_KERNEL);
if (pdrv_object->dev_list) {
/* Create and Initialize List of device Extension */
pdrv_object->dev_node_string =
kzalloc(sizeof(struct lst_list), GFP_KERNEL);
if (!(pdrv_object->dev_node_string)) {
status = -EPERM;
} else {
INIT_LIST_HEAD(&pdrv_object->
dev_node_string->head);
INIT_LIST_HEAD(&pdrv_object->dev_list->head);
}
} else {
status = -ENOMEM;
}
INIT_LIST_HEAD(&pdrv_object->dev_list);
INIT_LIST_HEAD(&pdrv_object->dev_node_string);
} else {
status = -ENOMEM;
}
@@ -348,8 +332,6 @@ int drv_create(struct drv_object **drv_obj)
if (!status) {
*drv_obj = pdrv_object;
} else {
kfree(pdrv_object->dev_list);
kfree(pdrv_object->dev_node_string);
/* Free the DRV Object */
kfree(pdrv_object);
}
@@ -386,13 +368,6 @@ int drv_destroy(struct drv_object *driver_obj)
DBC_REQUIRE(refs > 0);
DBC_REQUIRE(pdrv_object);
/*
* Delete the List if it exists.Should not come here
* as the drv_remove_dev_object and the Last drv_request_resources
* removes the list if the lists are empty.
*/
kfree(pdrv_object->dev_list);
kfree(pdrv_object->dev_node_string);
kfree(pdrv_object);
/* Update the DRV Object in the driver data */
if (drv_datap) {
@@ -424,7 +399,7 @@ int drv_get_dev_object(u32 index, struct drv_object *hdrv_obj,
DBC_REQUIRE(device_obj != NULL);
DBC_REQUIRE(index >= 0);
DBC_REQUIRE(refs > 0);
DBC_ASSERT(!(LST_IS_EMPTY(pdrv_obj->dev_list)));
DBC_ASSERT(!(list_empty(&pdrv_obj->dev_list)));
dev_obj = (struct dev_object *)drv_get_first_dev_object();
for (i = 0; i < index; i++) {
@@ -455,9 +430,8 @@ u32 drv_get_first_dev_object(void)
if (drv_datap && drv_datap->drv_object) {
pdrv_obj = drv_datap->drv_object;
if ((pdrv_obj->dev_list != NULL) &&
!LST_IS_EMPTY(pdrv_obj->dev_list))
dw_dev_object = (u32) lst_first(pdrv_obj->dev_list);
if (!list_empty(&pdrv_obj->dev_list))
dw_dev_object = (u32) pdrv_obj->dev_list.next;
} else {
pr_err("%s: Failed to retrieve the object handle\n", __func__);
}
@@ -479,10 +453,9 @@ u32 drv_get_first_dev_extension(void)
if (drv_datap && drv_datap->drv_object) {
pdrv_obj = drv_datap->drv_object;
if ((pdrv_obj->dev_node_string != NULL) &&
!LST_IS_EMPTY(pdrv_obj->dev_node_string)) {
if (!list_empty(&pdrv_obj->dev_node_string)) {
dw_dev_extension =
(u32) lst_first(pdrv_obj->dev_node_string);
(u32) pdrv_obj->dev_node_string.next;
}
} else {
pr_err("%s: Failed to retrieve the object handle\n", __func__);
@@ -503,16 +476,15 @@ u32 drv_get_next_dev_object(u32 hdev_obj)
u32 dw_next_dev_object = 0;
struct drv_object *pdrv_obj;
struct drv_data *drv_datap = dev_get_drvdata(bridge);
DBC_REQUIRE(hdev_obj != 0);
struct list_head *curr;
if (drv_datap && drv_datap->drv_object) {
pdrv_obj = drv_datap->drv_object;
if ((pdrv_obj->dev_list != NULL) &&
!LST_IS_EMPTY(pdrv_obj->dev_list)) {
dw_next_dev_object = (u32) lst_next(pdrv_obj->dev_list,
(struct list_head *)
hdev_obj);
if (!list_empty(&pdrv_obj->dev_list)) {
curr = (struct list_head *)hdev_obj;
if (list_is_last(curr, &pdrv_obj->dev_list))
return 0;
dw_next_dev_object = (u32) curr->next;
}
} else {
pr_err("%s: Failed to retrieve the object handle\n", __func__);
@@ -534,16 +506,15 @@ u32 drv_get_next_dev_extension(u32 dev_extension)
u32 dw_dev_extension = 0;
struct drv_object *pdrv_obj;
struct drv_data *drv_datap = dev_get_drvdata(bridge);
DBC_REQUIRE(dev_extension != 0);
struct list_head *curr;
if (drv_datap && drv_datap->drv_object) {
pdrv_obj = drv_datap->drv_object;
if ((pdrv_obj->dev_node_string != NULL) &&
!LST_IS_EMPTY(pdrv_obj->dev_node_string)) {
dw_dev_extension =
(u32) lst_next(pdrv_obj->dev_node_string,
(struct list_head *)dev_extension);
if (!list_empty(&pdrv_obj->dev_node_string)) {
curr = (struct list_head *)dev_extension;
if (list_is_last(curr, &pdrv_obj->dev_node_string))
return 0;
dw_dev_extension = (u32) curr->next;
}
} else {
pr_err("%s: Failed to retrieve the object handle\n", __func__);
@@ -584,11 +555,8 @@ int drv_insert_dev_object(struct drv_object *driver_obj,
DBC_REQUIRE(refs > 0);
DBC_REQUIRE(hdev_obj != NULL);
DBC_REQUIRE(pdrv_object);
DBC_ASSERT(pdrv_object->dev_list);
lst_put_tail(pdrv_object->dev_list, (struct list_head *)hdev_obj);
DBC_ENSURE(!LST_IS_EMPTY(pdrv_object->dev_list));
list_add_tail((struct list_head *)hdev_obj, &pdrv_object->dev_list);
return 0;
}
@@ -610,26 +578,17 @@ int drv_remove_dev_object(struct drv_object *driver_obj,
DBC_REQUIRE(pdrv_object);
DBC_REQUIRE(hdev_obj != NULL);
DBC_REQUIRE(pdrv_object->dev_list != NULL);
DBC_REQUIRE(!LST_IS_EMPTY(pdrv_object->dev_list));
DBC_REQUIRE(!list_empty(&pdrv_object->dev_list));
/* Search list for p_proc_object: */
for (cur_elem = lst_first(pdrv_object->dev_list); cur_elem != NULL;
cur_elem = lst_next(pdrv_object->dev_list, cur_elem)) {
list_for_each(cur_elem, &pdrv_object->dev_list) {
/* If found, remove it. */
if ((struct dev_object *)cur_elem == hdev_obj) {
lst_remove_elem(pdrv_object->dev_list, cur_elem);
list_del(cur_elem);
status = 0;
break;
}
}
/* Remove list if empty. */
if (LST_IS_EMPTY(pdrv_object->dev_list)) {
kfree(pdrv_object->dev_list);
pdrv_object->dev_list = NULL;
}
DBC_ENSURE((pdrv_object->dev_list == NULL) ||
!LST_IS_EMPTY(pdrv_object->dev_list));
return status;
}
@@ -663,14 +622,13 @@ int drv_request_resources(u32 dw_context, u32 *dev_node_strg)
if (!status) {
pszdev_node = kzalloc(sizeof(struct drv_ext), GFP_KERNEL);
if (pszdev_node) {
lst_init_elem(&pszdev_node->link);
strncpy(pszdev_node->sz_string,
(char *)dw_context, MAXREGPATHLENGTH - 1);
pszdev_node->sz_string[MAXREGPATHLENGTH - 1] = '\0';
/* Update the Driver Object List */
*dev_node_strg = (u32) pszdev_node->sz_string;
lst_put_tail(pdrv_object->dev_node_string,
(struct list_head *)pszdev_node);
list_add_tail(&pszdev_node->link,
&pdrv_object->dev_node_string);
} else {
status = -ENOMEM;
*dev_node_strg = 0;
@@ -682,7 +640,7 @@ int drv_request_resources(u32 dw_context, u32 *dev_node_strg)
}
DBC_ENSURE((!status && dev_node_strg != NULL &&
!LST_IS_EMPTY(pdrv_object->dev_node_string)) ||
!list_empty(&pdrv_object->dev_node_string)) ||
(status && *dev_node_strg == 0));
return status;
@@ -696,7 +654,6 @@ int drv_request_resources(u32 dw_context, u32 *dev_node_strg)
int drv_release_resources(u32 dw_context, struct drv_object *hdrv_obj)
{
int status = 0;
struct drv_object *pdrv_object = (struct drv_object *)hdrv_obj;
struct drv_ext *pszdev_node;
/*
@@ -706,23 +663,13 @@ int drv_release_resources(u32 dw_context, struct drv_object *hdrv_obj)
for (pszdev_node = (struct drv_ext *)drv_get_first_dev_extension();
pszdev_node != NULL; pszdev_node = (struct drv_ext *)
drv_get_next_dev_extension((u32) pszdev_node)) {
if (!pdrv_object->dev_node_string) {
/* When this could happen? */
continue;
}
if ((u32) pszdev_node == dw_context) {
/* Found it */
/* Delete from the Driver object list */
lst_remove_elem(pdrv_object->dev_node_string,
(struct list_head *)pszdev_node);
kfree((void *)pszdev_node);
list_del(&pszdev_node->link);
kfree(pszdev_node);
break;
}
/* Delete the List if it is empty */
if (LST_IS_EMPTY(pdrv_object->dev_node_string)) {
kfree(pdrv_object->dev_node_string);
pdrv_object->dev_node_string = NULL;
}
}
return status;
}
@@ -740,10 +687,9 @@ static int request_bridge_resources(struct cfg_hostres *res)
host_res->num_mem_windows = 2;
/* First window is for DSP internal memory */
host_res->dw_sys_ctrl_base = ioremap(OMAP_SYSC_BASE, OMAP_SYSC_SIZE);
dev_dbg(bridge, "dw_mem_base[0] 0x%x\n", host_res->dw_mem_base[0]);
dev_dbg(bridge, "dw_mem_base[3] 0x%x\n", host_res->dw_mem_base[3]);
dev_dbg(bridge, "dw_dmmu_base %p\n", host_res->dw_dmmu_base);
dev_dbg(bridge, "mem_base[0] 0x%x\n", host_res->mem_base[0]);
dev_dbg(bridge, "mem_base[3] 0x%x\n", host_res->mem_base[3]);
dev_dbg(bridge, "dmmu_base %p\n", host_res->dmmu_base);
/* for 24xx base port is not mapping the mamory for DSP
* internal memory TODO Do a ioremap here */
@@ -752,11 +698,11 @@ static int request_bridge_resources(struct cfg_hostres *res)
/* These are hard-coded values */
host_res->birq_registers = 0;
host_res->birq_attrib = 0;
host_res->dw_offset_for_monitor = 0;
host_res->dw_chnl_offset = 0;
host_res->offset_for_monitor = 0;
host_res->chnl_offset = 0;
/* CHNL_MAXCHANNELS */
host_res->dw_num_chnls = CHNL_MAXCHANNELS;
host_res->dw_chnl_buf_size = 0x400;
host_res->num_chnls = CHNL_MAXCHANNELS;
host_res->chnl_buf_size = 0x400;
return 0;
}
@@ -784,51 +730,51 @@ int drv_request_bridge_res_dsp(void **phost_resources)
/* num_mem_windows must not be more than CFG_MAXMEMREGISTERS */
host_res->num_mem_windows = 4;
host_res->dw_mem_base[0] = 0;
host_res->dw_mem_base[2] = (u32) ioremap(OMAP_DSP_MEM1_BASE,
host_res->mem_base[0] = 0;
host_res->mem_base[2] = (u32) ioremap(OMAP_DSP_MEM1_BASE,
OMAP_DSP_MEM1_SIZE);
host_res->dw_mem_base[3] = (u32) ioremap(OMAP_DSP_MEM2_BASE,
host_res->mem_base[3] = (u32) ioremap(OMAP_DSP_MEM2_BASE,
OMAP_DSP_MEM2_SIZE);
host_res->dw_mem_base[4] = (u32) ioremap(OMAP_DSP_MEM3_BASE,
host_res->mem_base[4] = (u32) ioremap(OMAP_DSP_MEM3_BASE,
OMAP_DSP_MEM3_SIZE);
host_res->dw_per_base = ioremap(OMAP_PER_CM_BASE,
host_res->per_base = ioremap(OMAP_PER_CM_BASE,
OMAP_PER_CM_SIZE);
host_res->dw_per_pm_base = (u32) ioremap(OMAP_PER_PRM_BASE,
host_res->per_pm_base = (u32) ioremap(OMAP_PER_PRM_BASE,
OMAP_PER_PRM_SIZE);
host_res->dw_core_pm_base = (u32) ioremap(OMAP_CORE_PRM_BASE,
host_res->core_pm_base = (u32) ioremap(OMAP_CORE_PRM_BASE,
OMAP_CORE_PRM_SIZE);
host_res->dw_dmmu_base = ioremap(OMAP_DMMU_BASE,
host_res->dmmu_base = ioremap(OMAP_DMMU_BASE,
OMAP_DMMU_SIZE);
dev_dbg(bridge, "dw_mem_base[0] 0x%x\n",
host_res->dw_mem_base[0]);
dev_dbg(bridge, "dw_mem_base[1] 0x%x\n",
host_res->dw_mem_base[1]);
dev_dbg(bridge, "dw_mem_base[2] 0x%x\n",
host_res->dw_mem_base[2]);
dev_dbg(bridge, "dw_mem_base[3] 0x%x\n",
host_res->dw_mem_base[3]);
dev_dbg(bridge, "dw_mem_base[4] 0x%x\n",
host_res->dw_mem_base[4]);
dev_dbg(bridge, "dw_dmmu_base %p\n", host_res->dw_dmmu_base);
dev_dbg(bridge, "mem_base[0] 0x%x\n",
host_res->mem_base[0]);
dev_dbg(bridge, "mem_base[1] 0x%x\n",
host_res->mem_base[1]);
dev_dbg(bridge, "mem_base[2] 0x%x\n",
host_res->mem_base[2]);
dev_dbg(bridge, "mem_base[3] 0x%x\n",
host_res->mem_base[3]);
dev_dbg(bridge, "mem_base[4] 0x%x\n",
host_res->mem_base[4]);
dev_dbg(bridge, "dmmu_base %p\n", host_res->dmmu_base);
shm_size = drv_datap->shm_size;
if (shm_size >= 0x10000) {
/* Allocate Physically contiguous,
* non-cacheable memory */
host_res->dw_mem_base[1] =
host_res->mem_base[1] =
(u32) mem_alloc_phys_mem(shm_size, 0x100000,
&dma_addr);
if (host_res->dw_mem_base[1] == 0) {
if (host_res->mem_base[1] == 0) {
status = -ENOMEM;
pr_err("shm reservation Failed\n");
} else {
host_res->dw_mem_length[1] = shm_size;
host_res->dw_mem_phys[1] = dma_addr;
host_res->mem_length[1] = shm_size;
host_res->mem_phys[1] = dma_addr;
dev_dbg(bridge, "%s: Bridge shm address 0x%x "
"dma_addr %x size %x\n", __func__,
host_res->dw_mem_base[1],
host_res->mem_base[1],
dma_addr, shm_size);
}
}
@@ -836,11 +782,11 @@ int drv_request_bridge_res_dsp(void **phost_resources)
/* These are hard-coded values */
host_res->birq_registers = 0;
host_res->birq_attrib = 0;
host_res->dw_offset_for_monitor = 0;
host_res->dw_chnl_offset = 0;
host_res->offset_for_monitor = 0;
host_res->chnl_offset = 0;
/* CHNL_MAXCHANNELS */
host_res->dw_num_chnls = CHNL_MAXCHANNELS;
host_res->dw_chnl_buf_size = 0x400;
host_res->num_chnls = CHNL_MAXCHANNELS;
host_res->chnl_buf_size = 0x400;
dw_buff_size = sizeof(struct cfg_hostres);
}
*phost_resources = host_res;

1
drivers/staging/tidspbridge/rmgr/drv_interface.c
View File

@@ -59,7 +59,6 @@
#include <dspbridge/chnl.h>
#include <dspbridge/proc.h>
#include <dspbridge/dev.h>
#include <dspbridge/drvdefs.h>
#include <dspbridge/drv.h>
#ifdef CONFIG_TIDSPBRIDGE_DVFS

66
drivers/staging/tidspbridge/rmgr/mgr.c
View File

@@ -44,7 +44,7 @@
#define ZLDLLNAME ""
struct mgr_object {
struct dcd_manager *hdcd_mgr; /* Proc/Node data manager */
struct dcd_manager *dcd_mgr; /* Proc/Node data manager */
};
/* ----------------------------------- Globals */
@@ -67,7 +67,7 @@ int mgr_create(struct mgr_object **mgr_obj,
pmgr_obj = kzalloc(sizeof(struct mgr_object), GFP_KERNEL);
if (pmgr_obj) {
status = dcd_create_manager(ZLDLLNAME, &pmgr_obj->hdcd_mgr);
status = dcd_create_manager(ZLDLLNAME, &pmgr_obj->dcd_mgr);
if (!status) {
/* If succeeded store the handle in the MGR Object */
if (drv_datap) {
@@ -81,7 +81,7 @@ int mgr_create(struct mgr_object **mgr_obj,
if (!status) {
*mgr_obj = pmgr_obj;
} else {
dcd_destroy_manager(pmgr_obj->hdcd_mgr);
dcd_destroy_manager(pmgr_obj->dcd_mgr);
kfree(pmgr_obj);
}
} else {
@@ -110,8 +110,8 @@ int mgr_destroy(struct mgr_object *hmgr_obj)
DBC_REQUIRE(hmgr_obj);
/* Free resources */
if (hmgr_obj->hdcd_mgr)
dcd_destroy_manager(hmgr_obj->hdcd_mgr);
if (hmgr_obj->dcd_mgr)
dcd_destroy_manager(hmgr_obj->dcd_mgr);
kfree(pmgr_obj);
/* Update the driver data with NULL for MGR Object */
@@ -134,8 +134,7 @@ int mgr_enum_node_info(u32 node_id, struct dsp_ndbprops *pndb_props,
u32 undb_props_size, u32 *pu_num_nodes)
{
int status = 0;
struct dsp_uuid node_uuid, temp_uuid;
u32 temp_index = 0;
struct dsp_uuid node_uuid;
u32 node_index = 0;
struct dcd_genericobj gen_obj;
struct mgr_object *pmgr_obj = NULL;
@@ -149,46 +148,33 @@ int mgr_enum_node_info(u32 node_id, struct dsp_ndbprops *pndb_props,
*pu_num_nodes = 0;
/* Get the Manager Object from the driver data */
if (!drv_datap || !drv_datap->mgr_object) {
status = -ENODATA;
pr_err("%s: Failed to retrieve the object handle\n", __func__);
goto func_cont;
} else {
pmgr_obj = drv_datap->mgr_object;
return -ENODATA;
}
pmgr_obj = drv_datap->mgr_object;
DBC_ASSERT(pmgr_obj);
/* Forever loop till we hit failed or no more items in the
* Enumeration. We will exit the loop other than 0; */
while (status == 0) {
status = dcd_enumerate_object(temp_index++, DSP_DCDNODETYPE,
&temp_uuid);
if (status == 0) {
node_index++;
if (node_id == (node_index - 1))
node_uuid = temp_uuid;
}
}
if (!status) {
if (node_id > (node_index - 1)) {
status = -EINVAL;
} else {
status = dcd_get_object_def(pmgr_obj->hdcd_mgr,
(struct dsp_uuid *)
&node_uuid, DSP_DCDNODETYPE,
&gen_obj);
if (!status) {
/* Get the Obj def */
*pndb_props =
gen_obj.obj_data.node_obj.ndb_props;
*pu_num_nodes = node_index;
}
while (!status) {
status = dcd_enumerate_object(node_index++, DSP_DCDNODETYPE,
&node_uuid);
if (status)
break;
*pu_num_nodes = node_index;
if (node_id == (node_index - 1)) {
status = dcd_get_object_def(pmgr_obj->dcd_mgr,
&node_uuid, DSP_DCDNODETYPE, &gen_obj);
if (status)
break;
/* Get the Obj def */
*pndb_props = gen_obj.obj_data.node_obj.ndb_props;
}
}
func_cont:
DBC_ENSURE((!status && *pu_num_nodes > 0) ||
(status && *pu_num_nodes == 0));
/* the last status is not 0, but neither an error */
if (status > 0)
status = 0;
return status;
}
@@ -272,7 +258,7 @@ int mgr_enum_processor_info(u32 processor_id,
if (proc_detect != false)
continue;
status2 = dcd_get_object_def(pmgr_obj->hdcd_mgr,
status2 = dcd_get_object_def(pmgr_obj->dcd_mgr,
(struct dsp_uuid *)&temp_uuid,
DSP_DCDPROCESSORTYPE, &gen_obj);
if (!status2) {
@@ -347,7 +333,7 @@ int mgr_get_dcd_handle(struct mgr_object *mgr_handle,
*dcd_handle = (u32) NULL;
if (pmgr_obj) {
*dcd_handle = (u32) pmgr_obj->hdcd_mgr;
*dcd_handle = (u32) pmgr_obj->dcd_mgr;
status = 0;
}
DBC_ENSURE((!status && *dcd_handle != (u32) NULL) ||

117
drivers/staging/tidspbridge/rmgr/nldr.c
View File

@@ -190,8 +190,8 @@ struct ovly_node {
* Overlay loader object.
*/
struct nldr_object {
struct dev_object *hdev_obj; /* Device object */
struct dcd_manager *hdcd_mgr; /* Proc/Node data manager */
struct dev_object *dev_obj; /* Device object */
struct dcd_manager *dcd_mgr; /* Proc/Node data manager */
struct dbll_tar_obj *dbll; /* The DBL loader */
struct dbll_library_obj *base_lib; /* Base image library */
struct rmm_target_obj *rmm; /* Remote memory manager for DSP */
@@ -206,8 +206,8 @@ struct nldr_object {
u32 *seg_table; /* memtypes of dynamic memory segs
* indexed by segid
*/
u16 us_dsp_mau_size; /* Size of DSP MAU */
u16 us_dsp_word_size; /* Size of DSP word */
u16 dsp_mau_size; /* Size of DSP MAU */
u16 dsp_word_size; /* Size of DSP word */
};
/*
@@ -220,7 +220,7 @@ struct nldr_nodeobject {
struct dsp_uuid uuid; /* Node's UUID */
bool dynamic; /* Dynamically loaded node? */
bool overlay; /* Overlay node? */
bool *pf_phase_split; /* Multiple phase libraries? */
bool *phase_split; /* Multiple phase libraries? */
struct lib_node root; /* Library containing node phase */
struct lib_node create_lib; /* Library with create phase lib */
struct lib_node execute_lib; /* Library with execute phase lib */
@@ -260,12 +260,9 @@ static struct dbll_fxns ldr_fxns = {
(dbll_get_sect_fxn) dbll_get_sect,
(dbll_init_fxn) dbll_init,
(dbll_load_fxn) dbll_load,
(dbll_load_sect_fxn) dbll_load_sect,
(dbll_open_fxn) dbll_open,
(dbll_read_sect_fxn) dbll_read_sect,
(dbll_set_attrs_fxn) dbll_set_attrs,
(dbll_unload_fxn) dbll_unload,
(dbll_unload_sect_fxn) dbll_unload_sect,
};
static u32 refs; /* module reference count */
@@ -329,7 +326,7 @@ int nldr_allocate(struct nldr_object *nldr_obj, void *priv_ref,
if (nldr_node_obj == NULL) {
status = -ENOMEM;
} else {
nldr_node_obj->pf_phase_split = pf_phase_split;
nldr_node_obj->phase_split = pf_phase_split;
nldr_node_obj->pers_libs = 0;
nldr_node_obj->nldr_obj = nldr_obj;
nldr_node_obj->priv_ref = priv_ref;
@@ -339,7 +336,7 @@ int nldr_allocate(struct nldr_object *nldr_obj, void *priv_ref,
* Determine if node is a dynamically loaded node from
* ndb_props.
*/
if (node_props->us_load_type == NLDR_DYNAMICLOAD) {
if (node_props->load_type == NLDR_DYNAMICLOAD) {
/* Dynamic node */
nldr_node_obj->dynamic = true;
/*
@@ -347,51 +344,51 @@ int nldr_allocate(struct nldr_object *nldr_obj, void *priv_ref,
*/
/* Create phase */
nldr_node_obj->seg_id[CREATEDATAFLAGBIT] = (u16)
(node_props->ul_data_mem_seg_mask >> CREATEBIT) &
(node_props->data_mem_seg_mask >> CREATEBIT) &
SEGMASK;
nldr_node_obj->code_data_flag_mask |=
((node_props->ul_data_mem_seg_mask >>
((node_props->data_mem_seg_mask >>
(CREATEBIT + FLAGBIT)) & 1) << CREATEDATAFLAGBIT;
nldr_node_obj->seg_id[CREATECODEFLAGBIT] = (u16)
(node_props->ul_code_mem_seg_mask >>
(node_props->code_mem_seg_mask >>
CREATEBIT) & SEGMASK;
nldr_node_obj->code_data_flag_mask |=
((node_props->ul_code_mem_seg_mask >>
((node_props->code_mem_seg_mask >>
(CREATEBIT + FLAGBIT)) & 1) << CREATECODEFLAGBIT;
/* Execute phase */
nldr_node_obj->seg_id[EXECUTEDATAFLAGBIT] = (u16)
(node_props->ul_data_mem_seg_mask >>
(node_props->data_mem_seg_mask >>
EXECUTEBIT) & SEGMASK;
nldr_node_obj->code_data_flag_mask |=
((node_props->ul_data_mem_seg_mask >>
((node_props->data_mem_seg_mask >>
(EXECUTEBIT + FLAGBIT)) & 1) <<
EXECUTEDATAFLAGBIT;
nldr_node_obj->seg_id[EXECUTECODEFLAGBIT] = (u16)
(node_props->ul_code_mem_seg_mask >>
(node_props->code_mem_seg_mask >>
EXECUTEBIT) & SEGMASK;
nldr_node_obj->code_data_flag_mask |=
((node_props->ul_code_mem_seg_mask >>
((node_props->code_mem_seg_mask >>
(EXECUTEBIT + FLAGBIT)) & 1) <<
EXECUTECODEFLAGBIT;
/* Delete phase */
nldr_node_obj->seg_id[DELETEDATAFLAGBIT] = (u16)
(node_props->ul_data_mem_seg_mask >> DELETEBIT) &
(node_props->data_mem_seg_mask >> DELETEBIT) &
SEGMASK;
nldr_node_obj->code_data_flag_mask |=
((node_props->ul_data_mem_seg_mask >>
((node_props->data_mem_seg_mask >>
(DELETEBIT + FLAGBIT)) & 1) << DELETEDATAFLAGBIT;
nldr_node_obj->seg_id[DELETECODEFLAGBIT] = (u16)
(node_props->ul_code_mem_seg_mask >>
(node_props->code_mem_seg_mask >>
DELETEBIT) & SEGMASK;
nldr_node_obj->code_data_flag_mask |=
((node_props->ul_code_mem_seg_mask >>
((node_props->code_mem_seg_mask >>
(DELETEBIT + FLAGBIT)) & 1) << DELETECODEFLAGBIT;
} else {
/* Non-dynamically loaded nodes are part of the
* base image */
nldr_node_obj->root.lib = nldr_obj->base_lib;
/* Check for overlay node */
if (node_props->us_load_type == NLDR_OVLYLOAD)
if (node_props->load_type == NLDR_OVLYLOAD)
nldr_node_obj->overlay = true;
}
@@ -432,13 +429,13 @@ int nldr_create(struct nldr_object **nldr,
DBC_REQUIRE(nldr != NULL);
DBC_REQUIRE(hdev_obj != NULL);
DBC_REQUIRE(pattrs != NULL);
DBC_REQUIRE(pattrs->pfn_ovly != NULL);
DBC_REQUIRE(pattrs->pfn_write != NULL);
DBC_REQUIRE(pattrs->ovly != NULL);
DBC_REQUIRE(pattrs->write != NULL);
/* Allocate dynamic loader object */
nldr_obj = kzalloc(sizeof(struct nldr_object), GFP_KERNEL);
if (nldr_obj) {
nldr_obj->hdev_obj = hdev_obj;
nldr_obj->dev_obj = hdev_obj;
/* warning, lazy status checking alert! */
dev_get_cod_mgr(hdev_obj, &cod_mgr);
if (cod_mgr) {
@@ -453,8 +450,8 @@ int nldr_create(struct nldr_object **nldr,
}
status = 0;
/* end lazy status checking */
nldr_obj->us_dsp_mau_size = pattrs->us_dsp_mau_size;
nldr_obj->us_dsp_word_size = pattrs->us_dsp_word_size;
nldr_obj->dsp_mau_size = pattrs->dsp_mau_size;
nldr_obj->dsp_word_size = pattrs->dsp_word_size;
nldr_obj->ldr_fxns = ldr_fxns;
if (!(nldr_obj->ldr_fxns.init_fxn()))
status = -ENOMEM;
@@ -464,7 +461,7 @@ int nldr_create(struct nldr_object **nldr,
}
/* Create the DCD Manager */
if (!status)
status = dcd_create_manager(NULL, &nldr_obj->hdcd_mgr);
status = dcd_create_manager(NULL, &nldr_obj->dcd_mgr);
/* Get dynamic loading memory sections from base lib */
if (!status) {
@@ -474,7 +471,7 @@ int nldr_create(struct nldr_object **nldr,
&ul_len);
if (!status) {
psz_coff_buf =
kzalloc(ul_len * nldr_obj->us_dsp_mau_size,
kzalloc(ul_len * nldr_obj->dsp_mau_size,
GFP_KERNEL);
if (!psz_coff_buf)
status = -ENOMEM;
@@ -536,9 +533,9 @@ int nldr_create(struct nldr_object **nldr,
new_attrs.free = (dbll_free_fxn) remote_free;
new_attrs.sym_lookup = (dbll_sym_lookup) get_symbol_value;
new_attrs.sym_handle = nldr_obj;
new_attrs.write = (dbll_write_fxn) pattrs->pfn_write;
nldr_obj->ovly_fxn = pattrs->pfn_ovly;
nldr_obj->write_fxn = pattrs->pfn_write;
new_attrs.write = (dbll_write_fxn) pattrs->write;
nldr_obj->ovly_fxn = pattrs->ovly;
nldr_obj->write_fxn = pattrs->write;
nldr_obj->ldr_attrs = new_attrs;
}
kfree(rmm_segs);
@@ -553,7 +550,7 @@ int nldr_create(struct nldr_object **nldr,
DBC_ASSERT(!status);
/* First count number of overlay nodes */
status =
dcd_get_objects(nldr_obj->hdcd_mgr, sz_zl_file,
dcd_get_objects(nldr_obj->dcd_mgr, sz_zl_file,
add_ovly_node, (void *)nldr_obj);
/* Now build table of overlay nodes */
if (!status && nldr_obj->ovly_nodes > 0) {
@@ -563,7 +560,7 @@ int nldr_create(struct nldr_object **nldr,
nldr_obj->ovly_nodes, GFP_KERNEL);
/* Put overlay nodes in the table */
nldr_obj->ovly_nid = 0;
status = dcd_get_objects(nldr_obj->hdcd_mgr, sz_zl_file,
status = dcd_get_objects(nldr_obj->dcd_mgr, sz_zl_file,
add_ovly_node,
(void *)nldr_obj);
}
@@ -607,8 +604,8 @@ void nldr_delete(struct nldr_object *nldr_obj)
kfree(nldr_obj->seg_table);
if (nldr_obj->hdcd_mgr)
dcd_destroy_manager(nldr_obj->hdcd_mgr);
if (nldr_obj->dcd_mgr)
dcd_destroy_manager(nldr_obj->dcd_mgr);
/* Free overlay node information */
if (nldr_obj->ovly_table) {
@@ -681,7 +678,7 @@ int nldr_get_fxn_addr(struct nldr_nodeobject *nldr_node_obj,
nldr_obj = nldr_node_obj->nldr_obj;
/* Called from node_create(), node_delete(), or node_run(). */
if (nldr_node_obj->dynamic && *nldr_node_obj->pf_phase_split) {
if (nldr_node_obj->dynamic && *nldr_node_obj->phase_split) {
switch (nldr_node_obj->phase) {
case NLDR_CREATE:
root = nldr_node_obj->create_lib;
@@ -824,7 +821,7 @@ int nldr_load(struct nldr_nodeobject *nldr_node_obj,
false, nldr_node_obj->lib_path, phase, 0);
if (!status) {
if (*nldr_node_obj->pf_phase_split) {
if (*nldr_node_obj->phase_split) {
switch (phase) {
case NLDR_CREATE:
nldr_node_obj->create_lib =
@@ -871,7 +868,7 @@ int nldr_unload(struct nldr_nodeobject *nldr_node_obj,
if (nldr_node_obj != NULL) {
if (nldr_node_obj->dynamic) {
if (*nldr_node_obj->pf_phase_split) {
if (*nldr_node_obj->phase_split) {
switch (phase) {
case NLDR_CREATE:
root_lib = &nldr_node_obj->create_lib;
@@ -1008,13 +1005,13 @@ static int add_ovly_node(struct dsp_uuid *uuid_obj,
goto func_end;
status =
dcd_get_object_def(nldr_obj->hdcd_mgr, uuid_obj, obj_type,
dcd_get_object_def(nldr_obj->dcd_mgr, uuid_obj, obj_type,
&obj_def);
if (status)
goto func_end;
/* If overlay node, add to the list */
if (obj_def.obj_data.node_obj.us_load_type == NLDR_OVLYLOAD) {
if (obj_def.obj_data.node_obj.load_type == NLDR_OVLYLOAD) {
if (nldr_obj->ovly_table == NULL) {
nldr_obj->ovly_nodes++;
} else {
@@ -1038,13 +1035,13 @@ static int add_ovly_node(struct dsp_uuid *uuid_obj,
}
}
/* These were allocated in dcd_get_object_def */
kfree(obj_def.obj_data.node_obj.pstr_create_phase_fxn);
kfree(obj_def.obj_data.node_obj.str_create_phase_fxn);
kfree(obj_def.obj_data.node_obj.pstr_execute_phase_fxn);
kfree(obj_def.obj_data.node_obj.str_execute_phase_fxn);
kfree(obj_def.obj_data.node_obj.pstr_delete_phase_fxn);
kfree(obj_def.obj_data.node_obj.str_delete_phase_fxn);
kfree(obj_def.obj_data.node_obj.pstr_i_alg_name);
kfree(obj_def.obj_data.node_obj.str_i_alg_name);
func_end:
return status;
@@ -1265,14 +1262,14 @@ static int load_lib(struct nldr_nodeobject *nldr_node_obj,
if (depth == 0) {
status =
dcd_get_library_name(nldr_node_obj->nldr_obj->
hdcd_mgr, &uuid, psz_file_name,
dcd_mgr, &uuid, psz_file_name,
&dw_buf_size, phase,
nldr_node_obj->pf_phase_split);
nldr_node_obj->phase_split);
} else {
/* Dependent libraries are registered with a phase */
status =
dcd_get_library_name(nldr_node_obj->nldr_obj->
hdcd_mgr, &uuid, psz_file_name,
dcd_mgr, &uuid, psz_file_name,
&dw_buf_size, NLDR_NOPHASE,
NULL);
}
@@ -1312,12 +1309,12 @@ static int load_lib(struct nldr_nodeobject *nldr_node_obj,
depth++;
/* Get number of dependent libraries */
status =
dcd_get_num_dep_libs(nldr_node_obj->nldr_obj->hdcd_mgr,
dcd_get_num_dep_libs(nldr_node_obj->nldr_obj->dcd_mgr,
&uuid, &nd_libs, &np_libs, phase);
}
DBC_ASSERT(nd_libs >= np_libs);
if (!status) {
if (!(*nldr_node_obj->pf_phase_split))
if (!(*nldr_node_obj->phase_split))
np_libs = 0;
/* nd_libs = #of dependent libraries */
@@ -1345,7 +1342,7 @@ static int load_lib(struct nldr_nodeobject *nldr_node_obj,
/* Get the dependent library UUIDs */
status =
dcd_get_dep_libs(nldr_node_obj->
nldr_obj->hdcd_mgr, &uuid,
nldr_obj->dcd_mgr, &uuid,
nd_libs, dep_lib_uui_ds,
persistent_dep_libs,
phase);
@@ -1362,7 +1359,7 @@ static int load_lib(struct nldr_nodeobject *nldr_node_obj,
* is, then record it. If root library IS persistent,
* the deplib is already included */
if (!root_prstnt && persistent_dep_libs[i] &&
*nldr_node_obj->pf_phase_split) {
*nldr_node_obj->phase_split) {
if ((nldr_node_obj->pers_libs) >= MAXLIBS) {
status = -EILSEQ;
break;
@@ -1388,11 +1385,11 @@ static int load_lib(struct nldr_nodeobject *nldr_node_obj,
if (!status) {
if ((status != 0) &&
!root_prstnt && persistent_dep_libs[i] &&
*nldr_node_obj->pf_phase_split) {
*nldr_node_obj->phase_split) {
(nldr_node_obj->pers_libs)++;
} else {
if (!persistent_dep_libs[i] ||
!(*nldr_node_obj->pf_phase_split)) {
!(*nldr_node_obj->phase_split)) {
nd_libs_loaded++;
}
}
@@ -1633,8 +1630,8 @@ static int remote_alloc(void **ref, u16 mem_sect, u32 size,
rmm = nldr_obj->rmm;
/* Convert size to DSP words */
word_size =
(size + nldr_obj->us_dsp_word_size -
1) / nldr_obj->us_dsp_word_size;
(size + nldr_obj->dsp_word_size -
1) / nldr_obj->dsp_word_size;
/* Modify memory 'align' to account for DSP cache line size */
align = lcm(GEM_CACHE_LINE_SIZE, align);
dev_dbg(bridge, "%s: memory align to 0x%x\n", __func__, align);
@@ -1745,8 +1742,8 @@ static int remote_free(void **ref, u16 space, u32 dsp_address,
/* Convert size to DSP words */
word_size =
(size + nldr_obj->us_dsp_word_size -
1) / nldr_obj->us_dsp_word_size;
(size + nldr_obj->dsp_word_size -
1) / nldr_obj->dsp_word_size;
if (rmm_free(rmm, space, dsp_address, word_size, reserve))
status = 0;
@@ -1906,7 +1903,7 @@ int nldr_find_addr(struct nldr_nodeobject *nldr_node, u32 sym_addr,
pr_debug("%s(0x%x, 0x%x, 0x%x, 0x%x, %s)\n", __func__, (u32) nldr_node,
sym_addr, offset_range, (u32) offset_output, sym_name);
if (nldr_node->dynamic && *nldr_node->pf_phase_split) {
if (nldr_node->dynamic && *nldr_node->phase_split) {
switch (nldr_node->phase) {
case NLDR_CREATE:
root = nldr_node->create_lib;

1092
drivers/staging/tidspbridge/rmgr/node.c
View File

File diff suppressed because it is too large Load Diff

170
drivers/staging/tidspbridge/rmgr/proc.c
View File

@@ -29,7 +29,6 @@
#include <dspbridge/dbc.h>
/* ----------------------------------- OS Adaptation Layer */
#include <dspbridge/list.h>
#include <dspbridge/ntfy.h>
#include <dspbridge/sync.h>
/* ----------------------------------- Bridge Driver */
@@ -81,24 +80,24 @@ extern struct device *bridge;
/* The proc_object structure. */
struct proc_object {
struct list_head link; /* Link to next proc_object */
struct dev_object *hdev_obj; /* Device this PROC represents */
struct dev_object *dev_obj; /* Device this PROC represents */
u32 process; /* Process owning this Processor */
struct mgr_object *hmgr_obj; /* Manager Object Handle */
struct mgr_object *mgr_obj; /* Manager Object Handle */
u32 attach_count; /* Processor attach count */
u32 processor_id; /* Processor number */
u32 utimeout; /* Time out count */
u32 timeout; /* Time out count */
enum dsp_procstate proc_state; /* Processor state */
u32 ul_unit; /* DDSP unit number */
u32 unit; /* DDSP unit number */
bool is_already_attached; /*
* True if the Device below has
* GPP Client attached
*/
struct ntfy_object *ntfy_obj; /* Manages notifications */
/* Bridge Context Handle */
struct bridge_dev_context *hbridge_context;
struct bridge_dev_context *bridge_context;
/* Function interface to Bridge driver */
struct bridge_drv_interface *intf_fxns;
char *psz_last_coff;
char *last_coff;
struct list_head proc_list;
};
@@ -285,8 +284,8 @@ proc_attach(u32 processor_id,
DBC_REQUIRE(refs > 0);
DBC_REQUIRE(ph_processor != NULL);
if (pr_ctxt->hprocessor) {
*ph_processor = pr_ctxt->hprocessor;
if (pr_ctxt->processor) {
*ph_processor = pr_ctxt->processor;
return status;
}
@@ -316,8 +315,8 @@ proc_attach(u32 processor_id,
status = -ENOMEM;
goto func_end;
}
p_proc_object->hdev_obj = hdev_obj;
p_proc_object->hmgr_obj = hmgr_obj;
p_proc_object->dev_obj = hdev_obj;
p_proc_object->mgr_obj = hmgr_obj;
p_proc_object->processor_id = dev_type;
/* Store TGID instead of process handle */
p_proc_object->process = current->tgid;
@@ -325,14 +324,14 @@ proc_attach(u32 processor_id,
INIT_LIST_HEAD(&p_proc_object->proc_list);
if (attr_in)
p_proc_object->utimeout = attr_in->utimeout;
p_proc_object->timeout = attr_in->timeout;
else
p_proc_object->utimeout = PROC_DFLT_TIMEOUT;
p_proc_object->timeout = PROC_DFLT_TIMEOUT;
status = dev_get_intf_fxns(hdev_obj, &p_proc_object->intf_fxns);
if (!status) {
status = dev_get_bridge_context(hdev_obj,
&p_proc_object->hbridge_context);
&p_proc_object->bridge_context);
if (status)
kfree(p_proc_object);
} else
@@ -357,8 +356,7 @@ proc_attach(u32 processor_id,
* Return handle to this Processor Object:
* Find out if the Device is already attached to a
* Processor. If so, return AlreadyAttached status */
lst_init_elem(&p_proc_object->link);
status = dev_insert_proc_object(p_proc_object->hdev_obj,
status = dev_insert_proc_object(p_proc_object->dev_obj,
(u32) p_proc_object,
&p_proc_object->
is_already_attached);
@@ -375,7 +373,7 @@ proc_attach(u32 processor_id,
}
if (!status) {
*ph_processor = (void *)p_proc_object;
pr_ctxt->hprocessor = *ph_processor;
pr_ctxt->processor = *ph_processor;
(void)proc_notify_clients(p_proc_object,
DSP_PROCESSORATTACH);
}
@@ -465,12 +463,12 @@ int proc_auto_start(struct cfg_devnode *dev_node_obj,
status = -ENOMEM;
goto func_end;
}
p_proc_object->hdev_obj = hdev_obj;
p_proc_object->hmgr_obj = hmgr_obj;
p_proc_object->dev_obj = hdev_obj;
p_proc_object->mgr_obj = hmgr_obj;
status = dev_get_intf_fxns(hdev_obj, &p_proc_object->intf_fxns);
if (!status)
status = dev_get_bridge_context(hdev_obj,
&p_proc_object->hbridge_context);
&p_proc_object->bridge_context);
if (status)
goto func_cont;
@@ -493,8 +491,8 @@ int proc_auto_start(struct cfg_devnode *dev_node_obj,
if (!status)
status = proc_start(p_proc_object);
}
kfree(p_proc_object->psz_last_coff);
p_proc_object->psz_last_coff = NULL;
kfree(p_proc_object->last_coff);
p_proc_object->last_coff = NULL;
func_cont:
kfree(p_proc_object);
func_end:
@@ -542,8 +540,8 @@ int proc_ctrl(void *hprocessor, u32 dw_cmd, struct dsp_cbdata * arg)
/* timeout = arg->cb_data; */
status = pwr_wake_dsp(timeout);
} else
if (!((*p_proc_object->intf_fxns->pfn_dev_cntrl)
(p_proc_object->hbridge_context, dw_cmd,
if (!((*p_proc_object->intf_fxns->dev_cntrl)
(p_proc_object->bridge_context, dw_cmd,
arg))) {
status = 0;
} else {
@@ -569,7 +567,7 @@ int proc_detach(struct process_context *pr_ctxt)
DBC_REQUIRE(refs > 0);
p_proc_object = (struct proc_object *)pr_ctxt->hprocessor;
p_proc_object = (struct proc_object *)pr_ctxt->processor;
if (p_proc_object) {
/* Notify the Client */
@@ -580,14 +578,14 @@ int proc_detach(struct process_context *pr_ctxt)
kfree(p_proc_object->ntfy_obj);
}
kfree(p_proc_object->psz_last_coff);
p_proc_object->psz_last_coff = NULL;
kfree(p_proc_object->last_coff);
p_proc_object->last_coff = NULL;
/* Remove the Proc from the DEV List */
(void)dev_remove_proc_object(p_proc_object->hdev_obj,
(void)dev_remove_proc_object(p_proc_object->dev_obj,
(u32) p_proc_object);
/* Free the Processor Object */
kfree(p_proc_object);
pr_ctxt->hprocessor = NULL;
pr_ctxt->processor = NULL;
} else {
status = -EFAULT;
}
@@ -615,7 +613,7 @@ int proc_enum_nodes(void *hprocessor, void **node_tab,
DBC_REQUIRE(pu_allocated != NULL);
if (p_proc_object) {
if (!(dev_get_node_manager(p_proc_object->hdev_obj,
if (!(dev_get_node_manager(p_proc_object->dev_obj,
&hnode_mgr))) {
if (hnode_mgr) {
status = node_enum_nodes(hnode_mgr, node_tab,
@@ -892,7 +890,7 @@ int proc_get_resource_info(void *hprocessor, u32 resource_type,
case DSP_RESOURCE_DYNSARAM:
case DSP_RESOURCE_DYNEXTERNAL:
case DSP_RESOURCE_DYNSRAM:
status = dev_get_node_manager(p_proc_object->hdev_obj,
status = dev_get_node_manager(p_proc_object->dev_obj,
&hnode_mgr);
if (!hnode_mgr) {
status = -EFAULT;
@@ -915,11 +913,11 @@ int proc_get_resource_info(void *hprocessor, u32 resource_type,
}
break;
case DSP_RESOURCE_PROCLOAD:
status = dev_get_io_mgr(p_proc_object->hdev_obj, &hio_mgr);
status = dev_get_io_mgr(p_proc_object->dev_obj, &hio_mgr);
if (hio_mgr)
status =
p_proc_object->intf_fxns->
pfn_io_get_proc_load(hio_mgr,
io_get_proc_load(hio_mgr,
(struct dsp_procloadstat *)
&(resource_info->result.
proc_load_stat));
@@ -965,7 +963,7 @@ int proc_get_dev_object(void *hprocessor,
DBC_REQUIRE(device_obj != NULL);
if (p_proc_object) {
*device_obj = p_proc_object->hdev_obj;
*device_obj = p_proc_object->dev_obj;
status = 0;
} else {
*device_obj = NULL;
@@ -997,8 +995,8 @@ int proc_get_state(void *hprocessor,
if (p_proc_object) {
/* First, retrieve BRD state information */
status = (*p_proc_object->intf_fxns->pfn_brd_status)
(p_proc_object->hbridge_context, &brd_status);
status = (*p_proc_object->intf_fxns->brd_status)
(p_proc_object->bridge_context, &brd_status);
if (!status) {
switch (brd_status) {
case BRD_STOPPED:
@@ -1117,7 +1115,7 @@ int proc_load(void *hprocessor, const s32 argc_index,
status = -EFAULT;
goto func_end;
}
dev_get_cod_mgr(p_proc_object->hdev_obj, &cod_mgr);
dev_get_cod_mgr(p_proc_object->dev_obj, &cod_mgr);
if (!cod_mgr) {
status = -EPERM;
goto func_end;
@@ -1149,7 +1147,7 @@ int proc_load(void *hprocessor, const s32 argc_index,
prepend_envp(new_envp, (char **)user_envp,
envp_elems, cnew_envp, sz_proc_id);
/* Get the DCD Handle */
status = mgr_get_dcd_handle(p_proc_object->hmgr_obj,
status = mgr_get_dcd_handle(p_proc_object->mgr_obj,
(u32 *) &hdcd_handle);
if (!status) {
/* Before proceeding with new load,
@@ -1158,16 +1156,16 @@ int proc_load(void *hprocessor, const s32 argc_index,
* If yes, unregister nodes in previously
* registered COFF. If any error occurred,
* set previously registered COFF to NULL. */
if (p_proc_object->psz_last_coff != NULL) {
if (p_proc_object->last_coff != NULL) {
status =
dcd_auto_unregister(hdcd_handle,
p_proc_object->
psz_last_coff);
last_coff);
/* Regardless of auto unregister status,
* free previously allocated
* memory. */
kfree(p_proc_object->psz_last_coff);
p_proc_object->psz_last_coff = NULL;
kfree(p_proc_object->last_coff);
p_proc_object->last_coff = NULL;
}
}
/* On success, do cod_open_base() */
@@ -1180,7 +1178,7 @@ int proc_load(void *hprocessor, const s32 argc_index,
if (!status) {
/* Auto-register data base */
/* Get the DCD Handle */
status = mgr_get_dcd_handle(p_proc_object->hmgr_obj,
status = mgr_get_dcd_handle(p_proc_object->mgr_obj,
(u32 *) &hdcd_handle);
if (!status) {
/* Auto register nodes in specified COFF
@@ -1197,15 +1195,15 @@ int proc_load(void *hprocessor, const s32 argc_index,
if (status) {
status = -EPERM;
} else {
DBC_ASSERT(p_proc_object->psz_last_coff ==
DBC_ASSERT(p_proc_object->last_coff ==
NULL);
/* Allocate memory for pszLastCoff */
p_proc_object->psz_last_coff =
p_proc_object->last_coff =
kzalloc((strlen(user_args[0]) +
1), GFP_KERNEL);
/* If memory allocated, save COFF file name */
if (p_proc_object->psz_last_coff) {
strncpy(p_proc_object->psz_last_coff,
if (p_proc_object->last_coff) {
strncpy(p_proc_object->last_coff,
(char *)user_args[0],
(strlen((char *)user_args[0]) +
1));
@@ -1217,19 +1215,19 @@ int proc_load(void *hprocessor, const s32 argc_index,
if (!status) {
/* Create the message manager. This must be done
* before calling the IOOnLoaded function. */
dev_get_msg_mgr(p_proc_object->hdev_obj, &hmsg_mgr);
dev_get_msg_mgr(p_proc_object->dev_obj, &hmsg_mgr);
if (!hmsg_mgr) {
status = msg_create(&hmsg_mgr, p_proc_object->hdev_obj,
status = msg_create(&hmsg_mgr, p_proc_object->dev_obj,
(msg_onexit) node_on_exit);
DBC_ASSERT(!status);
dev_set_msg_mgr(p_proc_object->hdev_obj, hmsg_mgr);
dev_set_msg_mgr(p_proc_object->dev_obj, hmsg_mgr);
}
}
if (!status) {
/* Set the Device object's message manager */
status = dev_get_io_mgr(p_proc_object->hdev_obj, &hio_mgr);
status = dev_get_io_mgr(p_proc_object->dev_obj, &hio_mgr);
if (hio_mgr)
status = (*p_proc_object->intf_fxns->pfn_io_on_loaded)
status = (*p_proc_object->intf_fxns->io_on_loaded)
(hio_mgr);
else
status = -EFAULT;
@@ -1244,7 +1242,7 @@ int proc_load(void *hprocessor, const s32 argc_index,
#endif
status = cod_load_base(cod_mgr, argc_index, (char **)user_args,
dev_brd_write_fxn,
p_proc_object->hdev_obj, NULL);
p_proc_object->dev_obj, NULL);
if (status) {
if (status == -EBADF) {
dev_dbg(bridge, "%s: Failure to Load the EXE\n",
@@ -1264,8 +1262,8 @@ int proc_load(void *hprocessor, const s32 argc_index,
}
if (!status) {
/* Update the Processor status to loaded */
status = (*p_proc_object->intf_fxns->pfn_brd_set_state)
(p_proc_object->hbridge_context, BRD_LOADED);
status = (*p_proc_object->intf_fxns->brd_set_state)
(p_proc_object->bridge_context, BRD_LOADED);
if (!status) {
p_proc_object->proc_state = PROC_LOADED;
if (p_proc_object->ntfy_obj)
@@ -1285,7 +1283,7 @@ int proc_load(void *hprocessor, const s32 argc_index,
/* Reset DMM structs and add an initial free chunk */
if (!status) {
status =
dev_get_dmm_mgr(p_proc_object->hdev_obj,
dev_get_dmm_mgr(p_proc_object->dev_obj,
&dmm_mgr);
if (dmm_mgr) {
/* Set dw_ext_end to DMM START u8
@@ -1306,8 +1304,8 @@ int proc_load(void *hprocessor, const s32 argc_index,
kfree(new_envp);
user_args[0] = pargv0;
if (!status) {
if (!((*p_proc_object->intf_fxns->pfn_brd_status)
(p_proc_object->hbridge_context, &brd_state))) {
if (!((*p_proc_object->intf_fxns->brd_status)
(p_proc_object->bridge_context, &brd_state))) {
pr_info("%s: Processor Loaded %s\n", __func__, pargv0);
kfree(drv_datap->base_img);
drv_datap->base_img = kmalloc(strlen(pargv0) + 1,
@@ -1399,8 +1397,8 @@ int proc_map(void *hprocessor, void *pmpu_addr, u32 ul_size,
if (!map_obj)
status = -ENOMEM;
else
status = (*p_proc_object->intf_fxns->pfn_brd_mem_map)
(p_proc_object->hbridge_context, pa_align, va_align,
status = (*p_proc_object->intf_fxns->brd_mem_map)
(p_proc_object->bridge_context, pa_align, va_align,
size_align, ul_map_attr, map_obj->pages);
}
if (!status) {
@@ -1477,7 +1475,7 @@ int proc_register_notify(void *hprocessor, u32 event_mask,
*/
if ((event_mask == 0) && status) {
status =
dev_get_deh_mgr(p_proc_object->hdev_obj,
dev_get_deh_mgr(p_proc_object->dev_obj,
&hdeh_mgr);
status =
bridge_deh_register_notify(hdeh_mgr,
@@ -1486,7 +1484,7 @@ int proc_register_notify(void *hprocessor, u32 event_mask,
hnotification);
}
} else {
status = dev_get_deh_mgr(p_proc_object->hdev_obj,
status = dev_get_deh_mgr(p_proc_object->dev_obj,
&hdeh_mgr);
status =
bridge_deh_register_notify(hdeh_mgr,
@@ -1572,7 +1570,7 @@ int proc_start(void *hprocessor)
status = -EBADR;
goto func_end;
}
status = dev_get_cod_mgr(p_proc_object->hdev_obj, &cod_mgr);
status = dev_get_cod_mgr(p_proc_object->dev_obj, &cod_mgr);
if (!cod_mgr) {
status = -EFAULT;
goto func_cont;
@@ -1582,13 +1580,13 @@ int proc_start(void *hprocessor)
if (status)
goto func_cont;
status = (*p_proc_object->intf_fxns->pfn_brd_start)
(p_proc_object->hbridge_context, dw_dsp_addr);
status = (*p_proc_object->intf_fxns->brd_start)
(p_proc_object->bridge_context, dw_dsp_addr);
if (status)
goto func_cont;
/* Call dev_create2 */
status = dev_create2(p_proc_object->hdev_obj);
status = dev_create2(p_proc_object->dev_obj);
if (!status) {
p_proc_object->proc_state = PROC_RUNNING;
/* Deep sleep switces off the peripheral clocks.
@@ -1603,13 +1601,13 @@ int proc_start(void *hprocessor)
/* Failed to Create Node Manager and DISP Object
* Stop the Processor from running. Put it in STOPPED State */
(void)(*p_proc_object->intf_fxns->
pfn_brd_stop) (p_proc_object->hbridge_context);
brd_stop) (p_proc_object->bridge_context);
p_proc_object->proc_state = PROC_STOPPED;
}
func_cont:
if (!status) {
if (!((*p_proc_object->intf_fxns->pfn_brd_status)
(p_proc_object->hbridge_context, &brd_state))) {
if (!((*p_proc_object->intf_fxns->brd_status)
(p_proc_object->bridge_context, &brd_state))) {
pr_info("%s: dsp in running state\n", __func__);
DBC_ASSERT(brd_state != BRD_HIBERNATION);
}
@@ -1647,7 +1645,7 @@ int proc_stop(void *hprocessor)
goto func_end;
}
/* check if there are any running nodes */
status = dev_get_node_manager(p_proc_object->hdev_obj, &hnode_mgr);
status = dev_get_node_manager(p_proc_object->dev_obj, &hnode_mgr);
if (!status && hnode_mgr) {
status = node_enum_nodes(hnode_mgr, &hnode, node_tab_size,
&num_nodes, &nodes_allocated);
@@ -1661,21 +1659,21 @@ int proc_stop(void *hprocessor)
/* It is OK to stop a device that does n't have nodes OR not started */
status =
(*p_proc_object->intf_fxns->
pfn_brd_stop) (p_proc_object->hbridge_context);
brd_stop) (p_proc_object->bridge_context);
if (!status) {
dev_dbg(bridge, "%s: processor in standby mode\n", __func__);
p_proc_object->proc_state = PROC_STOPPED;
/* Destory the Node Manager, msg_ctrl Manager */
if (!(dev_destroy2(p_proc_object->hdev_obj))) {
if (!(dev_destroy2(p_proc_object->dev_obj))) {
/* Destroy the msg_ctrl by calling msg_delete */
dev_get_msg_mgr(p_proc_object->hdev_obj, &hmsg_mgr);
dev_get_msg_mgr(p_proc_object->dev_obj, &hmsg_mgr);
if (hmsg_mgr) {
msg_delete(hmsg_mgr);
dev_set_msg_mgr(p_proc_object->hdev_obj, NULL);
dev_set_msg_mgr(p_proc_object->dev_obj, NULL);
}
if (!((*p_proc_object->
intf_fxns->pfn_brd_status) (p_proc_object->
hbridge_context,
intf_fxns->brd_status) (p_proc_object->
bridge_context,
&brd_state)))
DBC_ASSERT(brd_state == BRD_STOPPED);
}
@@ -1722,8 +1720,8 @@ int proc_un_map(void *hprocessor, void *map_addr,
status = dmm_un_map_memory(dmm_mgr, (u32) va_align, &size_align);
/* Remove mapping from the page tables. */
if (!status) {
status = (*p_proc_object->intf_fxns->pfn_brd_mem_un_map)
(p_proc_object->hbridge_context, va_align, size_align);
status = (*p_proc_object->intf_fxns->brd_mem_un_map)
(p_proc_object->bridge_context, va_align, size_align);
}
mutex_unlock(&proc_lock);
@@ -1821,20 +1819,20 @@ static int proc_monitor(struct proc_object *proc_obj)
/* This is needed only when Device is loaded when it is
* already 'ACTIVE' */
/* Destory the Node Manager, msg_ctrl Manager */
if (!dev_destroy2(proc_obj->hdev_obj)) {
if (!dev_destroy2(proc_obj->dev_obj)) {
/* Destroy the msg_ctrl by calling msg_delete */
dev_get_msg_mgr(proc_obj->hdev_obj, &hmsg_mgr);
dev_get_msg_mgr(proc_obj->dev_obj, &hmsg_mgr);
if (hmsg_mgr) {
msg_delete(hmsg_mgr);
dev_set_msg_mgr(proc_obj->hdev_obj, NULL);
dev_set_msg_mgr(proc_obj->dev_obj, NULL);
}
}
/* Place the Board in the Monitor State */
if (!((*proc_obj->intf_fxns->pfn_brd_monitor)
(proc_obj->hbridge_context))) {
if (!((*proc_obj->intf_fxns->brd_monitor)
(proc_obj->bridge_context))) {
status = 0;
if (!((*proc_obj->intf_fxns->pfn_brd_status)
(proc_obj->hbridge_context, &brd_state)))
if (!((*proc_obj->intf_fxns->brd_status)
(proc_obj->bridge_context, &brd_state)))
DBC_ASSERT(brd_state == BRD_IDLE);
}
@@ -1931,7 +1929,7 @@ int proc_notify_all_clients(void *proc, u32 events)
goto func_end;
}
dev_notify_clients(p_proc_object->hdev_obj, events);
dev_notify_clients(p_proc_object->dev_obj, events);
func_end:
return status;

8
drivers/staging/tidspbridge/rmgr/pwr.c
View File

@@ -67,7 +67,7 @@ int pwr_sleep_dsp(const u32 sleep_code, const u32 timeout)
status = -EINVAL;
if (status != -EINVAL) {
status = (*intf_fxns->pfn_dev_cntrl) (dw_context,
status = (*intf_fxns->dev_cntrl) (dw_context,
ioctlcode,
(void *)&arg);
}
@@ -97,7 +97,7 @@ int pwr_wake_dsp(const u32 timeout)
if (!(dev_get_intf_fxns(hdev_obj,
(struct bridge_drv_interface **)&intf_fxns))) {
status =
(*intf_fxns->pfn_dev_cntrl) (dw_context,
(*intf_fxns->dev_cntrl) (dw_context,
BRDIOCTL_WAKEUP,
(void *)&arg);
}
@@ -131,7 +131,7 @@ int pwr_pm_pre_scale(u16 voltage_domain, u32 level)
if (!(dev_get_intf_fxns(hdev_obj,
(struct bridge_drv_interface **)&intf_fxns))) {
status =
(*intf_fxns->pfn_dev_cntrl) (dw_context,
(*intf_fxns->dev_cntrl) (dw_context,
BRDIOCTL_PRESCALE_NOTIFY,
(void *)&arg);
}
@@ -165,7 +165,7 @@ int pwr_pm_post_scale(u16 voltage_domain, u32 level)
if (!(dev_get_intf_fxns(hdev_obj,
(struct bridge_drv_interface **)&intf_fxns))) {
status =
(*intf_fxns->pfn_dev_cntrl) (dw_context,
(*intf_fxns->dev_cntrl) (dw_context,
BRDIOCTL_POSTSCALE_NOTIFY,
(void *)&arg);
}

93
drivers/staging/tidspbridge/rmgr/rmm.c
View File

@@ -38,6 +38,10 @@
*/
#include <linux/types.h>
#include <linux/list.h>
/* ----------------------------------- Host OS */
#include <dspbridge/host_os.h>
/* ----------------------------------- DSP/BIOS Bridge */
#include <dspbridge/dbdefs.h>
@@ -45,9 +49,6 @@
/* ----------------------------------- Trace & Debug */
#include <dspbridge/dbc.h>
/* ----------------------------------- OS Adaptation Layer */
#include <dspbridge/list.h>
/* ----------------------------------- This */
#include <dspbridge/rmm.h>
@@ -79,7 +80,7 @@ struct rmm_target_obj {
struct rmm_segment *seg_tab;
struct rmm_header **free_list;
u32 num_segs;
struct lst_list *ovly_list; /* List of overlay memory in use */
struct list_head ovly_list; /* List of overlay memory in use */
};
static u32 refs; /* module reference count */
@@ -95,8 +96,7 @@ static bool free_block(struct rmm_target_obj *target, u32 segid, u32 addr,
int rmm_alloc(struct rmm_target_obj *target, u32 segid, u32 size,
u32 align, u32 *dsp_address, bool reserve)
{
struct rmm_ovly_sect *sect;
struct rmm_ovly_sect *prev_sect = NULL;
struct rmm_ovly_sect *sect, *prev_sect = NULL;
struct rmm_ovly_sect *new_sect;
u32 addr;
int status = 0;
@@ -120,10 +120,9 @@ int rmm_alloc(struct rmm_target_obj *target, u32 segid, u32 size,
/* An overlay section - See if block is already in use. If not,
* insert into the list in ascending address size. */
addr = *dsp_address;
sect = (struct rmm_ovly_sect *)lst_first(target->ovly_list);
/* Find place to insert new list element. List is sorted from
* smallest to largest address. */
while (sect != NULL) {
list_for_each_entry(sect, &target->ovly_list, list_elem) {
if (addr <= sect->addr) {
/* Check for overlap with sect */
if ((addr + size > sect->addr) || (prev_sect &&
@@ -135,9 +134,6 @@ int rmm_alloc(struct rmm_target_obj *target, u32 segid, u32 size,
break;
}
prev_sect = sect;
sect = (struct rmm_ovly_sect *)lst_next(target->ovly_list,
(struct list_head *)
sect);
}
if (!status) {
/* No overlap - allocate list element for new section. */
@@ -145,20 +141,17 @@ int rmm_alloc(struct rmm_target_obj *target, u32 segid, u32 size,
if (new_sect == NULL) {
status = -ENOMEM;
} else {
lst_init_elem((struct list_head *)new_sect);
new_sect->addr = addr;
new_sect->size = size;
new_sect->page = segid;
if (sect == NULL) {
if (list_is_last(&sect->list_elem, &target->ovly_list))
/* Put new section at the end of the list */
lst_put_tail(target->ovly_list,
(struct list_head *)new_sect);
} else {
list_add_tail(&new_sect->list_elem,
&target->ovly_list);
else
/* Put new section just before sect */
lst_insert_before(target->ovly_list,
(struct list_head *)new_sect,
(struct list_head *)sect);
}
list_add_tail(&new_sect->list_elem,
&sect->list_elem);
}
}
func_end:
@@ -230,14 +223,8 @@ int rmm_create(struct rmm_target_obj **target_obj,
}
func_cont:
/* Initialize overlay memory list */
if (!status) {
target->ovly_list = kzalloc(sizeof(struct lst_list),
GFP_KERNEL);
if (target->ovly_list == NULL)
status = -ENOMEM;
else
INIT_LIST_HEAD(&target->ovly_list->head);
}
if (!status)
INIT_LIST_HEAD(&target->ovly_list);
if (!status) {
*target_obj = target;
@@ -259,7 +246,7 @@ int rmm_create(struct rmm_target_obj **target_obj,
*/
void rmm_delete(struct rmm_target_obj *target)
{
struct rmm_ovly_sect *ovly_section;
struct rmm_ovly_sect *sect, *tmp;
struct rmm_header *hptr;
struct rmm_header *next;
u32 i;
@@ -268,13 +255,9 @@ void rmm_delete(struct rmm_target_obj *target)
kfree(target->seg_tab);
if (target->ovly_list) {
while ((ovly_section = (struct rmm_ovly_sect *)lst_get_head
(target->ovly_list))) {
kfree(ovly_section);
}
DBC_ASSERT(LST_IS_EMPTY(target->ovly_list));
kfree(target->ovly_list);
list_for_each_entry_safe(sect, tmp, &target->ovly_list, list_elem) {
list_del(&sect->list_elem);
kfree(sect);
}
if (target->free_list != NULL) {
@@ -311,8 +294,8 @@ void rmm_exit(void)
bool rmm_free(struct rmm_target_obj *target, u32 segid, u32 dsp_addr, u32 size,
bool reserved)
{
struct rmm_ovly_sect *sect;
bool ret = true;
struct rmm_ovly_sect *sect, *tmp;
bool ret = false;
DBC_REQUIRE(target);
@@ -333,24 +316,16 @@ bool rmm_free(struct rmm_target_obj *target, u32 segid, u32 dsp_addr, u32 size,
} else {
/* Unreserve memory */
sect = (struct rmm_ovly_sect *)lst_first(target->ovly_list);
while (sect != NULL) {
list_for_each_entry_safe(sect, tmp, &target->ovly_list,
list_elem) {
if (dsp_addr == sect->addr) {
DBC_ASSERT(size == sect->size);
/* Remove from list */
lst_remove_elem(target->ovly_list,
(struct list_head *)sect);
list_del(&sect->list_elem);
kfree(sect);
break;
return true;
}
sect =
(struct rmm_ovly_sect *)lst_next(target->ovly_list,
(struct list_head
*)sect);
}
if (sect == NULL)
ret = false;
}
return ret;
}
@@ -394,19 +369,19 @@ bool rmm_stat(struct rmm_target_obj *target, enum dsp_memtype segid,
}
/* ul_size */
mem_stat_buf->ul_size = target->seg_tab[segid].length;
mem_stat_buf->size = target->seg_tab[segid].length;
/* ul_num_free_blocks */
mem_stat_buf->ul_num_free_blocks = free_blocks;
/* num_free_blocks */
mem_stat_buf->num_free_blocks = free_blocks;
/* ul_total_free_size */
mem_stat_buf->ul_total_free_size = total_free_size;
/* total_free_size */
mem_stat_buf->total_free_size = total_free_size;
/* ul_len_max_free_block */
mem_stat_buf->ul_len_max_free_block = max_free_size;
/* len_max_free_block */
mem_stat_buf->len_max_free_block = max_free_size;
/* ul_num_alloc_blocks */
mem_stat_buf->ul_num_alloc_blocks =
/* num_alloc_blocks */
mem_stat_buf->num_alloc_blocks =
target->seg_tab[segid].number;
ret = true;

86
drivers/staging/tidspbridge/rmgr/strm.c
View File

@@ -55,7 +55,7 @@
*/
struct strm_mgr {
struct dev_object *dev_obj; /* Device for this processor */
struct chnl_mgr *hchnl_mgr; /* Channel manager */
struct chnl_mgr *chnl_mgr; /* Channel manager */
/* Function interface to Bridge driver */
struct bridge_drv_interface *intf_fxns;
};
@@ -68,16 +68,16 @@ struct strm_object {
struct strm_mgr *strm_mgr_obj;
struct chnl_object *chnl_obj;
u32 dir; /* DSP_TONODE or DSP_FROMNODE */
u32 utimeout;
u32 timeout;
u32 num_bufs; /* Max # of bufs allowed in stream */
u32 un_bufs_in_strm; /* Current # of bufs in stream */
u32 ul_n_bytes; /* bytes transferred since idled */
u32 bufs_in_strm; /* Current # of bufs in stream */
u32 bytes; /* bytes transferred since idled */
/* STREAM_IDLE, STREAM_READY, ... */
enum dsp_streamstate strm_state;
void *user_event; /* Saved for strm_get_info() */
enum dsp_strmmode strm_mode; /* STRMMODE_[PROCCOPY][ZEROCOPY]... */
u32 udma_chnl_id; /* DMA chnl id */
u32 udma_priority; /* DMA priority:DMAPRI_[LOW][HIGH] */
u32 dma_chnl_id; /* DMA chnl id */
u32 dma_priority; /* DMA priority:DMAPRI_[LOW][HIGH] */
u32 segment_id; /* >0 is SM segment.=0 is local heap */
u32 buf_alignment; /* Alignment for stream bufs */
/* Stream's SM address translator */
@@ -102,7 +102,7 @@ int strm_allocate_buffer(struct strm_res_object *strmres, u32 usize,
int status = 0;
u32 alloc_cnt = 0;
u32 i;
struct strm_object *stream_obj = strmres->hstream;
struct strm_object *stream_obj = strmres->stream;
DBC_REQUIRE(refs > 0);
DBC_REQUIRE(ap_buffer != NULL);
@@ -154,7 +154,7 @@ int strm_close(struct strm_res_object *strmres,
struct bridge_drv_interface *intf_fxns;
struct chnl_info chnl_info_obj;
int status = 0;
struct strm_object *stream_obj = strmres->hstream;
struct strm_object *stream_obj = strmres->stream;
DBC_REQUIRE(refs > 0);
@@ -165,7 +165,7 @@ int strm_close(struct strm_res_object *strmres,
* -EPIPE */
intf_fxns = stream_obj->strm_mgr_obj->intf_fxns;
status =
(*intf_fxns->pfn_chnl_get_info) (stream_obj->chnl_obj,
(*intf_fxns->chnl_get_info) (stream_obj->chnl_obj,
&chnl_info_obj);
DBC_ASSERT(!status);
@@ -213,7 +213,7 @@ int strm_create(struct strm_mgr **strm_man,
/* Get Channel manager and Bridge function interface */
if (!status) {
status = dev_get_chnl_mgr(dev_obj, &(strm_mgr_obj->hchnl_mgr));
status = dev_get_chnl_mgr(dev_obj, &(strm_mgr_obj->chnl_mgr));
if (!status) {
(void)dev_get_intf_fxns(dev_obj,
&(strm_mgr_obj->intf_fxns));
@@ -268,7 +268,7 @@ int strm_free_buffer(struct strm_res_object *strmres, u8 ** ap_buffer,
{
int status = 0;
u32 i = 0;
struct strm_object *stream_obj = strmres->hstream;
struct strm_object *stream_obj = strmres->stream;
DBC_REQUIRE(refs > 0);
DBC_REQUIRE(ap_buffer != NULL);
@@ -323,7 +323,7 @@ int strm_get_info(struct strm_object *stream_obj,
intf_fxns = stream_obj->strm_mgr_obj->intf_fxns;
status =
(*intf_fxns->pfn_chnl_get_info) (stream_obj->chnl_obj,
(*intf_fxns->chnl_get_info) (stream_obj->chnl_obj,
&chnl_info_obj);
if (status)
goto func_end;
@@ -341,10 +341,10 @@ int strm_get_info(struct strm_object *stream_obj,
stream_info->user_strm->number_bufs_in_stream = chnl_info_obj.cio_cs +
chnl_info_obj.cio_reqs;
/* # of bytes transferred since last call to DSPStream_Idle() */
stream_info->user_strm->ul_number_bytes = chnl_info_obj.bytes_tx;
stream_info->user_strm->number_bytes = chnl_info_obj.bytes_tx;
stream_info->user_strm->sync_object_handle = chnl_info_obj.event_obj;
/* Determine stream state based on channel state and info */
if (chnl_info_obj.dw_state & CHNL_STATEEOS) {
if (chnl_info_obj.state & CHNL_STATEEOS) {
stream_info->user_strm->ss_stream_state = STREAM_DONE;
} else {
if (chnl_info_obj.cio_cs > 0)
@@ -377,8 +377,8 @@ int strm_idle(struct strm_object *stream_obj, bool flush_data)
} else {
intf_fxns = stream_obj->strm_mgr_obj->intf_fxns;
status = (*intf_fxns->pfn_chnl_idle) (stream_obj->chnl_obj,
stream_obj->utimeout,
status = (*intf_fxns->chnl_idle) (stream_obj->chnl_obj,
stream_obj->timeout,
flush_data);
}
@@ -435,7 +435,7 @@ int strm_issue(struct strm_object *stream_obj, u8 *pbuf, u32 ul_bytes,
}
if (!status) {
status = (*intf_fxns->pfn_chnl_add_io_req)
status = (*intf_fxns->chnl_add_io_req)
(stream_obj->chnl_obj, pbuf, ul_bytes, ul_buf_size,
(u32) tmp_buf, dw_arg);
}
@@ -494,8 +494,8 @@ int strm_open(struct node_object *hnode, u32 dir, u32 index,
strm_obj->strm_state = STREAM_IDLE;
strm_obj->user_event = pattr->user_event;
if (pattr->stream_attr_in != NULL) {
strm_obj->utimeout =
pattr->stream_attr_in->utimeout;
strm_obj->timeout =
pattr->stream_attr_in->timeout;
strm_obj->num_bufs =
pattr->stream_attr_in->num_bufs;
strm_obj->strm_mode =
@@ -504,25 +504,25 @@ int strm_open(struct node_object *hnode, u32 dir, u32 index,
pattr->stream_attr_in->segment_id;
strm_obj->buf_alignment =
pattr->stream_attr_in->buf_alignment;
strm_obj->udma_chnl_id =
pattr->stream_attr_in->udma_chnl_id;
strm_obj->udma_priority =
pattr->stream_attr_in->udma_priority;
strm_obj->dma_chnl_id =
pattr->stream_attr_in->dma_chnl_id;
strm_obj->dma_priority =
pattr->stream_attr_in->dma_priority;
chnl_attr_obj.uio_reqs =
pattr->stream_attr_in->num_bufs;
} else {
strm_obj->utimeout = DEFAULTTIMEOUT;
strm_obj->timeout = DEFAULTTIMEOUT;
strm_obj->num_bufs = DEFAULTNUMBUFS;
strm_obj->strm_mode = STRMMODE_PROCCOPY;
strm_obj->segment_id = 0; /* local mem */
strm_obj->buf_alignment = 0;
strm_obj->udma_chnl_id = 0;
strm_obj->udma_priority = 0;
strm_obj->dma_chnl_id = 0;
strm_obj->dma_priority = 0;
chnl_attr_obj.uio_reqs = DEFAULTNUMBUFS;
}
chnl_attr_obj.reserved1 = NULL;
/* DMA chnl flush timeout */
chnl_attr_obj.reserved2 = strm_obj->utimeout;
chnl_attr_obj.reserved2 = strm_obj->timeout;
chnl_attr_obj.event_obj = NULL;
if (pattr->user_event != NULL)
chnl_attr_obj.event_obj = pattr->user_event;
@@ -532,7 +532,7 @@ int strm_open(struct node_object *hnode, u32 dir, u32 index,
if (status)
goto func_cont;
if ((pattr->virt_base == NULL) || !(pattr->ul_virt_size > 0))
if ((pattr->virt_base == NULL) || !(pattr->virt_size > 0))
goto func_cont;
/* No System DMA */
@@ -547,7 +547,7 @@ int strm_open(struct node_object *hnode, u32 dir, u32 index,
/* Set translators Virt Addr attributes */
status = cmm_xlator_info(strm_obj->xlator,
(u8 **) &pattr->virt_base,
pattr->ul_virt_size,
pattr->virt_size,
strm_obj->segment_id, true);
}
}
@@ -557,8 +557,8 @@ int strm_open(struct node_object *hnode, u32 dir, u32 index,
chnl_mode = (dir == DSP_TONODE) ?
CHNL_MODETODSP : CHNL_MODEFROMDSP;
intf_fxns = strm_mgr_obj->intf_fxns;
status = (*intf_fxns->pfn_chnl_open) (&(strm_obj->chnl_obj),
strm_mgr_obj->hchnl_mgr,
status = (*intf_fxns->chnl_open) (&(strm_obj->chnl_obj),
strm_mgr_obj->chnl_mgr,
chnl_mode, ul_chnl_id,
&chnl_attr_obj);
if (status) {
@@ -572,7 +572,7 @@ int strm_open(struct node_object *hnode, u32 dir, u32 index,
* We got a status that's not return-able.
* Assert that we got something we were
* expecting (-EFAULT isn't acceptable,
* strm_mgr_obj->hchnl_mgr better be valid or we
* strm_mgr_obj->chnl_mgr better be valid or we
* assert here), and then return -EPERM.
*/
DBC_ASSERT(status == -ENOSR ||
@@ -631,15 +631,15 @@ int strm_reclaim(struct strm_object *stream_obj, u8 ** buf_ptr,
intf_fxns = stream_obj->strm_mgr_obj->intf_fxns;
status =
(*intf_fxns->pfn_chnl_get_ioc) (stream_obj->chnl_obj,
stream_obj->utimeout,
(*intf_fxns->chnl_get_ioc) (stream_obj->chnl_obj,
stream_obj->timeout,
&chnl_ioc_obj);
if (!status) {
*nbytes = chnl_ioc_obj.byte_size;
if (buff_size)
*buff_size = chnl_ioc_obj.buf_size;
*pdw_arg = chnl_ioc_obj.dw_arg;
*pdw_arg = chnl_ioc_obj.arg;
if (!CHNL_IS_IO_COMPLETE(chnl_ioc_obj)) {
if (CHNL_IS_TIMED_OUT(chnl_ioc_obj)) {
status = -ETIME;
@@ -655,14 +655,14 @@ int strm_reclaim(struct strm_object *stream_obj, u8 ** buf_ptr,
&& (!CHNL_IS_IO_CANCELLED(chnl_ioc_obj))
&& (stream_obj->strm_mode == STRMMODE_ZEROCOPY)) {
/*
* This is a zero-copy channel so chnl_ioc_obj.pbuf
* This is a zero-copy channel so chnl_ioc_obj.buf
* contains the DSP address of SM. We need to
* translate it to a virtual address for the user
* thread to access.
* Note: Could add CMM_DSPPA2VA to CMM in the future.
*/
tmp_buf = cmm_xlator_translate(stream_obj->xlator,
chnl_ioc_obj.pbuf,
chnl_ioc_obj.buf,
CMM_DSPPA2PA);
if (tmp_buf != NULL) {
/* now convert this GPP Pa to Va */
@@ -674,9 +674,9 @@ int strm_reclaim(struct strm_object *stream_obj, u8 ** buf_ptr,
if (tmp_buf == NULL)
status = -ESRCH;
chnl_ioc_obj.pbuf = tmp_buf;
chnl_ioc_obj.buf = tmp_buf;
}
*buf_ptr = chnl_ioc_obj.pbuf;
*buf_ptr = chnl_ioc_obj.buf;
}
func_end:
/* ensure we return a documented return code */
@@ -719,7 +719,7 @@ int strm_register_notify(struct strm_object *stream_obj, u32 event_mask,
intf_fxns = stream_obj->strm_mgr_obj->intf_fxns;
status =
(*intf_fxns->pfn_chnl_register_notify) (stream_obj->
(*intf_fxns->chnl_register_notify) (stream_obj->
chnl_obj,
event_mask,
notify_type,
@@ -765,7 +765,7 @@ int strm_select(struct strm_object **strm_tab, u32 strms,
/* Determine which channels have IO ready */
for (i = 0; i < strms; i++) {
intf_fxns = strm_tab[i]->strm_mgr_obj->intf_fxns;
status = (*intf_fxns->pfn_chnl_get_info) (strm_tab[i]->chnl_obj,
status = (*intf_fxns->chnl_get_info) (strm_tab[i]->chnl_obj,
&chnl_info_obj);
if (status) {
break;
@@ -786,7 +786,7 @@ int strm_select(struct strm_object **strm_tab, u32 strms,
for (i = 0; i < strms; i++) {
intf_fxns =
strm_tab[i]->strm_mgr_obj->intf_fxns;
status = (*intf_fxns->pfn_chnl_get_info)
status = (*intf_fxns->chnl_get_info)
(strm_tab[i]->chnl_obj, &chnl_info_obj);
if (status)
break;
@@ -832,7 +832,7 @@ static int delete_strm(struct strm_object *stream_obj)
intf_fxns = stream_obj->strm_mgr_obj->intf_fxns;
/* Channel close can fail only if the channel handle
* is invalid. */
status = (*intf_fxns->pfn_chnl_close)
status = (*intf_fxns->chnl_close)
(stream_obj->chnl_obj);
}
/* Free all SM address translator resources */