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arm64: dts: rockchip: add aspm-no-l0s for rk3399

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Per the discussion of bug fix[1], we now actually
leaves the default clock choice for pcie phy is
derived from 24MHz OSC to guarantee the least BER.
So let's add aspm-no-l0s here and folks could delete
this property from their dts.

[1] https://patchwork.kernel.org/patch/9470519/
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Shawn Lin
2016-12-16 17:42:37 +08:00
committed by Heiko Stuebner
parent 712fa17772
commit 59cf70be5b
1 changed files with 1 additions and 0 deletions
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arch/arm64/boot/dts/rockchip/rk3399.dtsi
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@@ -283,6 +283,7 @@ pcie0: pcie@f8000000 {
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
aspm-no-l0s;
bus-range = <0x0 0x1>;
clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
<&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;