staging: sm750fb: use BIT macro for PLL_CTRL single-bit fields

Replace complex defintion of PLL_CTRL fields with BIT() macro and use
open-coded implementation for PLL register manipulations.

Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mike Rapoport
2016-02-10 18:33:57 +02:00
committed by Greg Kroah-Hartman
parent 79254c60db
commit 5557eb17b3
3 changed files with 6 additions and 17 deletions

View File

@@ -363,10 +363,7 @@ unsigned int formatPllReg(pll_value_t *pPLL)
* register. On returning a 32 bit number, the value can be
* applied to any PLL in the calling function.
*/
reg =
FIELD_SET(0, PLL_CTRL, BYPASS, OFF)
| FIELD_SET(0, PLL_CTRL, POWER, ON)
| FIELD_SET(0, PLL_CTRL, INPUT, OSC)
reg = PLL_CTRL_POWER
#ifndef VALIDATION_CHIP
| FIELD_VALUE(0, PLL_CTRL, POD, pPLL->POD)
#endif

View File

@@ -126,8 +126,7 @@ static void waitNextVerticalSync(int ctrl, int delay)
/* Do not wait when the Primary PLL is off or display control is already off.
This will prevent the software to wait forever. */
if ((FIELD_GET(PEEK32(PANEL_PLL_CTRL), PLL_CTRL, POWER) ==
PLL_CTRL_POWER_OFF) ||
if (!(PEEK32(PANEL_PLL_CTRL) & PLL_CTRL_POWER) ||
(FIELD_GET(PEEK32(PANEL_DISPLAY_CTRL), PANEL_DISPLAY_CTRL, TIMING) ==
PANEL_DISPLAY_CTRL_TIMING_DISABLE)) {
return;
@@ -149,8 +148,7 @@ static void waitNextVerticalSync(int ctrl, int delay)
/* Do not wait when the Primary PLL is off or display control is already off.
This will prevent the software to wait forever. */
if ((FIELD_GET(PEEK32(CRT_PLL_CTRL), PLL_CTRL, POWER) ==
PLL_CTRL_POWER_OFF) ||
if (!(PEEK32(CRT_PLL_CTRL) & PLL_CTRL_POWER) ||
(FIELD_GET(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, TIMING) ==
CRT_DISPLAY_CTRL_TIMING_DISABLE)) {
return;

View File

@@ -517,15 +517,9 @@
#define PLL_CLK_COUNT_COUNTER 15:0
#define PANEL_PLL_CTRL 0x00005C
#define PLL_CTRL_BYPASS 18:18
#define PLL_CTRL_BYPASS_OFF 0
#define PLL_CTRL_BYPASS_ON 1
#define PLL_CTRL_POWER 17:17
#define PLL_CTRL_POWER_OFF 0
#define PLL_CTRL_POWER_ON 1
#define PLL_CTRL_INPUT 16:16
#define PLL_CTRL_INPUT_OSC 0
#define PLL_CTRL_INPUT_TESTCLK 1
#define PLL_CTRL_BYPASS BIT(18)
#define PLL_CTRL_POWER BIT(17)
#define PLL_CTRL_INPUT BIT(16)
#ifdef VALIDATION_CHIP
#define PLL_CTRL_OD 15:14
#else