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arm64: dts: freescale: imx93-phycore-som: Enhance eMMC pinctrl

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Improve eMMC on phyCORE-i.MX93 SOM by adding 100MHz and 200MHz pinctrl
modes. This enables to use eMMC at enhanced data rates (e.g. HS400).

While at it, apply a workaround for the i.MX93 chip errata ERR052021.

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Primoz Fiser
2025-04-22 12:56:33 +02:00
committed by Shawn Guo
parent d6241ba41f
commit 54be09bdb1
1 changed files with 47 additions and 10 deletions
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57
arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
View File

@@ -166,8 +166,10 @@ eeprom@50 {
/* eMMC */
&usdhc1 {
pinctrl-names = "default";
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
bus-width = <8>;
non-removable;
status = "okay";
@@ -213,18 +215,53 @@ MX93_PAD_ENET2_RD3__GPIO4_IO27 0x31e
>;
};
/* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX93_PAD_SD1_CLK__USDHC1_CLK 0x179e
MX93_PAD_SD1_CMD__USDHC1_CMD 0x1386
MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x138e
MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x1386
MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x138e
MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x1386
MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x1386
MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x1386
MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x1386
MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x1386
MX93_PAD_SD1_CMD__USDHC1_CMD 0x40001386
MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e
MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x40001386
MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x4000138e
MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x40001386
MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x40001386
MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x40001386
MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x40001386
MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x40001386
MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x179e
>;
};
/* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
fsl,pins = <
MX93_PAD_SD1_CLK__USDHC1_CLK 0x17be
MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000139e
MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e
MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x4000139e
MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013be
MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x4000139e
MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x4000139e
MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x4000139e
MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x4000139e
MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x4000139e
MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x179e
>;
};
/* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
fsl,pins = <
MX93_PAD_SD1_CLK__USDHC1_CLK 0x17be
MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000139e
MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000139e
MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x400013be
MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013be
MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x400013be
MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x400013be
MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x400013be
MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x400013be
MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x400013be
MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x179e
>;
};