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x86/cpu: Use enums for TLB descriptor types

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The leaf 0x2 one-byte TLB descriptor types:

	TLB_INST_4K
	TLB_INST_4M
	TLB_INST_2M_4M
	...

are just discriminators to be used within the intel_tlb_table[] mapping.
Their specific values are irrelevant.

Use enums for such types.

Make the enum packed and static assert that its values remain within a
single byte so that the intel_tlb_table[] size do not go out of hand.

Use a __CHECKER__ guard for the static_assert(sizeof(enum) == 1) line as
sparse ignores the __packed annotation on enums.

This is similar to:

  fe3944fb24 ("fs: Move enum rw_hint into a new header file")

for the core SCSI code.

Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: https://lore.kernel.org/r/Z9rsTirs9lLfEPD9@lx-t490
Link: https://lore.kernel.org/r/20250324133324.23458-20-darwi@linutronix.de
This commit is contained in:
Ahmed S. Darwish
2025-03-24 14:33:14 +01:00
committed by Ingo Molnar
parent e1e6b57146
commit 543904cdfe
2 changed files with 34 additions and 25 deletions
Download Patch File Download Diff File Expand all files Collapse all files

31
arch/x86/include/asm/cpuid/types.h
View File

@@ -60,4 +60,35 @@ enum _cache_table_type {
static_assert(sizeof(enum _cache_table_type) == 1);
#endif
/*
* Leaf 0x2 1-byte descriptors' TLB types
* To be used for their mappings at intel_tlb_table[]
*
* Start at 1 since type 0 is reserved for HW byte descriptors which are
* not recognized by the kernel; i.e., those without an explicit mapping.
*/
enum _tlb_table_type {
TLB_INST_4K = 1,
TLB_INST_4M,
TLB_INST_2M_4M,
TLB_INST_ALL,
TLB_DATA_4K,
TLB_DATA_4M,
TLB_DATA_2M_4M,
TLB_DATA_4K_4M,
TLB_DATA_1G,
TLB_DATA_1G_2M_4M,
TLB_DATA0_4K,
TLB_DATA0_4M,
TLB_DATA0_2M_4M,
STLB_4K,
STLB_4K_2M,
} __packed;
#ifndef __CHECKER__
static_assert(sizeof(enum _tlb_table_type) == 1);
#endif
#endif /* _ASM_X86_CPUID_TYPES_H */

28
arch/x86/kernel/cpu/intel.c
View File

@@ -626,28 +626,6 @@ static unsigned int intel_size_cache(struct cpuinfo_x86 *c, unsigned int size)
}
#endif
#define TLB_INST_4K 0x01
#define TLB_INST_4M 0x02
#define TLB_INST_2M_4M 0x03
#define TLB_INST_ALL 0x05
#define TLB_INST_1G 0x06
#define TLB_DATA_4K 0x11
#define TLB_DATA_4M 0x12
#define TLB_DATA_2M_4M 0x13
#define TLB_DATA_4K_4M 0x14
#define TLB_DATA_1G 0x16
#define TLB_DATA_1G_2M_4M 0x17
#define TLB_DATA0_4K 0x21
#define TLB_DATA0_4M 0x22
#define TLB_DATA0_2M_4M 0x23
#define STLB_4K 0x41
#define STLB_4K_2M 0x42
/*
* All of leaf 0x2's one-byte TLB descriptors implies the same number of
* entries for their respective TLB types. The 0x63 descriptor is an
@@ -660,7 +638,7 @@ static unsigned int intel_size_cache(struct cpuinfo_x86 *c, unsigned int size)
struct _tlb_table {
unsigned char descriptor;
char tlb_type;
enum _tlb_table_type type;
unsigned int entries;
};
@@ -718,11 +696,11 @@ static void intel_tlb_lookup(const unsigned char desc)
intel_tlb_table[k].descriptor != 0; k++)
;
if (intel_tlb_table[k].tlb_type == 0)
if (intel_tlb_table[k].type == 0)
return;
entries = intel_tlb_table[k].entries;
switch (intel_tlb_table[k].tlb_type) {
switch (intel_tlb_table[k].type) {
case STLB_4K:
tlb_lli_4k = max(tlb_lli_4k, entries);
tlb_lld_4k = max(tlb_lld_4k, entries);