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arm64: dts: exynos: gs101: phy region for exynos5-usbdrd is larger

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Turns out there are some additional registers in the phy region, update
the DT accordingly.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Tested-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20241203-gs101-phy-lanes-orientation-dts-v2-2-1412783a6b01@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
André Draszik
2024-12-03 12:40:25 +00:00
committed by Krzysztof Kozlowski
parent da9ca3164d
commit 527c9640e4
1 changed files with 1 additions and 1 deletions
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arch/arm64/boot/dts/exynos/google/gs101.dtsi
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@@ -1267,7 +1267,7 @@ cmu_hsi0: clock-controller@11000000 {
usbdrd31_phy: phy@11100000 {
compatible = "google,gs101-usb31drd-phy";
reg = <0x11100000 0x0100>,
reg = <0x11100000 0x0200>,
<0x110f0000 0x0800>,
<0x110e0000 0x2800>;
reg-names = "phy", "pcs", "pma";