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staging: mt7621-dts: use clock in pci phy nodes

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MT7621 SoC clock driver has already mainlined in
'commit 48df7a26f4 ("clk: ralink: add clock driver for mt7621 SoC")'
Hence we can use the clock in pcie phy nodes to
be able to get it from there in driver code.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210514112820.32499-1-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Sergio Paracuellos
2021-05-14 13:28:20 +02:00
committed by Greg Kroah-Hartman
parent 5f8e9aff1a
commit 519c49678a
1 changed files with 2 additions and 0 deletions
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2
drivers/staging/mt7621-dts/mt7621.dtsi
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@@ -548,12 +548,14 @@ pcie@2,0 {
pcie0_phy: pcie-phy@1e149000 {
compatible = "mediatek,mt7621-pci-phy";
reg = <0x1e149000 0x0700>;
clocks = <&sysc MT7621_CLK_XTAL>;
#phy-cells = <1>;
};
pcie2_phy: pcie-phy@1e14a000 {
compatible = "mediatek,mt7621-pci-phy";
reg = <0x1e14a000 0x0700>;
clocks = <&sysc MT7621_CLK_XTAL>;
#phy-cells = <1>;
};
};