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drm/i915/vrr: Account for TRANS_PUSH delay

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When we send a push during vblank the TRANS_PUSH write happens
at some point during a scanline, and the hardware picks it up
on the next scanline. Thus there is up to one extra scanline
of delay between the TRANS_PUSH write and the delayed vblank
triggering. Account for that during intel_dsb_wait_vblank_delay()
so that we are guaranteed to be past the delayed vblank before
we trigger the completion interrupt for the commit.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250207223159.14132-4-ville.syrjala@linux.intel.com
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
This commit is contained in:
Ville Syrjälä
2025-02-08 00:31:54 +02:00
parent b47e345db9
commit 51385d6899
1 changed files with 7 additions and 1 deletions
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8
drivers/gpu/drm/i915/display/intel_dsb.c
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@@ -116,7 +116,13 @@ static int dsb_vblank_delay(struct intel_atomic_state *state,
intel_pre_commit_crtc_state(state, crtc);
if (pre_commit_is_vrr_active(state, crtc))
return intel_vrr_vblank_delay(crtc_state);
/*
* When the push is sent during vblank it will trigger
* on the next scanline, hence we have up to one extra
* scanline until the delayed vblank occurs after
* TRANS_PUSH has been written.
*/
return intel_vrr_vblank_delay(crtc_state) + 1;
else
return intel_mode_vblank_delay(&crtc_state->hw.adjusted_mode);
}