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clk: renesas: r8a779h0: Add MSIOF clocks

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Add the module clocks used by the Clock-Synchronized Serial Interfaces
with FIFO (MSIOF) on the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/86ce05ae274d384c5221bd136415a7b0a1579592.1713279332.git.geert+renesas@glider.be
This commit is contained in:
Cong Dang
2024-04-16 16:56:27 +02:00
committed by Geert Uytterhoeven
parent 3b23118bdb
commit 50f0cbd5cc
1 changed files with 6 additions and 0 deletions
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6
drivers/clk/renesas/r8a779h0-cpg-mssr.c
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@@ -184,6 +184,12 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] = {
DEF_MOD("i2c1", 519, R8A779H0_CLK_S0D6_PER),
DEF_MOD("i2c2", 520, R8A779H0_CLK_S0D6_PER),
DEF_MOD("i2c3", 521, R8A779H0_CLK_S0D6_PER),
DEF_MOD("msi0", 618, R8A779H0_CLK_MSO),
DEF_MOD("msi1", 619, R8A779H0_CLK_MSO),
DEF_MOD("msi2", 620, R8A779H0_CLK_MSO),
DEF_MOD("msi3", 621, R8A779H0_CLK_MSO),
DEF_MOD("msi4", 622, R8A779H0_CLK_MSO),
DEF_MOD("msi5", 623, R8A779H0_CLK_MSO),
DEF_MOD("rpc-if", 629, R8A779H0_CLK_RPCD2),
DEF_MOD("scif0", 702, R8A779H0_CLK_SASYNCPERD4),
DEF_MOD("scif1", 703, R8A779H0_CLK_SASYNCPERD4),